38#ifndef DRIVER_TCS34725_H
39#define DRIVER_TCS34725_H
154 uint8_t (*
iic_read)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len);
155 uint8_t (*
iic_write)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len);
194#define DRIVER_TCS34725_LINK_INIT(HANDLE, STRUCTURE) memset(HANDLE, 0, sizeof(STRUCTURE))
202#define DRIVER_TCS34725_LINK_IIC_INIT(HANDLE, FUC) (HANDLE)->iic_init = FUC
210#define DRIVER_TCS34725_LINK_IIC_DEINIT(HANDLE, FUC) (HANDLE)->iic_deinit = FUC
218#define DRIVER_TCS34725_LINK_IIC_READ(HANDLE, FUC) (HANDLE)->iic_read = FUC
226#define DRIVER_TCS34725_LINK_IIC_WRITE(HANDLE, FUC) (HANDLE)->iic_write = FUC
234#define DRIVER_TCS34725_LINK_DELAY_MS(HANDLE, FUC) (HANDLE)->delay_ms = FUC
242#define DRIVER_TCS34725_LINK_DEBUG_PRINT(HANDLE, FUC) (HANDLE)->debug_print = FUC
uint8_t tcs34725_set_rgbc_integration_time(tcs34725_handle_t *handle, tcs34725_integration_time_t t)
set the rgbc adc integration time
uint8_t tcs34725_get_power_on(tcs34725_handle_t *handle, tcs34725_bool_t *enable)
get the power status
uint8_t tcs34725_deinit(tcs34725_handle_t *handle)
close the chip
struct tcs34725_info_s tcs34725_info_t
tcs34725 information structure definition
uint8_t tcs34725_set_gain(tcs34725_handle_t *handle, tcs34725_gain_t gain)
set the adc gain
uint8_t tcs34725_set_rgbc(tcs34725_handle_t *handle, tcs34725_bool_t enable)
enable or disable the rgbc adc
uint8_t tcs34725_set_wait_time(tcs34725_handle_t *handle, tcs34725_wait_time_t t)
set the wait time
tcs34725_bool_t
tcs34725 bool enumeration definition
uint8_t tcs34725_set_power_on(tcs34725_handle_t *handle, tcs34725_bool_t enable)
enable or disable the power
uint8_t tcs34725_get_wait_time(tcs34725_handle_t *handle, tcs34725_wait_time_t *t)
get the wait time
uint8_t tcs34725_get_wait(tcs34725_handle_t *handle, tcs34725_bool_t *enable)
get the wait time
uint8_t tcs34725_get_rgbc(tcs34725_handle_t *handle, tcs34725_bool_t *enable)
get the rgbc status
uint8_t tcs34725_info(tcs34725_info_t *info)
get chip information
uint8_t tcs34725_get_gain(tcs34725_handle_t *handle, tcs34725_gain_t *gain)
get the adc gain
uint8_t tcs34725_read_rgb(tcs34725_handle_t *handle, uint16_t *red, uint16_t *green, uint16_t *blue)
read the rgb data
struct tcs34725_handle_s tcs34725_handle_t
tcs34725 handle structure definition
tcs34725_wait_time_t
tcs34725 wait time enumeration definition
tcs34725_gain_t
tcs34725 gain enumeration definition
uint8_t tcs34725_init(tcs34725_handle_t *handle)
initialize the chip
uint8_t tcs34725_read_rgbc(tcs34725_handle_t *handle, uint16_t *red, uint16_t *green, uint16_t *blue, uint16_t *clear)
read the rgbc data
tcs34725_integration_time_t
tcs34725 integration time enumeration definition
uint8_t tcs34725_set_wait(tcs34725_handle_t *handle, tcs34725_bool_t enable)
enable or disable the wait time
uint8_t tcs34725_read_c(tcs34725_handle_t *handle, uint16_t *clear)
read the clear data
uint8_t tcs34725_get_rgbc_integration_time(tcs34725_handle_t *handle, tcs34725_integration_time_t *t)
get the rgbc adc integration time
@ TCS34725_WAIT_TIME_29MS
@ TCS34725_WAIT_TIME_2P4MS
@ TCS34725_WAIT_TIME_2450MS
@ TCS34725_WAIT_TIME_614MS
@ TCS34725_WAIT_TIME_7400MS
@ TCS34725_WAIT_TIME_204MS
@ TCS34725_INTEGRATION_TIME_700MS
@ TCS34725_INTEGRATION_TIME_50MS
@ TCS34725_INTEGRATION_TIME_24MS
@ TCS34725_INTEGRATION_TIME_101MS
@ TCS34725_INTEGRATION_TIME_2P4MS
@ TCS34725_INTEGRATION_TIME_154MS
uint8_t tcs34725_get_reg(tcs34725_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
get the chip register
uint8_t tcs34725_set_reg(tcs34725_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
set the chip register
uint8_t tcs34725_get_rgbc_clear_high_interrupt_threshold(tcs34725_handle_t *handle, uint16_t *threshold)
get the rgbc clear high interrupt threshold
tcs34725_interrupt_mode_t
tcs34725 interrupt mode enumeration definition
uint8_t tcs34725_set_rgbc_clear_high_interrupt_threshold(tcs34725_handle_t *handle, uint16_t threshold)
set the rgbc clear high interrupt threshold
uint8_t tcs34725_get_rgbc_clear_low_interrupt_threshold(tcs34725_handle_t *handle, uint16_t *threshold)
get the rgbc clear low interrupt threshold
uint8_t tcs34725_get_rgbc_interrupt(tcs34725_handle_t *handle, tcs34725_bool_t *enable)
get the rgbc interrupt
uint8_t tcs34725_get_interrupt_mode(tcs34725_handle_t *handle, tcs34725_interrupt_mode_t *mode)
get the interrupt mode
uint8_t tcs34725_set_rgbc_interrupt(tcs34725_handle_t *handle, tcs34725_bool_t enable)
enable or disable the rgbc interrupt
uint8_t tcs34725_set_rgbc_clear_low_interrupt_threshold(tcs34725_handle_t *handle, uint16_t threshold)
set the rgbc clear low interrupt threshold
uint8_t tcs34725_set_interrupt_mode(tcs34725_handle_t *handle, tcs34725_interrupt_mode_t mode)
set the interrupt mode
@ TCS34725_INTERRUPT_MODE_EVERY_RGBC_CYCLE
@ TCS34725_INTERRUPT_MODE_35_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_20_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_55_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_15_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_30_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_40_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_10_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_45_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_3_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_60_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_25_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_50_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_2_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_5_CLEAR_CHANNEL_OUT_OF_THRESHOLD
@ TCS34725_INTERRUPT_MODE_1_CLEAR_CHANNEL_OUT_OF_THRESHOLD
tcs34725 handle structure definition
void(* delay_ms)(uint32_t ms)
void(* debug_print)(const char *const fmt,...)
uint8_t(* iic_init)(void)
uint8_t(* iic_write)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
uint8_t(* iic_read)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
uint8_t(* iic_deinit)(void)
tcs34725 information structure definition
float supply_voltage_max_v
char manufacturer_name[32]
float supply_voltage_min_v