LibDriver UVIS25
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driver_uvis25.c
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1
37
38#include "driver_uvis25.h"
39
43#define CHIP_NAME "STMicroelectronics UVIS25"
44#define MANUFACTURER_NAME "STMicroelectronics"
45#define SUPPLY_VOLTAGE_MIN 1.7f
46#define SUPPLY_VOLTAGE_MAX 3.6f
47#define MAX_CURRENT 0.01f
48#define TEMPERATURE_MIN -20.0f
49#define TEMPERATURE_MAX 85.0f
50#define DRIVER_VERSION 2000
51
55#define UVIS25_REG_WHO_AM_I 0x0F
56#define UVIS25_REG_CTRL_REG1 0x20
57#define UVIS25_REG_CTRL_REG2 0x21
58#define UVIS25_REG_CTRL_REG3 0x22
59#define UVIS25_REG_INT_CFG 0x23
60#define UVIS25_REG_INT_SOURCE 0x24
61#define UVIS25_REG_THS_UV 0x25
62#define UVIS25_REG_STATUS_REG 0x27
63#define UVIS25_REG_UV_OUT_REG 0x28
64
68#define UVIS25_IIC_ADDRESS 0x8E
69
81static uint8_t a_uvis25_iic_spi_read(uvis25_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
82{
83 if (handle->iic_spi == UVIS25_INTERFACE_IIC) /* iic interface */
84 {
85 if (handle->iic_read(UVIS25_IIC_ADDRESS, reg, buf, len) != 0) /* read register */
86 {
87 return 1; /* return error */
88 }
89 else
90 {
91 return 0; /* success return 0 */
92 }
93 }
94 else /* spi interface */
95 {
96 if (len > 1) /* if length > 1 */
97 {
98 reg |= 1 << 6; /* set read more than 1 byte */
99 }
100 reg |= 1 << 7; /* set read mode */
101
102 if (handle->spi_read(reg, buf, len) != 0) /* read register */
103 {
104 return 1; /* return error */
105 }
106 else
107 {
108 return 0; /* success return 0 */
109 }
110 }
111}
112
124static uint8_t a_uvis25_iic_spi_write(uvis25_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
125{
126 if (handle->iic_spi == UVIS25_INTERFACE_IIC) /* iic interface */
127 {
128 if (handle->iic_write(UVIS25_IIC_ADDRESS, reg, buf, len) != 0) /* write register */
129 {
130 return 1; /* return error */
131 }
132 else
133 {
134 return 0; /* success return 0 */
135 }
136 }
137 else /* spi interface */
138 {
139 if (len > 1) /* if length > 1 */
140 {
141 reg |= 1 << 6; /* set write more than 1 byte */
142 }
143
144 if (handle->spi_write(reg, buf, len) != 0) /* write register */
145 {
146 return 1; /* return error */
147 }
148 else
149 {
150 return 0; /* success return 0 */
151 }
152 }
153}
154
165{
166 if (handle == NULL) /* check handle */
167 {
168 return 2; /* return error */
169 }
170
171 handle->iic_spi = (uint8_t)interface; /* set interface */
172
173 return 0; /* success return 0 */
174}
175
186{
187 if (handle == NULL) /* check handle */
188 {
189 return 2; /* return error */
190 }
191
192 *interface = (uvis25_interface_t)(handle->iic_spi); /* get interface */
193
194 return 0; /* success return 0 */
195}
196
209{
210 uint8_t res;
211 uint8_t prev;
212
213 if (handle == NULL) /* check handle */
214 {
215 return 2; /* return error */
216 }
217 if (handle->inited != 1) /* check handle initialization */
218 {
219 return 3; /* return error */
220 }
221
222 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* read ctrl reg1 */
223 if (res != 0) /* check result */
224 {
225 handle->debug_print("uvis25: read register failed.\n"); /* read register failed */
226
227 return 1; /* return error */
228 }
229 prev &= ~(1 << 1); /* clear enable bit */
230 prev |= enable << 1; /* set enable */
231
232 return a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* write config */
233}
234
247{
248 uint8_t res;
249 uint8_t prev;
250
251 if (handle == NULL) /* check handle */
252 {
253 return 2; /* return error */
254 }
255 if (handle->inited != 1) /* check handle initialization */
256 {
257 return 3; /* return error */
258 }
259
260 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* read reg */
261 if (res != 0) /* check result */
262 {
263 handle->debug_print("uvis25: read register failed.\n"); /* read register failed */
264
265 return 1; /* return error */
266 }
267 *enable = (uvis25_bool_t)((prev >> 1) & 0x01); /* get bool */
268
269 return 0; /* success return 0 */
270}
271
284{
285 uint8_t res;
286 uint8_t prev;
287
288 if (handle == NULL) /* check handle */
289 {
290 return 2; /* return error */
291 }
292 if (handle->inited != 1) /* check handle initialization */
293 {
294 return 3; /* return error */
295 }
296
297 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
298 if (res != 0) /* check result */
299 {
300 handle->debug_print("uvis25: read register failed.\n"); /* read register failed */
301
302 return 1; /* return error */
303 }
304 prev &= ~(1 << 7); /* clear boot mode bit */
305 prev |= mode << 7; /* set boot mode */
306
307 return a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* write config */
308}
309
322{
323 uint8_t res;
324 uint8_t prev;
325
326 if (handle == NULL) /* check handle */
327 {
328 return 2; /* return error */
329 }
330 if (handle->inited != 1) /* check handle initialization */
331 {
332 return 3; /* return error */
333 }
334
335 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
336 if (res != 0) /* check result */
337 {
338 handle->debug_print("uvis25: read register failed.\n"); /* read register failed */
339
340 return 1; /* return error */
341 }
342 *mode = (uvis25_boot_mode_t)((prev >> 7) & 0x01); /* get mode */
343
344 return 0; /* success return 0 */
345}
346
359{
360 uint8_t res;
361 uint8_t prev;
362
363 if (handle == NULL) /* check handle */
364 {
365 return 2; /* return error */
366 }
367 if (handle->inited != 1) /* check handle initialization */
368 {
369 return 3; /* return error */
370 }
371
372 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
373 if (res != 0) /* check result */
374 {
375 handle->debug_print("uvis25: read register failed.\n"); /* read register failed */
376
377 return 1; /* return error */
378 }
379 prev &= ~(1 << 4); /* clear iic enable bit */
380 prev |= (!enable) << 4; /* set iic enable */
381
382 return a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* write config */
383}
384
397{
398 uint8_t res;
399 uint8_t prev;
400
401 if (handle == NULL) /* check handle */
402 {
403 return 2; /* return error */
404 }
405 if (handle->inited != 1) /* check handle initialization */
406 {
407 return 3; /* return error */
408 }
409
410 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
411 if (res != 0) /* check result */
412 {
413 handle->debug_print("uvis25: read register failed.\n"); /* read register failed */
414
415 return 1; /* return error */
416 }
417 *enable = (uvis25_bool_t)!((prev >> 4) & 0x01); /* get bool */
418
419 return 0; /* success return 0 */
420}
421
434{
435 uint8_t res;
436 uint8_t prev;
437
438 if (handle == NULL) /* check handle */
439 {
440 return 2; /* return error */
441 }
442 if (handle->inited != 1) /* check handle initialization */
443 {
444 return 3; /* return error */
445 }
446
447 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
448 if (res != 0) /* check result */
449 {
450 handle->debug_print("uvis25: read register failed.\n"); /* read register failed */
451
452 return 1; /* return error */
453 }
454 prev &= ~(1 << 3); /* clear wire bit */
455 prev |= wire << 3; /* set wire */
456
457 return a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* write config */
458}
459
472{
473 uint8_t res;
474 uint8_t prev;
475
476 if (handle == NULL) /* check handle */
477 {
478 return 2; /* return error */
479 }
480 if (handle->inited != 1) /* check handle initialization */
481 {
482 return 3; /* return error */
483 }
484
485 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
486 if (res != 0) /* check result */
487 {
488 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
489
490 return 1; /* return error */
491 }
492 *wire = (uvis25_spi_wire_t)((prev>>3) & 0x01); /* get bool */
493
494 return 0; /* success return 0 */
495}
496
509{
510 uint8_t res;
511 uint8_t prev;
512
513 if (handle == NULL) /* check handle */
514 {
515 return 2; /* return error */
516 }
517 if (handle->inited != 1) /* check handle initialization */
518 {
519 return 3; /* return error */
520 }
521
522 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* read ctrl reg3 */
523 if (res != 0) /* check result */
524 {
525 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
526
527 return 1; /* return error */
528 }
529 prev &= ~(1 << 7); /* clear level bit */
530 prev |= level << 7; /* set level */
531
532 return a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* write config */
533}
534
547{
548 uint8_t res;
549 uint8_t prev;
550
551 if (handle == NULL) /* check handle */
552 {
553 return 2; /* return error */
554 }
555 if (handle->inited != 1) /* check handle initialization */
556 {
557 return 3; /* return error */
558 }
559
560 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* read ctrl reg3 */
561 if (res != 0) /* check result */
562 {
563 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
564
565 return 1; /* return error */
566 }
567 *level = (uvis25_interrupt_active_level_t)((prev >> 7) & 0x01); /* get bool */
568
569 return 0; /* success return 0 */
570}
571
584{
585 uint8_t res;
586 uint8_t prev;
587
588 if (handle == NULL) /* check handle */
589 {
590 return 2; /* return error */
591 }
592 if (handle->inited != 1) /* check handle initialization */
593 {
594 return 3; /* return error */
595 }
596
597 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* read ctrl reg3 */
598 if (res != 0) /* check result */
599 {
600 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
601
602 return 1; /* return error */
603 }
604 prev &= ~(1 << 6); /* clear pin type bit */
605 prev |= pin_type << 6; /* set pin type */
606
607 return a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* write config */
608}
609
622{
623 uint8_t res;
624 uint8_t prev;
625
626 if (handle == NULL) /* check handle */
627 {
628 return 2; /* return error */
629 }
630 if (handle->inited != 1) /* check handle initialization */
631 {
632 return 3; /* return error */
633 }
634
635 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* read ctrl reg3 */
636 if (res != 0) /* check result */
637 {
638 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
639
640 return 1; /* return error */
641 }
642 *pin_type = (uvis25_interrupt_pin_type_t)((prev >> 6) & 0x01); /* get bool */
643
644 return 0; /* success return 0 */
645}
646
659{
660 uint8_t res;
661 uint8_t prev;
662
663 if (handle == NULL) /* check handle */
664 {
665 return 2; /* return error */
666 }
667 if (handle->inited != 1) /* check handle initialization */
668 {
669 return 3; /* return error */
670 }
671
672 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* read ctrl reg3 */
673 if (res != 0) /* check result */
674 {
675 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
676
677 return 1; /* return error */
678 }
679 prev &= ~(0x03 << 0); /* clear interrupt type bits */
680 prev |= type << 0; /* set interrupt type */
681
682 return a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* write config */
683}
684
697{
698 uint8_t res;
699 uint8_t prev;
700
701 if (handle == NULL) /* check handle */
702 {
703 return 2; /* return error */
704 }
705 if (handle->inited != 1) /* check handle initialization */
706 {
707 return 3; /* return error */
708 }
709
710 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG3, (uint8_t *)&prev, 1); /* read ctrl reg3 */
711 if (res != 0) /* check result */
712 {
713 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
714
715 return 1; /* return error */
716 }
717 *type = (uvis25_interrupt_type_t)((prev >> 0) & 0x03); /* get interrupt type */
718
719 return 0; /* success return 0 */
720}
721
734{
735 uint8_t res;
736 uint8_t prev;
737
738 if (handle == NULL) /* check handle */
739 {
740 return 2; /* return error */
741 }
742 if (handle->inited != 1) /* check handle initialization */
743 {
744 return 3; /* return error */
745 }
746
747 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
748 if (res != 0) /* check result */
749 {
750 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
751
752 return 1; /* return error */
753 }
754 prev &= ~(0x01 << 3); /* clear interrupt enable bit */
755 prev |= enable << 3; /* set interrupt enable */
756
757 return a_uvis25_iic_spi_write(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* write config */
758}
759
772{
773 uint8_t res;
774 uint8_t prev;
775
776 if (handle == NULL) /* check handle */
777 {
778 return 2; /* return error */
779 }
780 if (handle->inited != 1) /* check handle initialization */
781 {
782 return 3; /* return error */
783 }
784
785 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
786 if (res != 0) /* check result */
787 {
788 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
789
790 return 1; /* return error */
791 }
792 *enable = (uvis25_bool_t)((prev >> 3) & 0x01); /* get value */
793
794 return 0; /* success return 0 */
795}
796
809{
810 uint8_t res;
811 uint8_t prev;
812
813 if (handle == NULL) /* check handle */
814 {
815 return 2; /* return error */
816 }
817 if (handle->inited != 1) /* check handle initialization */
818 {
819 return 3; /* return error */
820 }
821
822 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
823 if (res != 0) /* check result */
824 {
825 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
826
827 return 1; /* return error */
828 }
829 prev &= ~(0x01 << 2); /* clear latch interrupt enable bit */
830 prev |= enable << 2; /* set latch interrupt enable */
831
832 return a_uvis25_iic_spi_write(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* write config */
833}
834
847{
848 uint8_t res;
849 uint8_t prev;
850
851 if (handle == NULL) /* check handle */
852 {
853 return 2; /* return error */
854 }
855 if (handle->inited != 1) /* check handle initialization */
856 {
857 return 3; /* return error */
858 }
859
860 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
861 if (res != 0) /* check result */
862 {
863 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
864
865 return 1; /* return error */
866 }
867 *enable = (uvis25_bool_t)((prev >> 2) & 0x01); /* get value */
868
869 return 0; /* success return 0 */
870}
871
884{
885 uint8_t res;
886 uint8_t prev;
887
888 if (handle == NULL) /* check handle */
889 {
890 return 2; /* return error */
891 }
892 if (handle->inited != 1) /* check handle initialization */
893 {
894 return 3; /* return error */
895 }
896
897 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
898 if (res != 0) /* check result */
899 {
900 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
901
902 return 1; /* return error */
903 }
904 prev &= ~(0x01 << 1); /* clear interrupt low threshold bit */
905 prev |= enable << 1; /* set interrupt low threshold */
906
907 return a_uvis25_iic_spi_write(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* write config */
908}
909
922{
923 uint8_t res;
924 uint8_t prev;
925
926 if (handle == NULL) /* check handle */
927 {
928 return 2; /* return error */
929 }
930 if (handle->inited != 1) /* check handle initialization */
931 {
932 return 3; /* return error */
933 }
934
935 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
936 if (res != 0) /* check result */
937 {
938 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
939
940 return 1; /* return error */
941 }
942 *enable = (uvis25_bool_t)((prev >> 1) & 0x01); /* get value */
943
944 return 0; /* success return 0 */
945}
946
959{
960 uint8_t res;
961 uint8_t prev;
962
963 if (handle == NULL) /* check handle */
964 {
965 return 2; /* return error */
966 }
967 if (handle->inited != 1) /* check handle initialization */
968 {
969 return 3; /* return error */
970 }
971
972 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
973 if (res != 0) /* check result */
974 {
975 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
976
977 return 1; /* return error */
978 }
979 prev &= ~(0x01 << 0); /* clear interrupt high threshold enable bit */
980 prev |= enable << 0; /* set interrupt high threshold enable */
981
982 return a_uvis25_iic_spi_write(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* write config */
983}
984
997{
998 uint8_t res;
999 uint8_t prev;
1000
1001 if (handle == NULL) /* check handle */
1002 {
1003 return 2; /* return error */
1004 }
1005 if (handle->inited != 1) /* check handle initialization */
1006 {
1007 return 3; /* return error */
1008 }
1009
1010 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_CFG, (uint8_t *)&prev, 1); /* read int cfg */
1011 if (res != 0) /* check result */
1012 {
1013 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1014
1015 return 1; /* return error */
1016 }
1017 *enable = (uvis25_bool_t)((prev >> 0) & 0x01); /* get value */
1018
1019 return 0; /* success return 0 */
1020}
1021
1033uint8_t uvis25_set_threshold(uvis25_handle_t *handle, uint8_t threshold)
1034{
1035 if (handle == NULL) /* check handle */
1036 {
1037 return 2; /* return error */
1038 }
1039 if (handle->inited != 1) /* check handle initialization */
1040 {
1041 return 3; /* return error */
1042 }
1043
1044 return a_uvis25_iic_spi_write(handle, UVIS25_REG_THS_UV, (uint8_t *)&threshold, 1); /* write threshold */
1045}
1046
1058uint8_t uvis25_get_threshold(uvis25_handle_t *handle, uint8_t *threshold)
1059{
1060 if (handle == NULL) /* check handle */
1061 {
1062 return 2; /* return error */
1063 }
1064 if (handle->inited != 1) /* check handle initialization */
1065 {
1066 return 3; /* return error */
1067 }
1068
1069 return a_uvis25_iic_spi_read(handle, UVIS25_REG_THS_UV, (uint8_t *)threshold, 1); /* read threshold */
1070}
1071
1083{
1084 uint8_t res, prev;
1085
1086 if (handle == NULL) /* check handle */
1087 {
1088 return 2; /* return error */
1089 }
1090 if (handle->inited != 1) /* check handle initialization */
1091 {
1092 return 3; /* return error */
1093 }
1094
1095 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_INT_SOURCE, (uint8_t *)&prev, 1); /* read int source */
1096 if (res != 0) /* check result */
1097 {
1098 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1099
1100 return 1; /* return error */
1101 }
1102 if ((prev & (1 < 2)) != 0) /* active */
1103 {
1104 if (handle->receive_callback != NULL) /* check the callback */
1105 {
1106 handle->receive_callback(UVIS25_INTERRUPT_ACTIVE); /* run callback */
1107 }
1108 }
1109 if ((prev & (1 << 1)) != 0) /* interrupt lower */
1110 {
1111 if (handle->receive_callback != NULL) /* check the callback */
1112 {
1113 handle->receive_callback(UVIS25_INTERRUPT_LOWER); /* run callback */
1114 }
1115 }
1116 if ((prev & (1 << 0)) != 0) /* interrupt higher */
1117 {
1118 if (handle->receive_callback != NULL) /* check the callback */
1119 {
1120 handle->receive_callback(UVIS25_INTERRUPT_HIGHER); /* run callback */
1121 }
1122 }
1123
1124 return 0; /* success return 0 */
1125}
1126
1139uint8_t uvis25_threshold_convert_to_register(uvis25_handle_t *handle, float uv, uint8_t *reg)
1140{
1141 if (handle == NULL) /* check handle */
1142 {
1143 return 2; /* return error */
1144 }
1145 if (handle->inited != 1) /* check handle initialization */
1146 {
1147 return 3; /* return error */
1148 }
1149
1150 *reg = (uint8_t )(uv * 16.0f); /* convert real data to register data */
1151
1152 return 0; /* success return 0 */
1153}
1154
1167uint8_t uvis25_threshold_convert_to_data(uvis25_handle_t *handle, uint8_t reg, float *uv)
1168{
1169 if (handle == NULL) /* check handle */
1170 {
1171 return 2; /* return error */
1172 }
1173 if (handle->inited != 1) /* check handle initialization */
1174 {
1175 return 3; /* return error */
1176 }
1177
1178 *uv = (float)reg / 16.0f; /* convert raw data to real data */
1179
1180 return 0; /* success return 0 */
1181}
1182
1194{
1195 uint8_t id;
1196
1197 if (handle == NULL) /* check handle */
1198 {
1199 return 2; /* return error */
1200 }
1201 if (handle->debug_print == NULL) /* check debug_print */
1202 {
1203 return 3; /* return error */
1204 }
1205 if (handle->iic_init == NULL) /* check iic_init */
1206 {
1207 handle->debug_print("uvis25: iic_init is null.\n"); /* iic_init is null */
1208
1209 return 3; /* return error */
1210 }
1211 if (handle->iic_deinit == NULL) /* check iic_deinit */
1212 {
1213 handle->debug_print("uvis25: iic_deinit is null.\n"); /* iic_deinit is null */
1214
1215 return 3; /* return error */
1216 }
1217 if (handle->iic_read == NULL) /* check iic_read */
1218 {
1219 handle->debug_print("uvis25: iic_read is null.\n"); /* iic_read is null */
1220
1221 return 3; /* return error */
1222 }
1223 if (handle->iic_write == NULL) /* check iic_write */
1224 {
1225 handle->debug_print("uvis25: iic_write is null.\n"); /* iic_write is null */
1226
1227 return 3; /* return error */
1228 }
1229 if (handle->spi_init == NULL) /* check spi_init */
1230 {
1231 handle->debug_print("uvis25: spi_init is null.\n"); /* spi_init is null */
1232
1233 return 3; /* return error */
1234 }
1235 if (handle->spi_deinit == NULL) /* check spi_deinit */
1236 {
1237 handle->debug_print("uvis25: spi_deinit is null.\n"); /* spi_deinit is null */
1238
1239 return 3; /* return error */
1240 }
1241 if (handle->spi_read == NULL) /* check spi_read */
1242 {
1243 handle->debug_print("uvis25: spi_read is null.\n"); /* spi_read is null */
1244
1245 return 3; /* return error */
1246 }
1247 if (handle->spi_write == NULL) /* check spi_write */
1248 {
1249 handle->debug_print("uvis25: spi_write is null.\n"); /* spi_write is null */
1250
1251 return 3; /* return error */
1252 }
1253 if (handle->delay_ms == NULL) /* check delay_ms */
1254 {
1255 handle->debug_print("uvis25: delay_ms is null.\n"); /* delay_ms is null */
1256
1257 return 3; /* return error */
1258 }
1259
1260 if (handle->iic_spi == UVIS25_INTERFACE_IIC) /* iic interface */
1261 {
1262 if (handle->iic_init() != 0) /* iic init */
1263 {
1264 handle->debug_print("uvis25: iic init failed.\n"); /* iic init failed */
1265
1266 return 1; /* return error */
1267 }
1268 }
1269 else /* spi interface */
1270 {
1271 if (handle->spi_init() != 0) /* spi init */
1272 {
1273 handle->debug_print("uvis25: spi init failed.\n"); /* spi init failed */
1274
1275 return 1; /* return error */
1276 }
1277 }
1278 if (a_uvis25_iic_spi_read(handle, UVIS25_REG_WHO_AM_I, (uint8_t *)&id, 1) != 0) /* read id */
1279 {
1280 handle->debug_print("uvis25: read id failed.\n"); /* read id failed */
1281 if (handle->iic_spi == UVIS25_INTERFACE_IIC) /* id iic interface */
1282 {
1283 (void)handle->iic_deinit(); /* iic deinit */
1284 }
1285 else
1286 {
1287 (void)handle->spi_deinit(); /* spi deinit */
1288 }
1289
1290 return 1; /* return error */
1291 }
1292 if (id != 0xCA) /* check id */
1293 {
1294 handle->debug_print("uvis25: id is invalid.\n"); /* id is invalid */
1295 if (handle->iic_spi == UVIS25_INTERFACE_IIC) /* if iic interface */
1296 {
1297 (void)handle->iic_deinit(); /* iic deinit */
1298 }
1299 else
1300 {
1301 (void)handle->spi_deinit(); /* spi deinit */
1302 }
1303
1304 return 1; /* return error */
1305 }
1306 handle->inited = 1; /* flag finish initialization */
1307
1308 return 0; /* success return 0 */
1309}
1310
1322{
1323 uint8_t res;
1324 uint8_t prev;
1325
1326 if (handle == NULL) /* check handle */
1327 {
1328 return 2; /* return error */
1329 }
1330 if (handle->inited != 1) /* check handle initialization */
1331 {
1332 return 3; /* return error */
1333 }
1334
1335 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
1336 if (res != 0) /* check result */
1337 {
1338 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1339
1340 return 1; /* return error */
1341 }
1342 prev &= ~(0x01 << 7); /* clear reboot bit */
1343 prev |= 1 << 7; /* set reboot */
1344 res = a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* write config */
1345 if (res != 0) /* check result */
1346 {
1347 handle->debug_print("uvis25: write register failed.\n"); /* write ctrl reg2 failed */
1348
1349 return 1; /* return error */
1350 }
1351 if (handle->iic_spi == UVIS25_INTERFACE_IIC) /* iic interface */
1352 {
1353 res = handle->iic_deinit(); /* iic deinit */
1354 if (res != 0) /* check result */
1355 {
1356 handle->debug_print("uvis25: iic deinit failed.\n"); /* iic deinit failed */
1357
1358 return 1; /* return error */
1359 }
1360 }
1361 else /* spi interface */
1362 {
1363 res = handle->spi_deinit(); /* spi deinit */
1364 if (res != 0) /* check result */
1365 {
1366 handle->debug_print("uvis25: spi deinit failed.\n"); /* spi deinit */
1367
1368 return 1; /* return error */
1369 }
1370 }
1371 handle->inited = 0; /* flag close */
1372
1373 return 0; /* success return 0 */
1374}
1375
1388uint8_t uvis25_single_read(uvis25_handle_t *handle, uint8_t *raw, float *uv)
1389{
1390 uint8_t res;
1391 uint8_t prev;
1392 uint8_t timeout;
1393
1394 if (handle == NULL) /* check handle */
1395 {
1396 return 2; /* return error */
1397 }
1398 if (handle->inited != 1) /* check handle initialization */
1399 {
1400 return 3; /* return error */
1401 }
1402
1403 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* read ctrl reg1 */
1404 if (res != 0) /* check result */
1405 {
1406 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1407
1408 return 1; /* return error */
1409 }
1410 prev &= ~(1 << 0); /* disable continuous reading */
1411 res = a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* write ctrl reg1 */
1412 if (res != 0) /* check result */
1413 {
1414 handle->debug_print("uvis25: write register failed.\n"); /* write failed */
1415
1416 return 1; /* return error */
1417 }
1418 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
1419 if (res != 0) /* check result */
1420 {
1421 handle->debug_print("uvis25: read register failed.\n"); /* read ctrl reg2 failed */
1422
1423 return 1; /* return error */
1424 }
1425 prev &= ~(1 << 0); /* clear one shot bit */
1426 prev |= 1 << 0; /* set one shot */
1427 res = a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* write reg2 */
1428 if (res != 0) /* check result */
1429 {
1430 handle->debug_print("uvis25: write register failed.\n"); /* write ctrl reg2 failed */
1431
1432 return 1; /* return error */
1433 }
1434 timeout = 0; /* reset timeout times */
1435
1436 while (1) /* loop */
1437 {
1438 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_STATUS_REG, (uint8_t *)&prev, 1); /* read status */
1439 if (res != 0) /* check result */
1440 {
1441 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1442
1443 return 1; /* return error */
1444 }
1445 if ((prev & 0x01) != 0) /* if data ready */
1446 {
1447 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_UV_OUT_REG, (uint8_t *)raw, 1); /* read uv out */
1448 if (res != 0) /* check result */
1449 {
1450 handle->debug_print("uvis25: read failed.\n"); /* read failed */
1451
1452 return 1; /* return error */
1453 }
1454 *uv = (float)(*raw) / 16.0f; /* convert raw */
1455
1456 return 0; /* success return 0 */
1457 }
1458 else if (timeout < 100) /* if not timeout */
1459 {
1460 handle->delay_ms(100); /* delay 100 ms */
1461 timeout++; /* retry times++ */
1462
1463 continue; /* continue */
1464 }
1465 else
1466 {
1467 handle->debug_print("uvis25: data is not available.\n"); /* data is not available */
1468
1469 return 1; /* return error */
1470 }
1471 }
1472}
1473
1485{
1486 uint8_t res;
1487 uint8_t prev;
1488
1489 if (handle == NULL) /* check handle */
1490 {
1491 return 2; /* return error */
1492 }
1493 if (handle->inited != 1) /* check handle initialization */
1494 {
1495 return 3; /* return error */
1496 }
1497
1498 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* read ctrl reg1 */
1499 if (res != 0) /* check result */
1500 {
1501 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1502
1503 return 1; /* return error */
1504 }
1505 prev &= ~(1 << 0); /* clear continuous reading */
1506 prev |= 1 << 0; /* enable continuous reading */
1507 res = a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* write ctrl reg1 */
1508 if (res != 0) /* check result */
1509 {
1510 handle->debug_print("uvis25: write register failed.\n"); /* write failed */
1511
1512 return 1; /* return error */
1513 }
1514 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
1515 if (res != 0) /* check result */
1516 {
1517 handle->debug_print("uvis25: read register failed.\n"); /* read ctrl reg2 failed */
1518
1519 return 1; /* return error */
1520 }
1521 prev &= ~(1 << 0); /* clear one shot bit */
1522 res = a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* write reg2 */
1523 if (res != 0) /* check result */
1524 {
1525 handle->debug_print("uvis25: write register failed.\n"); /* write ctrl reg2 failed */
1526
1527 return 1; /* return error */
1528 }
1529
1530 return 0; /* success return 0 */
1531}
1532
1544{
1545 uint8_t res;
1546 uint8_t prev;
1547
1548 if (handle == NULL) /* check handle */
1549 {
1550 return 2; /* return error */
1551 }
1552 if (handle->inited != 1) /* check handle initialization */
1553 {
1554 return 3; /* return error */
1555 }
1556
1557 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* read ctrl reg1 */
1558 if (res != 0) /* check result */
1559 {
1560 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1561
1562 return 1; /* return error */
1563 }
1564 prev &= ~(1 << 0); /* clear continuous reading */
1565 res = a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG1, (uint8_t *)&prev, 1); /* write ctrl reg1 */
1566 if (res != 0) /* check result */
1567 {
1568 handle->debug_print("uvis25: write register failed.\n"); /* write failed */
1569
1570 return 1; /* return error */
1571 }
1572 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* read ctrl reg2 */
1573 if (res != 0) /* check result */
1574 {
1575 handle->debug_print("uvis25: read register failed.\n"); /* read ctrl reg2 failed */
1576
1577 return 1; /* return error */
1578 }
1579 prev &= ~(1 << 0); /* clear one shot bit */
1580 res = a_uvis25_iic_spi_write(handle, UVIS25_REG_CTRL_REG2, (uint8_t *)&prev, 1); /* write reg2 */
1581 if (res != 0) /* check result */
1582 {
1583 handle->debug_print("uvis25: write register failed.\n"); /* write ctrl reg2 failed */
1584
1585 return 1; /* return error */
1586 }
1587
1588 return 0; /* success return 0 */
1589}
1590
1603uint8_t uvis25_continuous_read(uvis25_handle_t *handle, uint8_t *raw, float *uv)
1604{
1605 uint8_t res;
1606 uint8_t prev;
1607
1608 if (handle == NULL) /* check handle */
1609 {
1610 return 2; /* return error */
1611 }
1612 if (handle->inited != 1) /* check handle initialization */
1613 {
1614 return 3; /* return error */
1615 }
1616
1617 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_STATUS_REG, (uint8_t *)&prev, 1); /* read status failed */
1618 if (res != 0) /* check result */
1619 {
1620 handle->debug_print("uvis25: read register failed.\n"); /* read failed */
1621
1622 return 1; /* return error */
1623 }
1624 if ((prev & 0x01) != 0) /* check status */
1625 {
1626 res = a_uvis25_iic_spi_read(handle, UVIS25_REG_UV_OUT_REG, (uint8_t *)raw, 1); /* read uv out reg */
1627 if (res != 0) /* check result */
1628 {
1629 handle->debug_print("uvis25: read failed.\n"); /* read uv out failed */
1630
1631 return 1; /* return error */
1632 }
1633 *uv = (float)(*raw) / 16.0f; /* convert raw data */
1634
1635 return 0; /* success return 0 */
1636 }
1637 else
1638 {
1639 handle->debug_print("uvis25: data is not available.\n"); /* data is not available */
1640
1641 return 1; /* return error */
1642 }
1643}
1644
1658uint8_t uvis25_set_reg(uvis25_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
1659{
1660 if (handle == NULL) /* check handle */
1661 {
1662 return 2; /* return error */
1663 }
1664 if (handle->inited != 1) /* check handle initialization */
1665 {
1666 return 3; /* return error */
1667 }
1668
1669 return a_uvis25_iic_spi_write(handle, reg, buf, len); /* write data */
1670}
1671
1685uint8_t uvis25_get_reg(uvis25_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
1686{
1687 if (handle == NULL) /* check handle */
1688 {
1689 return 2; /* return error */
1690 }
1691 if (handle->inited != 1) /* check handle initialization */
1692 {
1693 return 3; /* return error */
1694 }
1695
1696 return a_uvis25_iic_spi_read(handle, reg, buf, len); /* read data */
1697}
1698
1708{
1709 if (info == NULL) /* check handle */
1710 {
1711 return 2; /* return error */
1712 }
1713
1714 memset(info, 0, sizeof(uvis25_info_t)); /* initialize uvis25 info structure */
1715 strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
1716 strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
1717 strncpy(info->interface, "IIC SPI", 8); /* copy interface name */
1718 info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
1719 info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
1720 info->max_current_ma = MAX_CURRENT; /* set maximum current */
1721 info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
1722 info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
1723 info->driver_version = DRIVER_VERSION; /* set driver version */
1724
1725 return 0; /* success return 0 */
1726}
#define UVIS25_REG_INT_SOURCE
#define UVIS25_REG_THS_UV
#define UVIS25_REG_UV_OUT_REG
#define MAX_CURRENT
#define UVIS25_REG_STATUS_REG
#define UVIS25_REG_CTRL_REG3
#define SUPPLY_VOLTAGE_MAX
#define UVIS25_REG_CTRL_REG1
#define UVIS25_REG_CTRL_REG2
#define TEMPERATURE_MAX
#define MANUFACTURER_NAME
#define TEMPERATURE_MIN
#define SUPPLY_VOLTAGE_MIN
#define CHIP_NAME
chip register definition
#define UVIS25_IIC_ADDRESS
iic address definition
#define DRIVER_VERSION
#define UVIS25_REG_WHO_AM_I
chip register definition
#define UVIS25_REG_INT_CFG
driver uvis25 header file
uvis25_interface_t
uvis25 interface enumeration definition
uint8_t uvis25_get_iic(uvis25_handle_t *handle, uvis25_bool_t *enable)
get the chip iic status
uint8_t uvis25_set_boot(uvis25_handle_t *handle, uvis25_boot_mode_t mode)
set the boot mode
uint8_t uvis25_set_spi_wire(uvis25_handle_t *handle, uvis25_spi_wire_t wire)
set the spi wire
uint8_t uvis25_init(uvis25_handle_t *handle)
initialize the chip
uint8_t uvis25_set_iic(uvis25_handle_t *handle, uvis25_bool_t enable)
enable or disable the chip iic
uint8_t uvis25_continuous_read(uvis25_handle_t *handle, uint8_t *raw, float *uv)
read data continuously
uint8_t uvis25_deinit(uvis25_handle_t *handle)
close the chip
uint8_t uvis25_irq_handler(uvis25_handle_t *handle)
irq handler
uint8_t uvis25_set_interface(uvis25_handle_t *handle, uvis25_interface_t interface)
set the chip interface
uint8_t uvis25_get_boot(uvis25_handle_t *handle, uvis25_boot_mode_t *mode)
get the boot mode
uvis25_boot_mode_t
uvis25 boot enumeration definition
uint8_t uvis25_get_interface(uvis25_handle_t *handle, uvis25_interface_t *interface)
get the chip interface
uint8_t uvis25_single_read(uvis25_handle_t *handle, uint8_t *raw, float *uv)
read data once
struct uvis25_info_s uvis25_info_t
uvis25 information structure definition
struct uvis25_handle_s uvis25_handle_t
uvis25 handle structure definition
uint8_t uvis25_info(uvis25_info_t *info)
get chip's information
uvis25_spi_wire_t
uvis25 spi wire enumeration definition
uint8_t uvis25_get_block_data_update(uvis25_handle_t *handle, uvis25_bool_t *enable)
get blocking data update status
uint8_t uvis25_set_block_data_update(uvis25_handle_t *handle, uvis25_bool_t enable)
enable or disable blocking data update
uvis25_bool_t
uvis25 bool enumeration definition
uint8_t uvis25_start_continuous_read(uvis25_handle_t *handle)
start reading
uint8_t uvis25_stop_continuous_read(uvis25_handle_t *handle)
stop reading
uint8_t uvis25_get_spi_wire(uvis25_handle_t *handle, uvis25_spi_wire_t *wire)
get the spi wire
@ UVIS25_INTERFACE_IIC
uint8_t uvis25_set_reg(uvis25_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
set the chip register
uint8_t uvis25_get_reg(uvis25_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
get the chip register
uint8_t uvis25_get_threshold(uvis25_handle_t *handle, uint8_t *threshold)
get the interrupt threshold
uint8_t uvis25_set_interrupt_low_threshold(uvis25_handle_t *handle, uvis25_bool_t enable)
enable or disable the low threshold interrupt
uvis25_interrupt_pin_type_t
uvis25 interrupt pin type enumeration definition
uint8_t uvis25_set_interrupt_high_threshold(uvis25_handle_t *handle, uvis25_bool_t enable)
enable or disable the high threshold interrupt
uint8_t uvis25_get_interrupt_type(uvis25_handle_t *handle, uvis25_interrupt_type_t *type)
get the interrupt type
uint8_t uvis25_get_interrupt_low_threshold(uvis25_handle_t *handle, uvis25_bool_t *enable)
get the low threshold interrupt status
uint8_t uvis25_set_interrupt_pin_type(uvis25_handle_t *handle, uvis25_interrupt_pin_type_t pin_type)
set the interrupt pin type
uint8_t uvis25_set_threshold(uvis25_handle_t *handle, uint8_t threshold)
set the interrupt threshold
uvis25_interrupt_active_level_t
uvis25 interrupt active level enumeration definition
uint8_t uvis25_set_interrupt_active_level(uvis25_handle_t *handle, uvis25_interrupt_active_level_t level)
set the interrupt active level
uint8_t uvis25_get_latch_interrupt(uvis25_handle_t *handle, uvis25_bool_t *enable)
get the latching interrupt status
uint8_t uvis25_threshold_convert_to_register(uvis25_handle_t *handle, float uv, uint8_t *reg)
convert a uv index to a raw register data
uint8_t uvis25_get_interrupt_pin_type(uvis25_handle_t *handle, uvis25_interrupt_pin_type_t *pin_type)
get the interrupt pin type
uint8_t uvis25_get_interrupt_high_threshold(uvis25_handle_t *handle, uvis25_bool_t *enable)
get the high threshold interrupt status
uint8_t uvis25_set_latch_interrupt(uvis25_handle_t *handle, uvis25_bool_t enable)
enable or disable latching interrupt
uint8_t uvis25_get_interrupt(uvis25_handle_t *handle, uvis25_bool_t *enable)
get the chip interrupt status
uint8_t uvis25_set_interrupt_type(uvis25_handle_t *handle, uvis25_interrupt_type_t type)
set the interrupt type
uint8_t uvis25_threshold_convert_to_data(uvis25_handle_t *handle, uint8_t reg, float *uv)
convert a raw register data to a converted uv index
uint8_t uvis25_set_interrupt(uvis25_handle_t *handle, uvis25_bool_t enable)
enable or disable the chip interrupt
uvis25_interrupt_type_t
uvis25 interrupt type enumeration definition
uint8_t uvis25_get_interrupt_active_level(uvis25_handle_t *handle, uvis25_interrupt_active_level_t *level)
get the interrupt active level
@ UVIS25_INTERRUPT_LOWER
@ UVIS25_INTERRUPT_HIGHER
@ UVIS25_INTERRUPT_ACTIVE
uint8_t(* spi_init)(void)
void(* delay_ms)(uint32_t ms)
uint8_t(* spi_read)(uint8_t reg, uint8_t *buf, uint16_t len)
void(* receive_callback)(uint8_t type)
uint8_t(* spi_write)(uint8_t reg, uint8_t *buf, uint16_t len)
void(* debug_print)(const char *const fmt,...)
uint8_t(* iic_init)(void)
uint8_t(* spi_deinit)(void)
uint8_t(* iic_write)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
uint8_t(* iic_read)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
uint8_t(* iic_deinit)(void)
float supply_voltage_max_v
uint32_t driver_version
char manufacturer_name[32]
float supply_voltage_min_v
char chip_name[32]