LibDriver ADXL345  2.0.0
ADXL345 full-featured driver
driver_adxl345.c
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1 
38 #include "driver_adxl345.h"
39 
43 #define CHIP_NAME "Analog Devices ADXL345"
44 #define MANUFACTURER_NAME "Analog Devices"
45 #define SUPPLY_VOLTAGE_MIN 2.0f
46 #define SUPPLY_VOLTAGE_MAX 3.6f
47 #define MAX_CURRENT 0.14f
48 #define TEMPERATURE_MIN -40.0f
49 #define TEMPERATURE_MAX 85.0f
50 #define DRIVER_VERSION 2000
55 #define ADXL345_REG_DEVID 0x00
56 #define ADXL345_REG_THRESH_TAP 0x1D
57 #define ADXL345_REG_OFSX 0x1E
58 #define ADXL345_REG_OFSY 0x1F
59 #define ADXL345_REG_OFSZ 0x20
60 #define ADXL345_REG_DUR 0x21
61 #define ADXL345_REG_LATENT 0x22
62 #define ADXL345_REG_WINDOW 0x23
63 #define ADXL345_REG_THRESH_ACT 0x24
64 #define ADXL345_REG_THRESH_INACT 0x25
65 #define ADXL345_REG_TIME_INACT 0x26
66 #define ADXL345_REG_ACT_INACT_CTL 0x27
67 #define ADXL345_REG_THRESH_FF 0x28
68 #define ADXL345_REG_TIME_FF 0x29
69 #define ADXL345_REG_TAP_AXES 0x2A
70 #define ADXL345_REG_ACT_TAP_STATUS 0x2B
71 #define ADXL345_REG_BW_RATE 0x2C
72 #define ADXL345_REG_POWER_CTL 0x2D
73 #define ADXL345_REG_INT_ENABLE 0x2E
74 #define ADXL345_REG_INT_MAP 0x2F
75 #define ADXL345_REG_INT_SOURCE 0x30
76 #define ADXL345_REG_DATA_FORMAT 0x31
77 #define ADXL345_REG_DATAX0 0x32
78 #define ADXL345_REG_DATAX1 0x33
79 #define ADXL345_REG_DATAY0 0x34
80 #define ADXL345_REG_DATAY1 0x35
81 #define ADXL345_REG_DATAZ0 0x36
82 #define ADXL345_REG_DATAZ1 0x37
83 #define ADXL345_REG_FIFO_CTL 0x38
84 #define ADXL345_REG_FIFO_STATUS 0x39
97 static uint8_t a_adxl345_iic_spi_read(adxl345_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
98 {
99  if (handle->iic_spi == ADXL345_INTERFACE_IIC) /* iic interface */
100  {
101  if (handle->iic_read(handle->iic_addr, reg, buf, len) != 0) /* read data */
102  {
103  return 1; /* return error */
104  }
105  else
106  {
107  return 0; /* success return 0 */
108  }
109  }
110  else /* spi interface */
111  {
112  if (len > 1) /* if length > 1 */
113  {
114  reg |= 1 << 6; /* flag length > 1 */
115  }
116  reg |= 1 << 7; /* flag read */
117 
118  if (handle->spi_read(reg, buf, len) != 0) /* read data */
119  {
120  return 1; /* return error */
121  }
122  else
123  {
124  return 0; /* success return 0 */
125  }
126  }
127 }
128 
140 static uint8_t a_adxl345_iic_spi_write(adxl345_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
141 {
142  if (handle->iic_spi == ADXL345_INTERFACE_IIC) /* iic interface */
143  {
144  if (handle->iic_write(handle->iic_addr, reg, buf, len) != 0) /* write data */
145  {
146  return 1; /* return error */
147  }
148  else
149  {
150  return 0; /* success return 0 */
151  }
152  }
153  else /* spi interface */
154  {
155  if (len > 1) /* if length > 1 */
156  {
157  reg |= 1 << 6; /* flag length > 1 */
158  }
159 
160  if (handle->spi_write(reg, buf, len) != 0) /* write data */
161  {
162  return 1; /* return error */
163  }
164  else
165  {
166  return 0; /* success return 0 */
167  }
168  }
169 }
170 
180 uint8_t adxl345_set_interface(adxl345_handle_t *handle, adxl345_interface_t interface)
181 {
182  if (handle == NULL) /* check handle */
183  {
184  return 2; /* return error */
185  }
186 
187  handle->iic_spi = (uint8_t)interface; /* set interface */
188 
189  return 0; /* success return 0 */
190 }
191 
201 uint8_t adxl345_get_interface(adxl345_handle_t *handle, adxl345_interface_t *interface)
202 {
203  if (handle == NULL) /* check handle */
204  {
205  return 2; /* return error */
206  }
207 
208  *interface = (adxl345_interface_t)(handle->iic_spi); /* get interface */
209 
210  return 0; /* success return 0 */
211 }
212 
222 uint8_t adxl345_set_addr_pin(adxl345_handle_t *handle, adxl345_address_t addr_pin)
223 {
224  if (handle == NULL) /* check handle */
225  {
226  return 2; /* return error */
227  }
228 
229  handle->iic_addr = (uint8_t)addr_pin; /* set pin */
230 
231  return 0; /* success return 0 */
232 }
233 
243 uint8_t adxl345_get_addr_pin(adxl345_handle_t *handle, adxl345_address_t *addr_pin)
244 {
245  if (handle == NULL) /* check handle */
246  {
247  return 2; /* return error */
248  }
249 
250  *addr_pin = (adxl345_address_t)(handle->iic_addr); /* get pin */
251 
252  return 0; /* success return 0 */
253 }
254 
266 uint8_t adxl345_set_tap_threshold(adxl345_handle_t *handle, uint8_t threshold)
267 {
268  if (handle == NULL) /* check handle */
269  {
270  return 2; /* return error */
271  }
272  if (handle->inited != 1) /* check handle initialization */
273  {
274  return 3; /* return error */
275  }
276 
277  return a_adxl345_iic_spi_write(handle, ADXL345_REG_THRESH_TAP, &threshold, 1); /* write config */
278 }
279 
291 uint8_t adxl345_get_tap_threshold(adxl345_handle_t *handle, uint8_t *threshold)
292 {
293  if (handle == NULL) /* check handle */
294  {
295  return 2; /* return error */
296  }
297  if (handle->inited != 1) /* check handle initialization */
298  {
299  return 3; /* return error */
300  }
301 
302  return a_adxl345_iic_spi_read(handle, ADXL345_REG_THRESH_TAP, threshold, 1); /* read config */
303 }
304 
316 uint8_t adxl345_tap_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
317 {
318  if (handle == NULL) /* check handle */
319  {
320  return 2; /* return error */
321  }
322  if (handle->inited != 1) /* check handle initialization */
323  {
324  return 3; /* return error */
325  }
326 
327  *reg = (uint8_t)(g / 0.0625f); /* convert real data to register data */
328 
329  return 0; /* success return 0 */
330 }
331 
343 uint8_t adxl345_tap_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
344 {
345  if (handle == NULL) /* check handle */
346  {
347  return 2; /* return error */
348  }
349  if (handle->inited != 1) /* check handle initialization */
350  {
351  return 3; /* return error */
352  }
353 
354  *g = (float)(reg) * 0.0625f; /* convert raw data to real data */
355 
356  return 0; /* success return 0 */
357 }
358 
372 uint8_t adxl345_set_offset(adxl345_handle_t *handle, int8_t x, int8_t y, int8_t z)
373 {
374  uint8_t res;
375 
376  if (handle == NULL) /* check handle */
377  {
378  return 2; /* return error */
379  }
380  if (handle->inited != 1) /* check handle initialization */
381  {
382  return 3; /* return error */
383  }
384 
385  res = a_adxl345_iic_spi_write(handle, ADXL345_REG_OFSX, (uint8_t *)&x, 1); /* write config */
386  if (res != 0) /* check result */
387  {
388  handle->debug_print("adxl345: write failed.\n"); /* write failed */
389 
390  return 1; /* return error */
391  }
392  res = a_adxl345_iic_spi_write(handle, ADXL345_REG_OFSY, (uint8_t *)&y, 1); /* write config */
393  if (res != 0) /* check result */
394  {
395  handle->debug_print("adxl345: write failed.\n"); /* write failed */
396 
397  return 1; /* return error */
398  }
399  res = a_adxl345_iic_spi_write(handle, ADXL345_REG_OFSZ, (uint8_t *)&z, 1); /* write config */
400  if (res != 0) /* check result */
401  {
402  handle->debug_print("adxl345: write failed.\n"); /* write failed */
403 
404  return 1; /* return error */
405  }
406 
407  return 0; /* success return 0 */
408 }
409 
423 uint8_t adxl345_get_offset(adxl345_handle_t *handle, int8_t *x, int8_t *y, int8_t *z)
424 {
425  uint8_t res;
426 
427  if (handle == NULL) /* check handle */
428  {
429  return 2; /* return error */
430  }
431  if (handle->inited != 1) /* check handle initialization */
432  {
433  return 3; /* return error */
434  }
435 
436  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_OFSX, (uint8_t *)x, 1); /* read config */
437  if (res != 0) /* check result */
438  {
439  handle->debug_print("adxl345: read failed.\n"); /* read failed */
440 
441  return 1; /* return error */
442  }
443  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_OFSY, (uint8_t *)y, 1); /* read config */
444  if (res != 0) /* check result */
445  {
446  handle->debug_print("adxl345: read failed.\n"); /* read failed */
447 
448  return 1; /* return error */
449  }
450  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_OFSZ, (uint8_t *)z, 1); /* read config */
451  if (res != 0) /* check result */
452  {
453  handle->debug_print("adxl345: read failed.\n"); /* read failed */
454 
455  return 1; /* return error */
456  }
457 
458  return 0; /* success return 0 */
459 }
460 
472 uint8_t adxl345_offset_convert_to_register(adxl345_handle_t *handle, float g, int8_t *reg)
473 {
474  if (handle == NULL) /* check handle */
475  {
476  return 2; /* return error */
477  }
478  if (handle->inited != 1) /* check handle initialization */
479  {
480  return 3; /* return error */
481  }
482 
483  *reg = (int8_t)(g / 0.0156f); /* convert real data to register data */
484 
485  return 0; /* success return 0 */
486 }
487 
499 uint8_t adxl345_offset_convert_to_data(adxl345_handle_t *handle, int8_t reg, float *g)
500 {
501  if (handle == NULL) /* check handle */
502  {
503  return 2; /* return error */
504  }
505  if (handle->inited != 1) /* check handle initialization */
506  {
507  return 3; /* return error */
508  }
509 
510  *g = (float)(reg) * 0.0156f; /* convert raw data to real data */
511 
512  return 0; /* success return 0 */
513 }
514 
526 uint8_t adxl345_set_duration(adxl345_handle_t *handle, uint8_t t)
527 {
528  if (handle == NULL) /* check handle */
529  {
530  return 2; /* return error */
531  }
532  if (handle->inited != 1) /* check handle initialization */
533  {
534  return 3; /* return error */
535  }
536 
537  return a_adxl345_iic_spi_write(handle, ADXL345_REG_DUR, &t, 1); /* write config */
538 }
539 
551 uint8_t adxl345_get_duration(adxl345_handle_t *handle, uint8_t *t)
552 {
553  if (handle == NULL) /* check handle */
554  {
555  return 2; /* return error */
556  }
557  if (handle->inited != 1) /* check handle initialization */
558  {
559  return 3; /* return error */
560  }
561 
562  return a_adxl345_iic_spi_read(handle, ADXL345_REG_DUR, t, 1); /* read config */
563 }
564 
576 uint8_t adxl345_duration_convert_to_register(adxl345_handle_t *handle, uint32_t us, uint8_t *reg)
577 {
578  if (handle == NULL) /* check handle */
579  {
580  return 2; /* return error */
581  }
582  if (handle->inited != 1) /* check handle initialization */
583  {
584  return 3; /* return error */
585  }
586 
587  *reg = (uint8_t)(us / 625); /* convert real data to register data */
588 
589  return 0; /* success return 0 */
590 }
591 
603 uint8_t adxl345_duration_convert_to_data(adxl345_handle_t *handle, uint8_t reg, uint32_t *us)
604 {
605  if (handle == NULL) /* check handle */
606  {
607  return 2; /* return error */
608  }
609  if (handle->inited != 1) /* check handle initialization */
610  {
611  return 3; /* return error */
612  }
613 
614  *us = (uint32_t)((float)(reg) * 625.0f); /* convert raw data to real data */
615 
616  return 0; /* success return 0 */
617 }
618 
630 uint8_t adxl345_set_latent(adxl345_handle_t *handle, uint8_t t)
631 {
632  if (handle == NULL) /* check handle */
633  {
634  return 2; /* return error */
635  }
636  if (handle->inited != 1) /* check handle initialization */
637  {
638  return 3; /* return error */
639  }
640 
641  return a_adxl345_iic_spi_write(handle, ADXL345_REG_LATENT, &t, 1); /* write config */
642 }
643 
655 uint8_t adxl345_get_latent(adxl345_handle_t *handle, uint8_t *t)
656 {
657  if (handle == NULL) /* check handle */
658  {
659  return 2; /* return error */
660  }
661  if (handle->inited != 1) /* check handle initialization */
662  {
663  return 3; /* return error */
664  }
665 
666  return a_adxl345_iic_spi_read(handle, ADXL345_REG_LATENT, t, 1); /* read config */
667 }
668 
680 uint8_t adxl345_latent_convert_to_register(adxl345_handle_t *handle, float ms, uint8_t *reg)
681 {
682  if (handle == NULL) /* check handle */
683  {
684  return 2; /* return error */
685  }
686  if (handle->inited != 1) /* check handle initialization */
687  {
688  return 3; /* return error */
689  }
690 
691  *reg = (uint8_t)(ms / 1.25f); /* convert real data to register data */
692 
693  return 0; /* success return 0 */
694 }
695 
707 uint8_t adxl345_latent_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *ms)
708 {
709  if (handle == NULL) /* check handle */
710  {
711  return 2; /* return error */
712  }
713  if (handle->inited != 1) /* check handle initialization */
714  {
715  return 3; /* return error */
716  }
717 
718  *ms = (float)(reg) * 1.25f; /* convert raw data to real data */
719 
720  return 0; /* success return 0 */
721 }
722 
734 uint8_t adxl345_set_window(adxl345_handle_t *handle, uint8_t t)
735 {
736  if (handle == NULL) /* check handle */
737  {
738  return 2; /* return error */
739  }
740  if (handle->inited != 1) /* check handle initialization */
741  {
742  return 3; /* return error */
743  }
744 
745  return a_adxl345_iic_spi_write(handle, ADXL345_REG_WINDOW, &t, 1); /* write config */
746 }
747 
759 uint8_t adxl345_get_window(adxl345_handle_t *handle, uint8_t *t)
760 {
761  if (handle == NULL) /* check handle */
762  {
763  return 2; /* return error */
764  }
765  if (handle->inited != 1) /* check handle initialization */
766  {
767  return 3; /* return error */
768  }
769 
770  return a_adxl345_iic_spi_read(handle, ADXL345_REG_WINDOW, t, 1); /* read config */
771 }
772 
784 uint8_t adxl345_window_convert_to_register(adxl345_handle_t *handle, float ms, uint8_t *reg)
785 {
786  if (handle == NULL) /* check handle */
787  {
788  return 2; /* return error */
789  }
790  if (handle->inited != 1) /* check handle initialization */
791  {
792  return 3; /* return error */
793  }
794 
795  *reg = (uint8_t)(ms / 1.25f); /* convert real data to register data */
796 
797  return 0; /* success return 0 */
798 }
799 
811 uint8_t adxl345_window_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *ms)
812 {
813  if (handle == NULL) /* check handle */
814  {
815  return 2; /* return error */
816  }
817  if (handle->inited != 1) /* check handle initialization */
818  {
819  return 3; /* return error */
820  }
821 
822  *ms = (float)(reg) * 1.25f; /* convert raw data to real data */
823 
824  return 0; /* success return 0 */
825 }
826 
838 uint8_t adxl345_set_action_threshold(adxl345_handle_t *handle, uint8_t threshold)
839 {
840  if (handle == NULL) /* check handle */
841  {
842  return 2; /* return error */
843  }
844  if (handle->inited != 1) /* check handle initialization */
845  {
846  return 3; /* return error */
847  }
848 
849  return a_adxl345_iic_spi_write(handle, ADXL345_REG_THRESH_ACT, &threshold, 1); /* write config */
850 }
851 
863 uint8_t adxl345_get_action_threshold(adxl345_handle_t *handle, uint8_t *threshold)
864 {
865  if (handle == NULL) /* check handle */
866  {
867  return 2; /* return error */
868  }
869  if (handle->inited != 1) /* check handle initialization */
870  {
871  return 3; /* return error */
872  }
873 
874  return a_adxl345_iic_spi_read(handle, ADXL345_REG_THRESH_ACT, threshold, 1); /* read config */
875 }
876 
888 uint8_t adxl345_action_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
889 {
890  if (handle == NULL) /* check handle */
891  {
892  return 2; /* return error */
893  }
894  if (handle->inited != 1) /* check handle initialization */
895  {
896  return 3; /* return error */
897  }
898 
899  *reg = (uint8_t)(g / 0.0625f); /* convert real data to register data */
900 
901  return 0; /* success return 0 */
902 }
903 
915 uint8_t adxl345_action_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
916 {
917  if (handle == NULL) /* check handle */
918  {
919  return 2; /* return error */
920  }
921  if (handle->inited != 1) /* check handle initialization */
922  {
923  return 3; /* return error */
924  }
925 
926  *g = (float)(reg) * 0.0625f; /* convert raw data to real data */
927 
928  return 0; /* success return 0 */
929 }
930 
942 uint8_t adxl345_set_inaction_threshold(adxl345_handle_t *handle, uint8_t threshold)
943 {
944  if (handle == NULL) /* check handle */
945  {
946  return 2; /* return error */
947  }
948  if (handle->inited != 1) /* check handle initialization */
949  {
950  return 3; /* return error */
951  }
952 
953  return a_adxl345_iic_spi_write(handle, ADXL345_REG_THRESH_INACT, &threshold, 1); /* write config */
954 }
955 
967 uint8_t adxl345_get_inaction_threshold(adxl345_handle_t *handle, uint8_t *threshold)
968 {
969  if (handle == NULL) /* check handle */
970  {
971  return 2; /* return error */
972  }
973  if (handle->inited != 1) /* check handle initialization */
974  {
975  return 3; /* return error */
976  }
977 
978  return a_adxl345_iic_spi_read(handle, ADXL345_REG_THRESH_INACT, threshold, 1); /* read config */
979 }
980 
992 uint8_t adxl345_inaction_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
993 {
994  if (handle == NULL) /* check handle */
995  {
996  return 2; /* return error */
997  }
998  if (handle->inited != 1) /* check handle initialization */
999  {
1000  return 3; /* return error */
1001  }
1002 
1003  *reg = (uint8_t)(g / 0.0625f); /* convert real data to register data */
1004 
1005  return 0; /* success return 0 */
1006 }
1007 
1019 uint8_t adxl345_inaction_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
1020 {
1021  if (handle == NULL) /* check handle */
1022  {
1023  return 2; /* return error */
1024  }
1025  if (handle->inited != 1) /* check handle initialization */
1026  {
1027  return 3; /* return error */
1028  }
1029 
1030  *g = (float)(reg) * 0.0625f; /* convert raw data to real data */
1031 
1032  return 0; /* success return 0 */
1033 }
1034 
1046 uint8_t adxl345_set_inaction_time(adxl345_handle_t *handle, uint8_t t)
1047 {
1048  if (handle == NULL) /* check handle */
1049  {
1050  return 2; /* return error */
1051  }
1052  if (handle->inited != 1) /* check handle initialization */
1053  {
1054  return 3; /* return error */
1055  }
1056 
1057  return a_adxl345_iic_spi_write(handle, ADXL345_REG_TIME_INACT, &t, 1); /* write config */
1058 }
1059 
1071 uint8_t adxl345_get_inaction_time(adxl345_handle_t *handle, uint8_t *t)
1072 {
1073  if (handle == NULL) /* check handle */
1074  {
1075  return 2; /* return error */
1076  }
1077  if (handle->inited != 1) /* check handle initialization */
1078  {
1079  return 3; /* return error */
1080  }
1081 
1082  return a_adxl345_iic_spi_read(handle, ADXL345_REG_TIME_INACT, t, 1); /* read config */
1083 }
1084 
1096 uint8_t adxl345_inaction_time_convert_to_register(adxl345_handle_t *handle, uint8_t s, uint8_t *reg)
1097 {
1098  if (handle == NULL) /* check handle */
1099  {
1100  return 2; /* return error */
1101  }
1102  if (handle->inited != 1) /* check handle initialization */
1103  {
1104  return 3; /* return error */
1105  }
1106 
1107  *reg = s; /* convert real data to register data */
1108 
1109  return 0; /* success return 0 */
1110 }
1111 
1123 uint8_t adxl345_inaction_time_convert_to_data(adxl345_handle_t *handle, uint8_t reg, uint8_t *s)
1124 {
1125  if (handle == NULL) /* check handle */
1126  {
1127  return 2; /* return error */
1128  }
1129  if (handle->inited != 1) /* check handle initialization */
1130  {
1131  return 3; /* return error */
1132  }
1133 
1134  *s = reg; /* convert raw data to real data */
1135 
1136  return 0; /* success return 0 */
1137 }
1138 
1151 uint8_t adxl345_set_action_inaction(adxl345_handle_t *handle, adxl345_action_inaction_t type, adxl345_bool_t enable)
1152 {
1153  uint8_t res, prev;
1154 
1155  if (handle == NULL) /* check handle */
1156  {
1157  return 2; /* return error */
1158  }
1159  if (handle->inited != 1) /* check handle initialization */
1160  {
1161  return 3; /* return error */
1162  }
1163 
1164  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* read config */
1165  if (res != 0) /* check result */
1166  {
1167  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1168 
1169  return 1; /* return error */
1170  }
1171  prev &= ~(1 << type); /* clear type */
1172  prev |= (enable << type); /* set type */
1173 
1174  return a_adxl345_iic_spi_write(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* write config */
1175 }
1176 
1189 uint8_t adxl345_get_action_inaction(adxl345_handle_t *handle, adxl345_action_inaction_t type, adxl345_bool_t *enable)
1190 {
1191  uint8_t res, prev;
1192 
1193  if (handle == NULL) /* check handle */
1194  {
1195  return 2; /* return error */
1196  }
1197  if (handle->inited != 1) /* check handle initialization */
1198  {
1199  return 3; /* return error */
1200  }
1201 
1202  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* read config */
1203  if (res != 0) /* check result */
1204  {
1205  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1206 
1207  return 1; /* return error */
1208  }
1209  prev &= (1 << type); /* get type */
1210  *enable = (adxl345_bool_t)(prev >> type); /* set type */
1211 
1212  return 0; /* success return 0 */
1213 }
1214 
1226 uint8_t adxl345_set_action_coupled(adxl345_handle_t *handle, adxl345_coupled_t coupled)
1227 {
1228  uint8_t res, prev;
1229 
1230  if (handle == NULL) /* check handle */
1231  {
1232  return 2; /* return error */
1233  }
1234  if (handle->inited != 1) /* check handle initialization */
1235  {
1236  return 3; /* return error */
1237  }
1238 
1239  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* read config */
1240  if (res != 0) /* check result */
1241  {
1242  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1243 
1244  return 1; /* return error */
1245  }
1246  prev &= ~(1 << 7); /* clear coupled */
1247  prev |= (coupled << 7); /* set coupled */
1248 
1249  return a_adxl345_iic_spi_write(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* write config */
1250 }
1251 
1263 uint8_t adxl345_get_action_coupled(adxl345_handle_t *handle, adxl345_coupled_t *coupled)
1264 {
1265  uint8_t res, prev;
1266 
1267  if (handle == NULL) /* check handle */
1268  {
1269  return 2; /* return error */
1270  }
1271  if (handle->inited != 1) /* check handle initialization */
1272  {
1273  return 3; /* return error */
1274  }
1275 
1276  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* read config */
1277  if (res != 0) /* check result */
1278  {
1279  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1280 
1281  return 1; /* return error */
1282  }
1283  prev &= (1 << 7); /* clear config */
1284  *coupled = (adxl345_coupled_t)(prev >> 7); /* set config */
1285 
1286  return 0; /* success return 0 */
1287 }
1288 
1300 uint8_t adxl345_set_inaction_coupled(adxl345_handle_t *handle, adxl345_coupled_t coupled)
1301 {
1302  uint8_t res, prev;
1303 
1304  if (handle == NULL) /* check handle */
1305  {
1306  return 2; /* return error */
1307  }
1308  if (handle->inited != 1) /* check handle initialization */
1309  {
1310  return 3; /* return error */
1311  }
1312 
1313  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* read config */
1314  if (res != 0) /* check result */
1315  {
1316  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1317 
1318  return 1; /* return error */
1319  }
1320  prev &= ~(1 << 3); /* clear config */
1321  prev |= (coupled << 3); /* set inaction coupled */
1322 
1323  return a_adxl345_iic_spi_write(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* write config */
1324 }
1325 
1337 uint8_t adxl345_get_inaction_coupled(adxl345_handle_t *handle, adxl345_coupled_t *coupled)
1338 {
1339  uint8_t res, prev;
1340 
1341  if (handle == NULL) /* check handle */
1342  {
1343  return 2; /* return error */
1344  }
1345  if (handle->inited != 1) /* check handle initialization */
1346  {
1347  return 3; /* return error */
1348  }
1349 
1350  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_ACT_INACT_CTL, (uint8_t *)&prev, 1); /* read config */
1351  if (res != 0) /* check result */
1352  {
1353  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1354 
1355  return 1; /* return error */
1356  }
1357  prev &= (1 << 3); /* clear config */
1358  *coupled = (adxl345_coupled_t)(prev >> 3); /* get inaction coupled */
1359 
1360  return 0; /* success return 0 */
1361 }
1362 
1374 uint8_t adxl345_set_free_fall_threshold(adxl345_handle_t *handle, uint8_t threshold)
1375 {
1376  if (handle == NULL) /* check handle */
1377  {
1378  return 2; /* return error */
1379  }
1380  if (handle->inited != 1) /* check handle initialization */
1381  {
1382  return 3; /* return error */
1383  }
1384 
1385  return a_adxl345_iic_spi_write(handle, ADXL345_REG_THRESH_FF, &threshold, 1); /* write config */
1386 }
1387 
1399 uint8_t adxl345_get_free_fall_threshold(adxl345_handle_t *handle, uint8_t *threshold)
1400 {
1401  if (handle == NULL) /* check handle */
1402  {
1403  return 2; /* return error */
1404  }
1405  if (handle->inited != 1) /* check handle initialization */
1406  {
1407  return 3; /* return error */
1408  }
1409 
1410  return a_adxl345_iic_spi_read(handle, ADXL345_REG_THRESH_FF, threshold, 1); /* read config */
1411 }
1412 
1424 uint8_t adxl345_free_fall_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
1425 {
1426  if (handle == NULL) /* check handle */
1427  {
1428  return 2; /* return error */
1429  }
1430  if (handle->inited != 1) /* check handle initialization */
1431  {
1432  return 3; /* return error */
1433  }
1434 
1435  *reg = (uint8_t)(g / 0.0625f); /* convert real data to register data */
1436 
1437  return 0; /* success return 0 */
1438 }
1439 
1451 uint8_t adxl345_free_fall_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
1452 {
1453  if (handle == NULL) /* check handle */
1454  {
1455  return 2; /* return error */
1456  }
1457  if (handle->inited != 1) /* check handle initialization */
1458  {
1459  return 3; /* return error */
1460  }
1461 
1462  *g = (float)(reg) * 0.0625f; /* convert raw data to real data */
1463 
1464  return 0; /* success return 0 */
1465 }
1466 
1478 uint8_t adxl345_set_free_fall_time(adxl345_handle_t *handle, uint8_t t)
1479 {
1480  if (handle == NULL) /* check handle */
1481  {
1482  return 2; /* return error */
1483  }
1484  if (handle->inited != 1) /* check handle initialization */
1485  {
1486  return 3; /* return error */
1487  }
1488 
1489  return a_adxl345_iic_spi_write(handle, ADXL345_REG_TIME_FF, &t, 1); /* write config */
1490 }
1491 
1503 uint8_t adxl345_get_free_fall_time(adxl345_handle_t *handle, uint8_t *t)
1504 {
1505  if (handle == NULL) /* check handle */
1506  {
1507  return 2; /* return error */
1508  }
1509  if (handle->inited != 1) /* check handle initialization */
1510  {
1511  return 3; /* return error */
1512  }
1513 
1514  return a_adxl345_iic_spi_read(handle, ADXL345_REG_TIME_FF, t, 1); /* read config */
1515 }
1516 
1528 uint8_t adxl345_free_fall_time_convert_to_register(adxl345_handle_t *handle, uint16_t ms, uint8_t *reg)
1529 {
1530  if (handle == NULL) /* check handle */
1531  {
1532  return 2; /* return error */
1533  }
1534  if (handle->inited != 1) /* check handle initialization */
1535  {
1536  return 3; /* return error */
1537  }
1538 
1539  *reg = (uint8_t)(ms / 5); /* convert real data to register data */
1540 
1541  return 0; /* success return 0 */
1542 }
1543 
1555 uint8_t adxl345_free_fall_time_convert_to_data(adxl345_handle_t *handle, uint8_t reg, uint16_t *ms)
1556 {
1557  if (handle == NULL) /* check handle */
1558  {
1559  return 2; /* return error */
1560  }
1561  if (handle->inited != 1) /* check handle initialization */
1562  {
1563  return 3; /* return error */
1564  }
1565 
1566  *ms = reg * 5; /* convert raw data to real data */
1567 
1568  return 0; /* success return 0 */
1569 }
1570 
1583 uint8_t adxl345_set_tap_axis(adxl345_handle_t *handle, adxl345_tap_axis_t axis, adxl345_bool_t enable)
1584 {
1585  uint8_t res, prev;
1586 
1587  if (handle == NULL) /* check handle */
1588  {
1589  return 2; /* return error */
1590  }
1591  if (handle->inited != 1) /* check handle initialization */
1592  {
1593  return 3; /* return error */
1594  }
1595 
1596  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_TAP_AXES, (uint8_t *)&prev, 1); /* read config */
1597  if (res != 0) /* check result */
1598  {
1599  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1600 
1601  return 1; /* return error */
1602  }
1603  prev &= ~(1 << axis); /* clear axis */
1604  prev |= enable << axis; /* set axis */
1605 
1606  return a_adxl345_iic_spi_write(handle, ADXL345_REG_TAP_AXES, (uint8_t *)&prev, 1); /* write config */
1607 }
1608 
1621 uint8_t adxl345_get_tap_axis(adxl345_handle_t *handle, adxl345_tap_axis_t axis, adxl345_bool_t *enable)
1622 {
1623  uint8_t res, prev;
1624 
1625  if (handle == NULL) /* check handle */
1626  {
1627  return 2; /* return error */
1628  }
1629  if (handle->inited != 1) /* check handle initialization */
1630  {
1631  return 3; /* return error */
1632  }
1633 
1634  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_TAP_AXES, (uint8_t *)&prev, 1); /* read config */
1635  if (res != 0) /* check result */
1636  {
1637  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1638 
1639  return 1; /* return error */
1640  }
1641  prev &= (1 << axis); /* clear axis */
1642  *enable = (adxl345_bool_t)(prev >> axis); /* set axis */
1643 
1644  return 0; /* success return 0 */
1645 }
1646 
1658 uint8_t adxl345_set_tap_suppress(adxl345_handle_t *handle, adxl345_bool_t enable)
1659 {
1660  uint8_t res, prev;
1661 
1662  if (handle == NULL) /* check handle */
1663  {
1664  return 2; /* return error */
1665  }
1666  if (handle->inited != 1) /* check handle initialization */
1667  {
1668  return 3; /* return error */
1669  }
1670 
1671  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_TAP_AXES, (uint8_t *)&prev, 1); /* read config */
1672  if (res != 0) /* check result */
1673  {
1674  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1675 
1676  return 1; /* return error */
1677  }
1678  prev &= ~(1 << 3); /* clear suppress */
1679  prev |= enable << 3; /* set suppress */
1680 
1681  return a_adxl345_iic_spi_write(handle, ADXL345_REG_TAP_AXES, (uint8_t *)&prev, 1); /* write config */
1682 }
1683 
1695 uint8_t adxl345_get_tap_suppress(adxl345_handle_t *handle, adxl345_bool_t *enable)
1696 {
1697  uint8_t res, prev;
1698 
1699  if (handle == NULL) /* check handle */
1700  {
1701  return 2; /* return error */
1702  }
1703  if (handle->inited != 1) /* check handle initialization */
1704  {
1705  return 3; /* return error */
1706  }
1707 
1708  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_TAP_AXES, (uint8_t *)&prev, 1); /* read config */
1709  if (res != 0) /* check result */
1710  {
1711  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1712 
1713  return 1; /* return error */
1714  }
1715  prev &= (1 << 3); /* clear config */
1716  *enable = (adxl345_bool_t)(prev >> 3); /* set config */
1717 
1718  return 0; /* success return 0 */
1719 }
1720 
1732 uint8_t adxl345_get_tap_status(adxl345_handle_t *handle, uint8_t *status)
1733 {
1734  if (handle == NULL) /* check handle */
1735  {
1736  return 2; /* return error */
1737  }
1738  if (handle->inited != 1) /* check handle initialization */
1739  {
1740  return 3; /* return error */
1741  }
1742 
1743  return a_adxl345_iic_spi_read(handle, ADXL345_REG_ACT_TAP_STATUS, (uint8_t *)status, 1); /* read config */
1744 }
1745 
1757 uint8_t adxl345_set_rate(adxl345_handle_t *handle, adxl345_rate_t rate)
1758 {
1759  uint8_t res, prev;
1760 
1761  if (handle == NULL) /* check handle */
1762  {
1763  return 2; /* return error */
1764  }
1765  if (handle->inited != 1) /* check handle initialization */
1766  {
1767  return 3; /* return error */
1768  }
1769 
1770  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_BW_RATE, (uint8_t *)&prev, 1); /* read config */
1771  if (res != 0) /* check result */
1772  {
1773  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1774 
1775  return 1; /* return error */
1776  }
1777  prev &= ~(0x1F); /* clear rate */
1778  prev |= rate; /* set rate */
1779 
1780  return a_adxl345_iic_spi_write(handle, ADXL345_REG_BW_RATE, (uint8_t *)&prev, 1); /* write config */
1781 }
1782 
1794 uint8_t adxl345_get_rate(adxl345_handle_t *handle, adxl345_rate_t *rate)
1795 {
1796  uint8_t res, prev;
1797 
1798  if (handle == NULL) /* check handle */
1799  {
1800  return 2; /* return error */
1801  }
1802  if (handle->inited != 1) /* check handle initialization */
1803  {
1804  return 3; /* return error */
1805  }
1806 
1807  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_BW_RATE, (uint8_t *)&prev, 1); /* read config */
1808  if (res != 0) /* check result */
1809  {
1810  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1811 
1812  return 1; /* return error */
1813  }
1814  prev &= 0x1F; /* clear config */
1815  *rate = (adxl345_rate_t)(prev); /* get rate */
1816 
1817  return 0; /* success return 0 */
1818 }
1819 
1832 uint8_t adxl345_set_interrupt(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_bool_t enable)
1833 {
1834  uint8_t res, prev;
1835 
1836  if (handle == NULL) /* check handle */
1837  {
1838  return 2; /* return error */
1839  }
1840  if (handle->inited != 1) /* check handle initialization */
1841  {
1842  return 3; /* return error */
1843  }
1844 
1845  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_INT_ENABLE, (uint8_t *)&prev, 1); /* read config */
1846  if (res != 0) /* check result */
1847  {
1848  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1849 
1850  return 1; /* return error */
1851  }
1852  prev &= ~(1 << type); /* clear interrupt */
1853  prev |= enable << type; /* set interrupt */
1854 
1855  return a_adxl345_iic_spi_write(handle, ADXL345_REG_INT_ENABLE, (uint8_t *)&prev, 1); /* write config */
1856 }
1857 
1870 uint8_t adxl345_get_interrupt(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_bool_t *enable)
1871 {
1872  uint8_t res, prev;
1873 
1874  if (handle == NULL) /* check handle */
1875  {
1876  return 2; /* return error */
1877  }
1878  if (handle->inited != 1) /* check handle initialization */
1879  {
1880  return 3; /* return error */
1881  }
1882 
1883  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_INT_ENABLE, (uint8_t *)&prev, 1); /* read config */
1884  if (res != 0) /* check result */
1885  {
1886  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1887 
1888  return 1; /* return error */
1889  }
1890  prev &= (1 << type); /* clear config */
1891  *enable = (adxl345_bool_t)(prev >> type); /* set config */
1892 
1893  return 0; /* success return 0 */
1894 }
1895 
1908 uint8_t adxl345_set_interrupt_map(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_interrupt_pin_t pin)
1909 {
1910  uint8_t res, prev;
1911 
1912  if (handle == NULL) /* check handle */
1913  {
1914  return 2; /* return error */
1915  }
1916  if (handle->inited != 1) /* check handle initialization */
1917  {
1918  return 3; /* return error */
1919  }
1920 
1921  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_INT_MAP, (uint8_t *)&prev, 1); /* read config */
1922  if (res != 0) /* check result */
1923  {
1924  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1925 
1926  return 1; /* return error */
1927  }
1928  prev &= ~(1 << type); /* clear type */
1929  prev |= pin << type; /* set interrupt map */
1930 
1931  return a_adxl345_iic_spi_write(handle, ADXL345_REG_INT_MAP, (uint8_t *)&prev, 1); /* write config */
1932 }
1933 
1946 uint8_t adxl345_get_interrupt_map(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_interrupt_pin_t *pin)
1947 {
1948  uint8_t res, prev;
1949 
1950  if (handle == NULL) /* check handle */
1951  {
1952  return 2; /* return error */
1953  }
1954  if (handle->inited != 1) /* check handle initialization */
1955  {
1956  return 3; /* return error */
1957  }
1958 
1959  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_INT_MAP, (uint8_t *)&prev, 1); /* read config */
1960  if (res != 0) /* check result */
1961  {
1962  handle->debug_print("adxl345: read failed.\n"); /* read failed */
1963 
1964  return 1; /* return error */
1965  }
1966  prev &= (1 << type); /* clear config */
1967  *pin = (adxl345_interrupt_pin_t)(prev >> type); /* set interrupt map */
1968 
1969  return 0; /* success return 0 */
1970 }
1971 
1983 uint8_t adxl345_get_interrupt_source(adxl345_handle_t *handle, uint8_t *source)
1984 {
1985  if (handle == NULL) /* check handle */
1986  {
1987  return 2; /* return error */
1988  }
1989  if (handle->inited != 1) /* check handle initialization */
1990  {
1991  return 3; /* return error */
1992  }
1993 
1994  return a_adxl345_iic_spi_read(handle, ADXL345_REG_INT_SOURCE, (uint8_t *)source, 1); /* read config */
1995 }
1996 
2008 uint8_t adxl345_set_self_test(adxl345_handle_t *handle, adxl345_bool_t enable)
2009 {
2010  uint8_t res, prev;
2011 
2012  if (handle == NULL) /* check handle */
2013  {
2014  return 2; /* return error */
2015  }
2016  if (handle->inited != 1) /* check handle initialization */
2017  {
2018  return 3; /* return error */
2019  }
2020 
2021  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2022  if (res != 0) /* check result */
2023  {
2024  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2025 
2026  return 1; /* return error */
2027  }
2028  prev &= ~(1 << 7); /* clear config */
2029  prev |= (enable << 7); /* set self test */
2030 
2031  return a_adxl345_iic_spi_write(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* write config */
2032 }
2033 
2045 uint8_t adxl345_get_self_test(adxl345_handle_t *handle, adxl345_bool_t *enable)
2046 {
2047  uint8_t res, prev;
2048 
2049  if (handle == NULL) /* check handle */
2050  {
2051  return 2; /* return error */
2052  }
2053  if (handle->inited != 1) /* check handle initialization */
2054  {
2055  return 3; /* return error */
2056  }
2057 
2058  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2059  if (res != 0) /* check result */
2060  {
2061  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2062 
2063  return 1; /* return error */
2064  }
2065  prev &= (1 << 7); /* clear config */
2066  *enable = (adxl345_bool_t)(prev >> 7); /* set self test */
2067 
2068  return 0; /* success return 0 */
2069 }
2070 
2082 uint8_t adxl345_set_spi_wire(adxl345_handle_t *handle, adxl345_spi_wire_t wire)
2083 {
2084  uint8_t res, prev;
2085 
2086  if (handle == NULL) /* check handle */
2087  {
2088  return 2; /* return error */
2089  }
2090  if (handle->inited != 1) /* check handle initialization */
2091  {
2092  return 3; /* return error */
2093  }
2094 
2095  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2096  if (res != 0) /* check result */
2097  {
2098  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2099 
2100  return 1; /* return error */
2101  }
2102  prev &= ~(1 << 6); /* clear config */
2103  prev |= (wire << 6); /* set wire */
2104 
2105  return a_adxl345_iic_spi_write(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* write config */
2106 }
2107 
2119 uint8_t adxl345_get_spi_wire(adxl345_handle_t *handle, adxl345_spi_wire_t *wire)
2120 {
2121  uint8_t res, prev;
2122 
2123  if (handle == NULL) /* check handle */
2124  {
2125  return 2; /* return error */
2126  }
2127  if (handle->inited != 1) /* check handle initialization */
2128  {
2129  return 3; /* return error */
2130  }
2131 
2132  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2133  if (res != 0) /* check result */
2134  {
2135  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2136 
2137  return 1; /* return error */
2138  }
2139  prev &= (1 << 6); /* clear config */
2140  *wire = (adxl345_spi_wire_t)(prev >> 6); /* set wire */
2141 
2142  return 0; /* success return 0 */
2143 }
2144 
2156 uint8_t adxl345_set_interrupt_active_level(adxl345_handle_t *handle, adxl345_interrupt_active_level_t active_level)
2157 {
2158  uint8_t res, prev;
2159 
2160  if (handle == NULL) /* check handle */
2161  {
2162  return 2; /* return error */
2163  }
2164  if (handle->inited != 1) /* check handle initialization */
2165  {
2166  return 3; /* return error */
2167  }
2168 
2169  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2170  if (res != 0) /* check result */
2171  {
2172  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2173 
2174  return 1; /* return error */
2175  }
2176  prev &= ~(1 << 5); /* clear config */
2177  prev |= (active_level << 5); /* set active level */
2178 
2179  return a_adxl345_iic_spi_write(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* write config */
2180 }
2181 
2193 uint8_t adxl345_get_interrupt_active_level(adxl345_handle_t *handle, adxl345_interrupt_active_level_t *active_level)
2194 {
2195  uint8_t res, prev;
2196 
2197  if (handle == NULL) /* check handle */
2198  {
2199  return 2; /* return error */
2200  }
2201  if (handle->inited != 1) /* check handle initialization */
2202  {
2203  return 3; /* return error */
2204  }
2205 
2206  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2207  if (res != 0) /* check result */
2208  {
2209  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2210 
2211  return 1; /* return error */
2212  }
2213  prev &= (1 << 5); /* get config */
2214  *active_level = (adxl345_interrupt_active_level_t)(prev >> 5); /* get active level */
2215 
2216  return 0; /* success return 0 */
2217 }
2218 
2230 uint8_t adxl345_set_full_resolution(adxl345_handle_t *handle, adxl345_bool_t enable)
2231 {
2232  uint8_t res, prev;
2233 
2234  if (handle == NULL) /* check handle */
2235  {
2236  return 2; /* return error */
2237  }
2238  if (handle->inited != 1) /* check handle initialization */
2239  {
2240  return 3; /* return error */
2241  }
2242 
2243  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2244  if (res != 0) /* check result */
2245  {
2246  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2247 
2248  return 1; /* return error */
2249  }
2250  prev &= ~(1 << 3); /* clear resolution */
2251  prev |= (enable << 3); /* set resolution */
2252 
2253  return a_adxl345_iic_spi_write(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* write config */
2254 }
2255 
2267 uint8_t adxl345_get_full_resolution(adxl345_handle_t *handle, adxl345_bool_t *enable)
2268 {
2269  uint8_t res, prev;
2270 
2271  if (handle == NULL) /* check handle */
2272  {
2273  return 2; /* return error */
2274  }
2275  if (handle->inited != 1) /* check handle initialization */
2276  {
2277  return 3; /* return error */
2278  }
2279 
2280  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2281  if (res != 0) /* check result */
2282  {
2283  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2284 
2285  return 1; /* return error */
2286  }
2287  prev &= (1 << 3); /* clear config */
2288  *enable = (adxl345_bool_t)(prev >> 3); /* set resolution */
2289 
2290  return 0; /* success return 0 */
2291 }
2292 
2304 uint8_t adxl345_set_justify(adxl345_handle_t *handle, adxl345_justify_t enable)
2305 {
2306  uint8_t res, prev;
2307 
2308  if (handle == NULL) /* check handle */
2309  {
2310  return 2; /* return error */
2311  }
2312  if (handle->inited != 1) /* check handle initialization */
2313  {
2314  return 3; /* return error */
2315  }
2316 
2317  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2318  if (res != 0) /* check result */
2319  {
2320  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2321 
2322  return 1; /* return error */
2323  }
2324  prev &= ~(1 << 2); /* clear config */
2325  prev |= (enable << 2); /* set justify */
2326 
2327  return a_adxl345_iic_spi_write(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* write config */
2328 }
2329 
2341 uint8_t adxl345_get_justify(adxl345_handle_t *handle, adxl345_justify_t *enable)
2342 {
2343  uint8_t res, prev;
2344 
2345  if (handle == NULL) /* check handle */
2346  {
2347  return 2; /* return error */
2348  }
2349  if (handle->inited != 1) /* check handle initialization */
2350  {
2351  return 3; /* return error */
2352  }
2353 
2354  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2355  if (res != 0) /* check result */
2356  {
2357  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2358 
2359  return 1; /* return error */
2360  }
2361  prev &= (1 << 2); /* get config */
2362  *enable = (adxl345_justify_t)(prev >> 2); /* get justify */
2363 
2364  return 0; /* success return 0 */
2365 }
2366 
2378 uint8_t adxl345_set_range(adxl345_handle_t *handle, adxl345_range_t range)
2379 {
2380  uint8_t res, prev;
2381 
2382  if (handle == NULL) /* check handle */
2383  {
2384  return 2; /* return error */
2385  }
2386  if (handle->inited != 1) /* check handle initialization */
2387  {
2388  return 3; /* return error */
2389  }
2390 
2391  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2392  if (res != 0) /* check result */
2393  {
2394  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2395 
2396  return 1; /* return error */
2397  }
2398  prev &= ~(3 << 0); /* clear config */
2399  prev |= (range << 0); /* set range */
2400 
2401  return a_adxl345_iic_spi_write(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* write config */
2402 }
2403 
2415 uint8_t adxl345_get_range(adxl345_handle_t *handle, adxl345_range_t *range)
2416 {
2417  uint8_t res, prev;
2418 
2419  if (handle == NULL) /* check handle */
2420  {
2421  return 2; /* return error */
2422  }
2423  if (handle->inited != 1) /* check handle initialization */
2424  {
2425  return 3; /* return error */
2426  }
2427 
2428  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
2429  if (res != 0) /* check result */
2430  {
2431  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2432 
2433  return 1; /* return error */
2434  }
2435  prev &= (3 << 0); /* get config */
2436  *range = (adxl345_range_t)(prev >> 0); /* set range */
2437 
2438  return 0; /* success return 0 */
2439 }
2440 
2452 uint8_t adxl345_set_mode(adxl345_handle_t *handle, adxl345_mode_t mode)
2453 {
2454  uint8_t res, prev;
2455 
2456  if (handle == NULL) /* check handle */
2457  {
2458  return 2; /* return error */
2459  }
2460  if (handle->inited != 1) /* check handle initialization */
2461  {
2462  return 3; /* return error */
2463  }
2464 
2465  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* read config */
2466  if (res != 0) /* check result */
2467  {
2468  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2469 
2470  return 1; /* return error */
2471  }
2472  prev &= ~(3 << 6); /* clear config */
2473  prev |= (mode << 6); /* set mode */
2474 
2475  return a_adxl345_iic_spi_write(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* write config */
2476 }
2477 
2489 uint8_t adxl345_get_mode(adxl345_handle_t *handle, adxl345_mode_t *mode)
2490 {
2491  uint8_t res, prev;
2492 
2493  if (handle == NULL) /* check handle */
2494  {
2495  return 2; /* return error */
2496  }
2497  if (handle->inited != 1) /* check handle initialization */
2498  {
2499  return 3; /* return error */
2500  }
2501 
2502  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* read config */
2503  if (res != 0) /* check result */
2504  {
2505  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2506 
2507  return 1; /* return error */
2508  }
2509  prev &= (3 << 6); /* get config */
2510  *mode = (adxl345_mode_t)(prev >> 6); /* set mode */
2511 
2512  return 0; /* success return 0 */
2513 }
2514 
2526 uint8_t adxl345_set_trigger_pin(adxl345_handle_t *handle, adxl345_interrupt_pin_t pin)
2527 {
2528  uint8_t res, prev;
2529 
2530  if (handle == NULL) /* check handle */
2531  {
2532  return 2; /* return error */
2533  }
2534  if (handle->inited != 1) /* check handle initialization */
2535  {
2536  return 3; /* return error */
2537  }
2538 
2539  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* read config */
2540  if (res != 0) /* check result */
2541  {
2542  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2543 
2544  return 1; /* return error */
2545  }
2546  prev &= ~(1 << 5); /* clear config */
2547  prev |= (pin << 5); /* set pin */
2548 
2549  return a_adxl345_iic_spi_write(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* write config */
2550 }
2551 
2563 uint8_t adxl345_get_trigger_pin(adxl345_handle_t *handle, adxl345_interrupt_pin_t *pin)
2564 {
2565  uint8_t res, prev;
2566 
2567  if (handle == NULL) /* check handle */
2568  {
2569  return 2; /* return error */
2570  }
2571  if (handle->inited != 1) /* check handle initialization */
2572  {
2573  return 3; /* return error */
2574  }
2575 
2576  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* read config */
2577  if (res != 0) /* check result */
2578  {
2579  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2580 
2581  return 1; /* return error */
2582  }
2583  prev &= (1 << 5); /* clear config */
2584  *pin = (adxl345_interrupt_pin_t)(prev >> 5); /* set pin */
2585 
2586  return 0; /* success return 0 */
2587 }
2588 
2600 uint8_t adxl345_set_watermark(adxl345_handle_t *handle, uint8_t level)
2601 {
2602  uint8_t res, prev;
2603 
2604  if (handle == NULL) /* check handle */
2605  {
2606  return 2; /* return error */
2607  }
2608  if (handle->inited != 1) /* check handle initialization */
2609  {
2610  return 3; /* return error */
2611  }
2612 
2613  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* read config */
2614  if (res != 0) /* check result */
2615  {
2616  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2617 
2618  return 1; /* return error */
2619  }
2620  prev &= ~(0x1F); /* clear config */
2621  prev |= (level & 0x1F); /* set watermark */
2622 
2623  return a_adxl345_iic_spi_write(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* write config */
2624 }
2625 
2637 uint8_t adxl345_get_watermark(adxl345_handle_t *handle, uint8_t *level)
2638 {
2639  uint8_t res, prev;
2640 
2641  if (handle == NULL) /* check handle */
2642  {
2643  return 2; /* return error */
2644  }
2645  if (handle->inited != 1) /* check handle initialization */
2646  {
2647  return 3; /* return error */
2648  }
2649 
2650  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* read config */
2651  if (res != 0) /* check result */
2652  {
2653  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2654 
2655  return 1; /* return error */
2656  }
2657  prev &= (0x1F); /* get config */
2658  *level = prev & 0x1F; /* get watermark */
2659 
2660  return 0; /* success return 0 */
2661 }
2662 
2674 uint8_t adxl345_get_watermark_level(adxl345_handle_t *handle, uint8_t *level)
2675 {
2676  uint8_t res, prev;
2677 
2678  if (handle == NULL) /* check handle */
2679  {
2680  return 2; /* return error */
2681  }
2682  if (handle->inited != 1) /* check handle initialization */
2683  {
2684  return 3; /* return error */
2685  }
2686 
2687  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_STATUS, (uint8_t *)&prev, 1); /* read config */
2688  if (res != 0) /* check result */
2689  {
2690  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2691 
2692  return 1; /* return error */
2693  }
2694  prev &= (0x3F); /* get config */
2695  *level = prev & 0x3F; /* get level */
2696 
2697  return 0; /* success return 0 */
2698 }
2699 
2711 uint8_t adxl345_get_trigger_status(adxl345_handle_t *handle, adxl345_trigger_status_t *status)
2712 {
2713  uint8_t res, prev;
2714 
2715  if (handle == NULL) /* check handle */
2716  {
2717  return 2; /* return error */
2718  }
2719  if (handle->inited != 1) /* check handle initialization */
2720  {
2721  return 3; /* return error */
2722  }
2723 
2724  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_STATUS, (uint8_t *)&prev, 1); /* read config */
2725  if (res != 0) /* check result */
2726  {
2727  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2728 
2729  return 1; /* return error */
2730  }
2731  prev &= (1 << 7); /* get config */
2732  *status = (adxl345_trigger_status_t)((prev >> 7) & 0x01); /* get status */
2733 
2734  return 0; /* success return 0 */
2735 }
2736 
2748 uint8_t adxl345_set_link_activity_inactivity(adxl345_handle_t *handle, adxl345_bool_t enable)
2749 {
2750  uint8_t res, prev;
2751 
2752  if (handle == NULL) /* check handle */
2753  {
2754  return 2; /* return error */
2755  }
2756  if (handle->inited != 1) /* check handle initialization */
2757  {
2758  return 3; /* return error */
2759  }
2760 
2761  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
2762  if (res != 0) /* check result */
2763  {
2764  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2765 
2766  return 1; /* return error */
2767  }
2768  prev &= ~(1 << 5); /* clear config */
2769  prev |= enable << 5; /* set enable */
2770 
2771  return a_adxl345_iic_spi_write(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* write config */
2772 }
2773 
2785 uint8_t adxl345_get_link_activity_inactivity(adxl345_handle_t *handle, adxl345_bool_t *enable)
2786 {
2787  uint8_t res, prev;
2788 
2789  if (handle == NULL) /* check handle */
2790  {
2791  return 2; /* return error */
2792  }
2793  if (handle->inited != 1) /* check handle initialization */
2794  {
2795  return 3; /* return error */
2796  }
2797 
2798  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
2799  if (res != 0) /* check result */
2800  {
2801  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2802 
2803  return 1; /* return error */
2804  }
2805  prev &= 1 << 5; /* get config */
2806  *enable = (adxl345_bool_t)(prev >> 5); /* get enable */
2807 
2808  return 0; /* success return 0 */
2809 }
2810 
2822 uint8_t adxl345_set_auto_sleep(adxl345_handle_t *handle, adxl345_bool_t enable)
2823 {
2824  uint8_t res, prev;
2825 
2826  if (handle == NULL) /* check handle */
2827  {
2828  return 2; /* return error */
2829  }
2830  if (handle->inited != 1) /* check handle initialization */
2831  {
2832  return 3; /* return error */
2833  }
2834 
2835  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
2836  if (res != 0) /* check result */
2837  {
2838  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2839 
2840  return 1; /* return error */
2841  }
2842  prev &= ~(1 << 4); /* get config */
2843  prev |= enable << 4; /* set enable */
2844 
2845  return a_adxl345_iic_spi_write(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* write config */
2846 }
2847 
2859 uint8_t adxl345_get_auto_sleep(adxl345_handle_t *handle, adxl345_bool_t *enable)
2860 {
2861  uint8_t res, prev;
2862 
2863  if (handle == NULL) /* check handle */
2864  {
2865  return 2; /* return error */
2866  }
2867  if (handle->inited != 1) /* check handle initialization */
2868  {
2869  return 3; /* return error */
2870  }
2871 
2872  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
2873  if (res != 0) /* check result */
2874  {
2875  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2876 
2877  return 1; /* return error */
2878  }
2879  prev &= 1 << 4; /* get config */
2880  *enable = (adxl345_bool_t)(prev >> 4); /* get auto sleep */
2881 
2882  return 0; /* success return 0 */
2883 }
2884 
2896 uint8_t adxl345_set_measure(adxl345_handle_t *handle, adxl345_bool_t enable)
2897 {
2898  uint8_t res, prev;
2899 
2900  if (handle == NULL) /* check handle */
2901  {
2902  return 2; /* return error */
2903  }
2904  if (handle->inited != 1) /* check handle initialization */
2905  {
2906  return 3; /* return error */
2907  }
2908 
2909  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
2910  if (res != 0) /* check result */
2911  {
2912  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2913 
2914  return 1; /* return error */
2915  }
2916  prev &= ~(1 << 3); /* clear config */
2917  prev |= enable << 3; /* set measure */
2918 
2919  return a_adxl345_iic_spi_write(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* write config */
2920 }
2921 
2933 uint8_t adxl345_get_measure(adxl345_handle_t *handle, adxl345_bool_t *enable)
2934 {
2935  uint8_t res, prev;
2936 
2937  if (handle == NULL) /* check handle */
2938  {
2939  return 2; /* return error */
2940  }
2941  if (handle->inited != 1) /* check handle initialization */
2942  {
2943  return 3; /* return error */
2944  }
2945 
2946  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
2947  if (res != 0) /* check result */
2948  {
2949  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2950 
2951  return 1; /* return error */
2952  }
2953  prev &= 1 << 3; /* get config */
2954  *enable = (adxl345_bool_t)(prev >> 3); /* get measure */
2955 
2956  return 0; /* success return 0 */
2957 }
2958 
2970 uint8_t adxl345_set_sleep(adxl345_handle_t *handle, adxl345_bool_t enable)
2971 {
2972  uint8_t res, prev;
2973 
2974  if (handle == NULL) /* check handle */
2975  {
2976  return 2; /* return error */
2977  }
2978  if (handle->inited != 1) /* check handle initialization */
2979  {
2980  return 3; /* return error */
2981  }
2982 
2983  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
2984  if (res != 0) /* check result */
2985  {
2986  handle->debug_print("adxl345: read failed.\n"); /* read failed */
2987 
2988  return 1; /* return error */
2989  }
2990  prev &= ~(1 << 2); /* clear config */
2991  prev |= enable << 2; /* set sleep */
2992 
2993  return a_adxl345_iic_spi_write(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* write config */
2994 }
2995 
3007 uint8_t adxl345_get_sleep(adxl345_handle_t *handle, adxl345_bool_t *enable)
3008 {
3009  uint8_t res, prev;
3010 
3011  if (handle == NULL) /* check handle */
3012  {
3013  return 2; /* return error */
3014  }
3015  if (handle->inited != 1) /* check handle initialization */
3016  {
3017  return 3; /* return error */
3018  }
3019 
3020  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
3021  if (res != 0) /* check result */
3022  {
3023  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3024 
3025  return 1; /* return error */
3026  }
3027  prev &= 1 << 2; /* get config */
3028  *enable = (adxl345_bool_t)(prev >> 2); /* get sleep */
3029 
3030  return 0; /* success return 0 */
3031 }
3032 
3044 uint8_t adxl345_set_sleep_frequency(adxl345_handle_t *handle, adxl345_sleep_frequency_t sleep_frequency)
3045 {
3046  uint8_t res, prev;
3047 
3048  if (handle == NULL) /* check handle */
3049  {
3050  return 2; /* return error */
3051  }
3052  if (handle->inited != 1) /* check handle initialization */
3053  {
3054  return 3; /* return error */
3055  }
3056 
3057  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
3058  if (res != 0) /* check result */
3059  {
3060  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3061 
3062  return 1; /* return error */
3063  }
3064  prev &= ~0x03; /* clear config */
3065  prev |= sleep_frequency; /* set frequency */
3066 
3067  return a_adxl345_iic_spi_write(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* write config */
3068 }
3069 
3081 uint8_t adxl345_get_sleep_frequency(adxl345_handle_t *handle, adxl345_sleep_frequency_t *sleep_frequency)
3082 {
3083  uint8_t res, prev;
3084 
3085  if (handle == NULL) /* check handle */
3086  {
3087  return 2; /* return error */
3088  }
3089  if (handle->inited != 1) /* check handle initialization */
3090  {
3091  return 3; /* return error */
3092  }
3093 
3094  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
3095  if (res != 0) /* check result */
3096  {
3097  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3098 
3099  return 1; /* return error */
3100  }
3101  prev &= 0x03; /* get config */
3102  *sleep_frequency = (adxl345_sleep_frequency_t)(prev & 0x03); /* get frequency */
3103 
3104  return 0; /* success return 0 */
3105 }
3106 
3115 static uint8_t a_adxl345_close(adxl345_handle_t *handle)
3116 {
3117  if (handle->iic_spi == ADXL345_INTERFACE_IIC) /* iic interface */
3118  {
3119  if (handle->iic_deinit() != 0) /* iic deinit */
3120  {
3121  handle->debug_print("adxl345: iic deinit failed.\n"); /* iic deinit failed */
3122 
3123  return 1; /* return error */
3124  }
3125  else
3126  {
3127  return 0; /* success return 0 */
3128  }
3129  }
3130  else /* spi interface */
3131  {
3132  if (handle->spi_deinit() != 0) /* spi deinit */
3133  {
3134  handle->debug_print("adxl345: spi deinit failed.\n"); /* spi deinit failed */
3135 
3136  return 1; /* return error */
3137  }
3138  else
3139  {
3140  return 0; /* success return 0 */
3141  }
3142  }
3143 }
3144 
3156 uint8_t adxl345_init(adxl345_handle_t *handle)
3157 {
3158  uint8_t id;
3159 
3160  if (handle == NULL) /* check handle */
3161  {
3162  return 2; /* return error */
3163  }
3164  if (handle->debug_print == NULL) /* check debug_print */
3165  {
3166  return 3; /* return error */
3167  }
3168  if (handle->iic_init == NULL) /* check iic_init */
3169  {
3170  handle->debug_print("adxl345: iic_init is null.\n"); /* iic_init is null */
3171 
3172  return 3; /* return error */
3173  }
3174  if (handle->iic_deinit == NULL) /* check iic_deinit */
3175  {
3176  handle->debug_print("adxl345: iic_deinit is null.\n"); /* iic_deinit is null */
3177 
3178  return 3; /* return error */
3179  }
3180  if (handle->iic_read == NULL) /* check iic_read */
3181  {
3182  handle->debug_print("adxl345: iic_read is null.\n"); /* iic_read is null */
3183 
3184  return 3; /* return error */
3185  }
3186  if (handle->iic_write == NULL) /* check iic_write */
3187  {
3188  handle->debug_print("adxl345: iic_write is null.\n"); /* iic_write is null */
3189 
3190  return 3; /* return error */
3191  }
3192  if (handle->spi_init == NULL) /* check spi_init */
3193  {
3194  handle->debug_print("adxl345: spi_init is null.\n"); /* spi_init is null */
3195 
3196  return 3; /* return error */
3197  }
3198  if (handle->spi_deinit == NULL) /* check spi_deinit */
3199  {
3200  handle->debug_print("adxl345: spi_deinit is null.\n"); /* spi_deinit is null */
3201 
3202  return 3; /* return error */
3203  }
3204  if (handle->spi_read == NULL) /* check spi_read */
3205  {
3206  handle->debug_print("adxl345: spi_read is null.\n"); /* spi_read is null */
3207 
3208  return 3; /* return error */
3209  }
3210  if (handle->spi_write == NULL) /* check spi_write */
3211  {
3212  handle->debug_print("adxl345: spi_write is null.\n"); /* spi_write is null */
3213 
3214  return 3; /* return error */
3215  }
3216  if (handle->delay_ms == NULL) /* check delay_ms */
3217  {
3218  handle->debug_print("adxl345: delay_ms is null.\n"); /* delay_ms is null */
3219 
3220  return 3; /* return error */
3221  }
3222  if (handle->receive_callback == NULL) /* check receive_callback */
3223  {
3224  handle->debug_print("adxl345: receive_callback is null.\n"); /* receive_callback is null */
3225 
3226  return 3; /* return error */
3227  }
3228 
3229  if (handle->iic_spi == ADXL345_INTERFACE_IIC) /* iic interface */
3230  {
3231  if (handle->iic_init() != 0) /* initialize iic bus */
3232  {
3233  handle->debug_print("adxl345: iic init failed.\n"); /* iic init failed */
3234 
3235  return 1; /* return error */
3236  }
3237  }
3238  else /* spi interface */
3239  {
3240  if (handle->spi_init() != 0) /* initialize spi bus */
3241  {
3242  handle->debug_print("adxl345: spi init failed.\n"); /* spi init failed */
3243 
3244  return 1; /* return error */
3245  }
3246  }
3247  if (a_adxl345_iic_spi_read(handle, ADXL345_REG_DEVID, (uint8_t *)&id, 1) != 0) /* read id */
3248  {
3249  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3250  (void)a_adxl345_close(handle); /* close */
3251 
3252  return 4; /* return error */
3253  }
3254  if (id != 0xE5) /* check id */
3255  {
3256  handle->debug_print("adxl345: id is invalid.\n"); /* id is invalid */
3257  (void)a_adxl345_close(handle); /* close */
3258 
3259  return 4; /* return error */
3260  }
3261  handle->inited = 1; /* flag finish initialization */
3262 
3263  return 0; /* success return 0 */
3264 }
3265 
3277 uint8_t adxl345_deinit(adxl345_handle_t *handle)
3278 {
3279  uint8_t res, prev;
3280 
3281  if (handle == NULL) /* check handle */
3282  {
3283  return 2; /* return error */
3284  }
3285  if (handle->inited != 1) /* check handle initialization */
3286  {
3287  return 3; /* return error */
3288  }
3289 
3290  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
3291  if (res != 0) /* check result */
3292  {
3293  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3294 
3295  return 4; /* return error */
3296  }
3297  prev &= ~(1 << 3); /* stop measure */
3298  prev |= 1 << 2; /* sleep */
3299  res = a_adxl345_iic_spi_write(handle, ADXL345_REG_POWER_CTL, (uint8_t *)&prev, 1); /* write config */
3300  if (res != 0) /* check result */
3301  {
3302  handle->debug_print("adxl345: write failed.\n"); /* write failed */
3303 
3304  return 4; /* return error */
3305  }
3306  else
3307  {
3308  res = a_adxl345_close(handle); /* close */
3309  if (res != 0) /* check result */
3310  {
3311  return 1; /* return error */
3312  }
3313  else
3314  {
3315  handle->inited = 0; /* flag close */
3316 
3317  return 0; /* success return 0 */
3318  }
3319  }
3320 }
3321 
3335 uint8_t adxl345_read(adxl345_handle_t *handle, int16_t (*raw)[3], float (*g)[3], uint16_t *len)
3336 {
3337  uint8_t res, prev;
3338  uint8_t mode, cnt, i;
3339  uint8_t justify, full_res, range;
3340  uint8_t buf[32 * 6];
3341 
3342  if (handle == NULL) /* check handle */
3343  {
3344  return 2; /* return error */
3345  }
3346  if (handle->inited != 1) /* check handle initialization */
3347  {
3348  return 3; /* return error */
3349  }
3350 
3351  if ((*len) == 0) /* check length */
3352  {
3353  handle->debug_print("adxl345: length is zero.\n"); /* length is zero */
3354 
3355  return 1; /* return error */
3356  }
3357  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_CTL, (uint8_t *)&prev, 1); /* read config */
3358  if (res != 0) /* check result */
3359  {
3360  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3361 
3362  return 1; /* return error */
3363  }
3364  mode = prev >> 6; /* get mode */
3365  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATA_FORMAT, (uint8_t *)&prev, 1); /* read config */
3366  if (res != 0) /* check result */
3367  {
3368  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3369 
3370  return 1; /* return error */
3371  }
3372  full_res = (prev >> 3) & 0x01; /* get full resolution */
3373  justify = (prev >> 2) & 0x01; /* get justify */
3374  range = prev & 0x03; /* get range */
3375  if (mode == ADXL345_MODE_BYPASS) /* bypass */
3376  {
3377  *len = 1; /* set length 1 */
3378  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATAX0, (uint8_t *)buf, 6); /* read data */
3379  if (res != 0) /* check result */
3380  {
3381  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3382 
3383  return 1; /* return error */
3384  }
3385  raw[0][0] = (int16_t)(buf[1] << 8) | buf[0]; /* set raw z */
3386  raw[0][1] = (int16_t)(buf[3] << 8) | buf[2]; /* set raw y */
3387  raw[0][2] = (int16_t)(buf[5] << 8) | buf[4]; /* set raw z */
3388  if (full_res == 1) /* if full resolution */
3389  {
3390  if (justify == 1) /* if justify */
3391  {
3392  if (range == 0x00) /* if 2g */
3393  {
3394  if ((raw[0][0] & (1 << 15)) != 0) /* check sigend bit */
3395  {
3396  raw[0][0] = ((uint16_t)0xFC << 8) | ((raw[0][0] >> 6) & 0x3FF); /* negative */
3397  }
3398  else
3399  {
3400  raw[0][0] = (raw[0][0] >> 6) & 0x3FF; /* positive */
3401  }
3402  if ((raw[0][1] & (1 << 15)) != 0) /* check sigend bit */
3403  {
3404  raw[0][1] = ((uint16_t)0xFC << 8) | ((raw[0][1] >> 6) & 0x3FF); /* negative */
3405  }
3406  else
3407  {
3408  raw[0][1] = (raw[0][1] >> 6) & 0x3FF; /* positive */
3409  }
3410  if ((raw[0][2] & (1 << 15)) != 0) /* check sigend bit */
3411  {
3412  raw[0][2] = ((uint16_t)0xFC << 8) | ((raw[0][2] >> 6) & 0x3FF); /* negative */
3413  }
3414  else
3415  {
3416  raw[0][2] = (raw[0][2] >> 6) & 0x3FF; /* positive */
3417  }
3418  }
3419  else if (range == 0x01) /* if 4g */
3420  {
3421  if ((raw[0][0] & (1 << 15)) != 0) /* check sigend bit */
3422  {
3423  raw[0][0] = ((uint16_t)0xF3 << 8) | ((raw[0][0] >> 5) & 0x7FF); /* negative */
3424  }
3425  else
3426  {
3427  raw[0][0] = (raw[0][0] >> 5) & 0x7FF; /* positive */
3428  }
3429  if ((raw[0][1] & (1 << 15)) != 0) /* check sigend bit */
3430  {
3431  raw[0][1] = ((uint16_t)0xF3 << 8) | ((raw[0][1] >> 5) & 0x7FF); /* negative */
3432  }
3433  else
3434  {
3435  raw[0][1] = (raw[0][1] >> 5) & 0x7FF; /* positive */
3436  }
3437  if ((raw[0][2] & (1 << 15)) != 0) /* check sigend bit */
3438  {
3439  raw[0][2] = ((uint16_t)0xF3 << 8) | ((raw[0][2] >> 5) & 0x7FF); /* negative */
3440  }
3441  else
3442  {
3443  raw[0][2] = (raw[0][2] >> 5) & 0x7FF; /* positive */
3444  }
3445  }
3446  else if (range == 0x02) /* if 8g */
3447  {
3448  if ((raw[0][0] & (1 << 15)) != 0) /* check sigend bit */
3449  {
3450  raw[0][0] = ((uint16_t)0xF0 << 8) | ((raw[0][0] >> 4) & 0xFFF); /* negative */
3451  }
3452  else
3453  {
3454  raw[0][0] = (raw[0][0] >> 4) & 0xFFF; /* positive */
3455  }
3456  if ((raw[0][1] & (1 << 15)) != 0) /* check sigend bit */
3457  {
3458  raw[0][1] = ((uint16_t)0xF0 << 8) | ((raw[0][1] >> 4) & 0xFFF); /* negative */
3459  }
3460  else
3461  {
3462  raw[0][1] = (raw[0][1] >> 4) & 0xFFF; /* positive */
3463  }
3464  if ((raw[0][2] & (1 << 15)) != 0) /* check sigend bit */
3465  {
3466  raw[0][2] = ((uint16_t)0xF0 << 8) | ((raw[0][2] >> 4) & 0xFFF); /* negative */
3467  }
3468  else
3469  {
3470  raw[0][2] = (raw[0][2] >> 4) & 0xFFF; /* positive */
3471  }
3472  }
3473  else /* if 16g */
3474  {
3475  if ((raw[0][0] & (1 << 15)) != 0) /* check sigend bit */
3476  {
3477  raw[0][0] = ((uint16_t)0xE0 << 8) | ((raw[0][0] >> 3) & 0x1FFF); /* negative */
3478  }
3479  else
3480  {
3481  raw[0][0] = (raw[0][0] >> 3) & 0x1FFF; /* positive */
3482  }
3483  if ((raw[0][1] & (1 << 15)) != 0) /* check sigend bit */
3484  {
3485  raw[0][1] = ((uint16_t)0xE0 << 8) | ((raw[0][1] >> 3) & 0x1FFF); /* negative */
3486  }
3487  else
3488  {
3489  raw[0][1] = (raw[0][1] >> 3) & 0x1FFF; /* positive */
3490  }
3491  if ((raw[0][2] & (1 << 15)) != 0) /* check sigend bit */
3492  {
3493  raw[0][2] = ((uint16_t)0xE0 << 8) | ((raw[0][2] >> 3) & 0x1FFF); /* negative */
3494  }
3495  else
3496  {
3497  raw[0][2] = (raw[0][2] >> 3) & 0x1FFF; /* positive */
3498  }
3499  }
3500  }
3501  g[0][0] = (float)(raw[0][0]) * 0.0039f; /* convert x */
3502  g[0][1] = (float)(raw[0][1]) * 0.0039f; /* convert y */
3503  g[0][2] = (float)(raw[0][2]) * 0.0039f; /* convert z */
3504  }
3505  else
3506  {
3507  if (justify == 1) /* if justify */
3508  {
3509  if ((raw[0][0] & (1 << 15)) != 0) /* check sigend bit */
3510  {
3511  raw[0][0] = ((uint16_t)0xFC << 8) | ((raw[0][0] >> 6) & 0x3FF); /* negative */
3512  }
3513  else
3514  {
3515  raw[0][0] = (raw[0][0] >> 6) & 0x3FF; /* positive */
3516  }
3517  if ((raw[0][1] & (1 << 15)) != 0) /* check sigend bit */
3518  {
3519  raw[0][1] = ((uint16_t)0xFC << 8) | ((raw[0][1] >> 6) & 0x3FF); /* negative */
3520  }
3521  else
3522  {
3523  raw[0][1] = (raw[0][1] >> 6) & 0x3FF; /* positive */
3524  }
3525  if ((raw[0][2] & (1 << 15)) != 0) /* check sigend bit */
3526  {
3527  raw[0][2] = ((uint16_t)0xFC << 8) | ((raw[0][2] >> 6) & 0x3FF); /* negative */
3528  }
3529  else
3530  {
3531  raw[0][2] = (raw[0][2] >> 6) & 0x3FF; /* positive */
3532  }
3533  }
3534  if (range == 0x00) /* if 2g */
3535  {
3536  g[0][0] = (float)(raw[0][0]) * 0.0039f; /* convert x */
3537  g[0][1] = (float)(raw[0][1]) * 0.0039f; /* convert y */
3538  g[0][2] = (float)(raw[0][2]) * 0.0039f; /* convert z */
3539  }
3540  else if (range == 0x01) /* if 4g */
3541  {
3542  g[0][0] = (float)(raw[0][0]) * 0.0078f; /* convert x */
3543  g[0][1] = (float)(raw[0][1]) * 0.0078f; /* convert y */
3544  g[0][2] = (float)(raw[0][2]) * 0.0078f; /* convert z */
3545  }
3546  else if (range == 0x02) /* if 8g */
3547  {
3548  g[0][0] = (float)(raw[0][0]) * 0.0156f; /* convert x */
3549  g[0][1] = (float)(raw[0][1]) * 0.0156f; /* convert y */
3550  g[0][2] = (float)(raw[0][2]) * 0.0156f; /* convert z */
3551  }
3552  else /* if 16g */
3553  {
3554  g[0][0] = (float)(raw[0][0]) * 0.0312f; /* convert x */
3555  g[0][1] = (float)(raw[0][1]) * 0.0312f; /* convert y */
3556  g[0][2] = (float)(raw[0][2]) * 0.0312f; /* convert z */
3557  }
3558  }
3559  }
3560  else /* fifo mode */
3561  {
3562  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_FIFO_STATUS, (uint8_t *)&prev, 1); /* read fifo status */
3563  if (res != 0) /* check result */
3564  {
3565  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3566 
3567  return 1; /* return error */
3568  }
3569  cnt = prev & 0x3F; /* get cnt */
3570  *len = ((*len) < cnt) ? (*len) : cnt; /* get min cnt */
3571  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_DATAX0, (uint8_t *)buf, 6*(*len)); /* read data */
3572  if (res != 0) /* check result */
3573  {
3574  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3575 
3576  return 1; /* return error */
3577  }
3578  for (i = 0; i < (*len); i++) /* read length */
3579  {
3580  raw[i][0] = (int16_t)(buf[1 + i * 6] << 8) | buf[0 + i * 6]; /* set raw x */
3581  raw[i][1] = (int16_t)(buf[3 + i * 6] << 8) | buf[2 + i * 6]; /* set raw y */
3582  raw[i][2] = (int16_t)(buf[5 + i * 6] << 8) | buf[4 + i * 6]; /* set raw z */
3583  if (full_res == 1) /* if full resolution */
3584  {
3585  if (justify == 1) /* if justify */
3586  {
3587  if (range == 0x00) /* if 2g */
3588  {
3589  if ((raw[i][0] & (1 << 15)) != 0) /* check sigend bit */
3590  {
3591  raw[i][0] = ((uint16_t)0xFC << 8) | ((raw[i][0] >> 6) & 0x3FF); /* negative */
3592  }
3593  else
3594  {
3595  raw[i][0] = (raw[i][0] >> 6) & 0x3FF; /* positive */
3596  }
3597  if ((raw[i][1] & (1 << 15)) != 0) /* check sigend bit */
3598  {
3599  raw[i][1] = ((uint16_t)0xFC << 8) | ((raw[i][1] >> 6) & 0x3FF); /* negative */
3600  }
3601  else
3602  {
3603  raw[i][1] = (raw[i][1] >> 6) & 0x3FF; /* positive */
3604  }
3605  if ((raw[i][2] & (1 << 15)) != 0) /* check sigend bit */
3606  {
3607  raw[i][2] = ((uint16_t)0xFC << 8) | ((raw[i][2] >> 6) & 0x3FF); /* negative */
3608  }
3609  else
3610  {
3611  raw[i][2] = (raw[i][2] >> 6) & 0x3FF; /* positive */
3612  }
3613  }
3614  else if (range == 0x01) /* if 4g */
3615  {
3616  if ((raw[i][0] & (1 << 15)) != 0) /* check sigend bit */
3617  {
3618  raw[i][0] = ((uint16_t)0xF3 << 8) | ((raw[i][0] >> 5) & 0x7FF); /* negative */
3619  }
3620  else
3621  {
3622  raw[i][0] = (raw[i][0] >> 5) & 0x7FF; /* positive */
3623  }
3624  if ((raw[i][1] & (1 << 15)) != 0) /* check sigend bit */
3625  {
3626  raw[i][1] = ((uint16_t)0xF3 << 8) | ((raw[i][1] >> 5) & 0x7FF); /* negative */
3627  }
3628  else
3629  {
3630  raw[i][1] = (raw[i][1] >> 5) & 0x7FF; /* positive */
3631  }
3632  if ((raw[i][2] & (1 << 15)) != 0) /* check sigend bit */
3633  {
3634  raw[i][2] = ((uint16_t)0xF3 << 8) | ((raw[i][2] >> 5) & 0x7FF); /* negative */
3635  }
3636  else
3637  {
3638  raw[i][2] = (raw[i][2] >> 5) & 0x7FF; /* positive */
3639  }
3640  }
3641  else if (range == 0x02) /* if 8g */
3642  {
3643  if ((raw[i][0] & (1 << 15)) != 0) /* check sigend bit */
3644  {
3645  raw[i][0] = ((uint16_t)0xF0 << 8) | ((raw[i][0] >> 4) & 0xFFF); /* negative */
3646  }
3647  else
3648  {
3649  raw[i][0] = (raw[i][0] >> 4) & 0xFFF; /* positive */
3650  }
3651  if ((raw[i][1] & (1 << 15)) != 0) /* check sigend bit */
3652  {
3653  raw[i][1] = ((uint16_t)0xF0 << 8) | ((raw[i][1] >> 4) & 0xFFF); /* negative */
3654  }
3655  else
3656  {
3657  raw[i][1] = (raw[i][1] >> 4) & 0xFFF; /* positive */
3658  }
3659  if ((raw[i][2] & (1 << 15)) != 0) /* check sigend bit */
3660  {
3661  raw[i][2] = ((uint16_t)0xF0 << 8) | ((raw[i][2] >> 4) & 0xFFF); /* negative */
3662  }
3663  else
3664  {
3665  raw[i][2] = (raw[i][2] >> 4) & 0xFFF; /* positive */
3666  }
3667  }
3668  else /* if 16g */
3669  {
3670  if ((raw[i][0] & (1 << 15)) != 0) /* check sigend bit */
3671  {
3672  raw[i][0] = ((uint16_t)0xE0 << 8) | ((raw[i][0] >> 3) & 0x1FFF); /* negative */
3673  }
3674  else
3675  {
3676  raw[i][0] = (raw[i][0] >> 3) & 0x1FFF; /* positive */
3677  }
3678  if ((raw[i][1] & (1 << 15)) != 0) /* check sigend bit */
3679  {
3680  raw[i][1] = ((uint16_t)0xE0 << 8) | ((raw[i][1] >> 3) & 0x1FFF); /* negative */
3681  }
3682  else
3683  {
3684  raw[i][1] = (raw[i][1] >> 3) & 0x1FFF; /* positive */
3685  }
3686  if ((raw[i][2] & (1 << 15)) != 0) /* check sigend bit */
3687  {
3688  raw[i][2] = ((uint16_t)0xE0 << 8) | ((raw[i][2] >> 3) & 0x1FFF); /* negative */
3689  }
3690  else
3691  {
3692  raw[i][2] = (raw[i][2] >> 3) & 0x1FFF; /* positive */
3693  }
3694  }
3695  }
3696  g[i][0] = (float)(raw[i][0])*0.0039f; /* convert x */
3697  g[i][1] = (float)(raw[i][1])*0.0039f; /* convert y */
3698  g[i][2] = (float)(raw[i][2])*0.0039f; /* convert z */
3699  }
3700  else
3701  {
3702  if (justify == 1) /* if justify */
3703  {
3704  if ((raw[i][0] & (1 << 15)) != 0) /* check sigend bit */
3705  {
3706  raw[i][0] = ((uint16_t)0xFC << 8) | ((raw[i][0] >> 6) & 0x3FF); /* negative */
3707  }
3708  else
3709  {
3710  raw[i][0] = (raw[i][0] >> 6) & 0x3FF; /* positive */
3711  }
3712  if ((raw[i][1] & (1 << 15)) != 0) /* check sigend bit */
3713  {
3714  raw[i][1] = ((uint16_t)0xFC << 8) | ((raw[i][1] >> 6) & 0x3FF); /* negative */
3715  }
3716  else
3717  {
3718  raw[i][1] = (raw[i][1] >> 6) & 0x3FF; /* positive */
3719  }
3720  if ((raw[i][2] & (1 << 15)) != 0) /* check sigend bit */
3721  {
3722  raw[i][2] = ((uint16_t)0xFC << 8) | ((raw[i][2] >> 6) & 0x3FF); /* negative */
3723  }
3724  else
3725  {
3726  raw[i][2] = (raw[i][2] >> 6) & 0x3FF; /* positive */
3727  }
3728  }
3729  if (range == 0x00) /* if 2g */
3730  {
3731  g[i][0] = (float)(raw[i][0]) * 0.0039f; /* convert x */
3732  g[i][1] = (float)(raw[i][1]) * 0.0039f; /* convert y */
3733  g[i][2] = (float)(raw[i][2]) * 0.0039f; /* convert z */
3734  }
3735  else if (range == 0x01) /* if 4g */
3736  {
3737  g[i][0] = (float)(raw[i][0]) * 0.0078f; /* convert x */
3738  g[i][1] = (float)(raw[i][1]) * 0.0078f; /* convert y */
3739  g[i][2] = (float)(raw[i][2]) * 0.0078f; /* convert z */
3740  }
3741  else if (range == 0x02) /* if 8g */
3742  {
3743  g[i][0] = (float)(raw[i][0]) * 0.0156f; /* convert x */
3744  g[i][1] = (float)(raw[i][1]) * 0.0156f; /* convert y */
3745  g[i][2] = (float)(raw[i][2]) * 0.0156f; /* convert z */
3746  }
3747  else /* if 16g */
3748  {
3749  g[i][0] = (float)(raw[i][0]) * 0.0312f; /* convert x */
3750  g[i][1] = (float)(raw[i][1]) * 0.0312f; /* convert y */
3751  g[i][2] = (float)(raw[i][2]) * 0.0312f; /* convert z */
3752  }
3753  }
3754  }
3755  }
3756 
3757  return 0; /* success return 0 */
3758 }
3759 
3770 uint8_t adxl345_irq_handler(adxl345_handle_t *handle)
3771 {
3772  uint8_t res, prev;
3773 
3774  if (handle == NULL) /* check handle */
3775  {
3776  return 2; /* return error */
3777  }
3778  if (handle->inited != 1) /* check handle initialization */
3779  {
3780  return 3; /* return error */
3781  }
3782 
3783  res = a_adxl345_iic_spi_read(handle, ADXL345_REG_INT_SOURCE, (uint8_t *)&prev, 1); /* read config */
3784  if (res != 0) /* check result */
3785  {
3786  handle->debug_print("adxl345: read failed.\n"); /* read failed */
3787 
3788  return 1; /* return error */
3789  }
3790  if ((prev & (1 << ADXL345_INTERRUPT_DATA_READY)) != 0) /* if data ready */
3791  {
3792  if (handle->receive_callback != NULL) /* if receive callback */
3793  {
3794  handle->receive_callback(ADXL345_INTERRUPT_DATA_READY); /* run callback */
3795  }
3796  }
3797  if ((prev & (1 << ADXL345_INTERRUPT_SINGLE_TAP)) != 0) /* if single tap */
3798  {
3799  if (handle->receive_callback != NULL) /* if receive callback */
3800  {
3801  handle->receive_callback(ADXL345_INTERRUPT_SINGLE_TAP); /* run callback */
3802  }
3803  }
3804  if ((prev & (1 << ADXL345_INTERRUPT_DOUBLE_TAP)) != 0) /* if double tap */
3805  {
3806  if (handle->receive_callback != NULL) /* if receive callback */
3807  {
3808  handle->receive_callback(ADXL345_INTERRUPT_DOUBLE_TAP); /* run callback */
3809  }
3810  }
3811  if ((prev & (1 << ADXL345_INTERRUPT_ACTIVITY)) != 0) /* if activity */
3812  {
3813  if (handle->receive_callback != NULL) /*if receive callback */
3814  {
3815  handle->receive_callback(ADXL345_INTERRUPT_ACTIVITY); /* run callback */
3816  }
3817  }
3818  if ((prev & (1 << ADXL345_INTERRUPT_INACTIVITY)) != 0) /* if inactivity */
3819  {
3820  if (handle->receive_callback != NULL) /*if receive callback */
3821  {
3822  handle->receive_callback(ADXL345_INTERRUPT_INACTIVITY); /* run callback */
3823  }
3824  }
3825  if ((prev & (1 << ADXL345_INTERRUPT_FREE_FALL)) != 0) /* if free fall */
3826  {
3827  if (handle->receive_callback != NULL) /* if receive callback */
3828  {
3829  handle->receive_callback(ADXL345_INTERRUPT_FREE_FALL); /* run callback */
3830  }
3831  }
3832  if ((prev & (1 << ADXL345_INTERRUPT_WATERMARK)) != 0) /* if watermark */
3833  {
3834  if (handle->receive_callback != NULL) /* if receive callback */
3835  {
3836  handle->receive_callback(ADXL345_INTERRUPT_WATERMARK); /* run callback */
3837  }
3838  }
3839  if ((prev & (1 << ADXL345_INTERRUPT_OVERRUN)) != 0) /* if overrun */
3840  {
3841  if (handle->receive_callback != NULL) /* if receive callback */
3842  {
3843  handle->receive_callback(ADXL345_INTERRUPT_OVERRUN); /* run callback */
3844  }
3845  }
3846 
3847  return 0; /* success return 0 */
3848 }
3849 
3863 uint8_t adxl345_set_reg(adxl345_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
3864 {
3865  if (handle == NULL) /* check handle */
3866  {
3867  return 2; /* return error */
3868  }
3869  if (handle->inited != 1) /* check handle initialization */
3870  {
3871  return 3; /* return error */
3872  }
3873 
3874  return a_adxl345_iic_spi_write(handle, reg, buf, len); /* write data */
3875 }
3876 
3890 uint8_t adxl345_get_reg(adxl345_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
3891 {
3892  if (handle == NULL) /* check handle */
3893  {
3894  return 2; /* return error */
3895  }
3896  if (handle->inited != 1) /* check handle initialization */
3897  {
3898  return 3; /* return error */
3899  }
3900 
3901  return a_adxl345_iic_spi_read(handle, reg, buf, len); /* read data */
3902 }
3903 
3912 uint8_t adxl345_info(adxl345_info_t *info)
3913 {
3914  if (info == NULL) /* check handle */
3915  {
3916  return 2; /* return error */
3917  }
3918 
3919  memset(info, 0, sizeof(adxl345_info_t)); /* initialize adxl345 info structure */
3920  strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
3921  strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
3922  strncpy(info->interface, "IIC SPI", 8); /* copy interface name */
3923  info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
3924  info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
3925  info->max_current_ma = MAX_CURRENT; /* set maximum current */
3926  info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
3927  info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
3928  info->driver_version = DRIVER_VERSION; /* set driver version */
3929 
3930  return 0; /* success return 0 */
3931 }
ADXL345_REG_DUR
#define ADXL345_REG_DUR
Definition: driver_adxl345.c:60
ADXL345_REG_THRESH_FF
#define ADXL345_REG_THRESH_FF
Definition: driver_adxl345.c:67
ADXL345_REG_TAP_AXES
#define ADXL345_REG_TAP_AXES
Definition: driver_adxl345.c:69
ADXL345_REG_ACT_TAP_STATUS
#define ADXL345_REG_ACT_TAP_STATUS
Definition: driver_adxl345.c:70
MAX_CURRENT
#define MAX_CURRENT
Definition: driver_adxl345.c:47
ADXL345_REG_DEVID
#define ADXL345_REG_DEVID
chip register definition
Definition: driver_adxl345.c:55
ADXL345_REG_THRESH_TAP
#define ADXL345_REG_THRESH_TAP
Definition: driver_adxl345.c:56
ADXL345_REG_OFSX
#define ADXL345_REG_OFSX
Definition: driver_adxl345.c:57
ADXL345_REG_BW_RATE
#define ADXL345_REG_BW_RATE
Definition: driver_adxl345.c:71
ADXL345_REG_DATA_FORMAT
#define ADXL345_REG_DATA_FORMAT
Definition: driver_adxl345.c:76
ADXL345_REG_TIME_FF
#define ADXL345_REG_TIME_FF
Definition: driver_adxl345.c:68
SUPPLY_VOLTAGE_MAX
#define SUPPLY_VOLTAGE_MAX
Definition: driver_adxl345.c:46
ADXL345_REG_FIFO_CTL
#define ADXL345_REG_FIFO_CTL
Definition: driver_adxl345.c:83
ADXL345_REG_THRESH_INACT
#define ADXL345_REG_THRESH_INACT
Definition: driver_adxl345.c:64
ADXL345_REG_INT_MAP
#define ADXL345_REG_INT_MAP
Definition: driver_adxl345.c:74
ADXL345_REG_LATENT
#define ADXL345_REG_LATENT
Definition: driver_adxl345.c:61
TEMPERATURE_MAX
#define TEMPERATURE_MAX
Definition: driver_adxl345.c:49
ADXL345_REG_FIFO_STATUS
#define ADXL345_REG_FIFO_STATUS
Definition: driver_adxl345.c:84
ADXL345_REG_OFSY
#define ADXL345_REG_OFSY
Definition: driver_adxl345.c:58
ADXL345_REG_INT_SOURCE
#define ADXL345_REG_INT_SOURCE
Definition: driver_adxl345.c:75
ADXL345_REG_POWER_CTL
#define ADXL345_REG_POWER_CTL
Definition: driver_adxl345.c:72
MANUFACTURER_NAME
#define MANUFACTURER_NAME
Definition: driver_adxl345.c:44
TEMPERATURE_MIN
#define TEMPERATURE_MIN
Definition: driver_adxl345.c:48
SUPPLY_VOLTAGE_MIN
#define SUPPLY_VOLTAGE_MIN
Definition: driver_adxl345.c:45
ADXL345_REG_WINDOW
#define ADXL345_REG_WINDOW
Definition: driver_adxl345.c:62
ADXL345_REG_TIME_INACT
#define ADXL345_REG_TIME_INACT
Definition: driver_adxl345.c:65
ADXL345_REG_DATAX0
#define ADXL345_REG_DATAX0
Definition: driver_adxl345.c:77
CHIP_NAME
#define CHIP_NAME
chip register definition
Definition: driver_adxl345.c:43
ADXL345_REG_INT_ENABLE
#define ADXL345_REG_INT_ENABLE
Definition: driver_adxl345.c:73
DRIVER_VERSION
#define DRIVER_VERSION
Definition: driver_adxl345.c:50
ADXL345_REG_OFSZ
#define ADXL345_REG_OFSZ
Definition: driver_adxl345.c:59
ADXL345_REG_ACT_INACT_CTL
#define ADXL345_REG_ACT_INACT_CTL
Definition: driver_adxl345.c:66
ADXL345_REG_THRESH_ACT
#define ADXL345_REG_THRESH_ACT
Definition: driver_adxl345.c:63
driver_adxl345.h
driver adxl345 header file
adxl345_interface_t
adxl345_interface_t
adxl345 interface enumeration definition
Definition: driver_adxl345.h:64
adxl345_inaction_time_convert_to_register
uint8_t adxl345_inaction_time_convert_to_register(adxl345_handle_t *handle, uint8_t s, uint8_t *reg)
convert the inaction time to the register raw data
Definition: driver_adxl345.c:1096
adxl345_get_justify
uint8_t adxl345_get_justify(adxl345_handle_t *handle, adxl345_justify_t *enable)
get the justify status
Definition: driver_adxl345.c:2341
adxl345_spi_wire_t
adxl345_spi_wire_t
adxl345 spi wire enumeration definition
Definition: driver_adxl345.h:166
adxl345_get_action_coupled
uint8_t adxl345_get_action_coupled(adxl345_handle_t *handle, adxl345_coupled_t *coupled)
get the action coupled
Definition: driver_adxl345.c:1263
adxl345_get_link_activity_inactivity
uint8_t adxl345_get_link_activity_inactivity(adxl345_handle_t *handle, adxl345_bool_t *enable)
get the activity and inactivity linking status
Definition: driver_adxl345.c:2785
adxl345_duration_convert_to_register
uint8_t adxl345_duration_convert_to_register(adxl345_handle_t *handle, uint32_t us, uint8_t *reg)
convert the duration to the register raw data
Definition: driver_adxl345.c:576
adxl345_inaction_threshold_convert_to_register
uint8_t adxl345_inaction_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
convert the inaction threshold to the register raw data
Definition: driver_adxl345.c:992
adxl345_get_auto_sleep
uint8_t adxl345_get_auto_sleep(adxl345_handle_t *handle, adxl345_bool_t *enable)
get the auto sleep status
Definition: driver_adxl345.c:2859
adxl345_set_full_resolution
uint8_t adxl345_set_full_resolution(adxl345_handle_t *handle, adxl345_bool_t enable)
enable or disable the full resolution
Definition: driver_adxl345.c:2230
adxl345_set_inaction_time
uint8_t adxl345_set_inaction_time(adxl345_handle_t *handle, uint8_t t)
set the inaction time
Definition: driver_adxl345.c:1046
adxl345_duration_convert_to_data
uint8_t adxl345_duration_convert_to_data(adxl345_handle_t *handle, uint8_t reg, uint32_t *us)
convert the register raw data to the duration
Definition: driver_adxl345.c:603
adxl345_justify_t
adxl345_justify_t
adxl345 justify enumeration definition
Definition: driver_adxl345.h:175
adxl345_get_tap_threshold
uint8_t adxl345_get_tap_threshold(adxl345_handle_t *handle, uint8_t *threshold)
get the tap threshold
Definition: driver_adxl345.c:291
adxl345_deinit
uint8_t adxl345_deinit(adxl345_handle_t *handle)
close the chip
Definition: driver_adxl345.c:3277
adxl345_set_inaction_coupled
uint8_t adxl345_set_inaction_coupled(adxl345_handle_t *handle, adxl345_coupled_t coupled)
set the inaction coupled
Definition: driver_adxl345.c:1300
adxl345_get_tap_axis
uint8_t adxl345_get_tap_axis(adxl345_handle_t *handle, adxl345_tap_axis_t axis, adxl345_bool_t *enable)
get the tap axis status
Definition: driver_adxl345.c:1621
adxl345_action_inaction_t
adxl345_action_inaction_t
adxl345 action inaction enumeration definition
Definition: driver_adxl345.h:100
adxl345_get_trigger_pin
uint8_t adxl345_get_trigger_pin(adxl345_handle_t *handle, adxl345_interrupt_pin_t *pin)
get the trigger pin
Definition: driver_adxl345.c:2563
adxl345_inaction_threshold_convert_to_data
uint8_t adxl345_inaction_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
convert the register raw data to the inaction threshold
Definition: driver_adxl345.c:1019
adxl345_set_spi_wire
uint8_t adxl345_set_spi_wire(adxl345_handle_t *handle, adxl345_spi_wire_t wire)
set the chip spi wire
Definition: driver_adxl345.c:2082
adxl345_set_measure
uint8_t adxl345_set_measure(adxl345_handle_t *handle, adxl345_bool_t enable)
enable or disable the measure
Definition: driver_adxl345.c:2896
adxl345_set_trigger_pin
uint8_t adxl345_set_trigger_pin(adxl345_handle_t *handle, adxl345_interrupt_pin_t pin)
set the trigger pin
Definition: driver_adxl345.c:2526
adxl345_get_full_resolution
uint8_t adxl345_get_full_resolution(adxl345_handle_t *handle, adxl345_bool_t *enable)
get the full resolution status
Definition: driver_adxl345.c:2267
adxl345_irq_handler
uint8_t adxl345_irq_handler(adxl345_handle_t *handle)
irq handler
Definition: driver_adxl345.c:3770
adxl345_set_link_activity_inactivity
uint8_t adxl345_set_link_activity_inactivity(adxl345_handle_t *handle, adxl345_bool_t enable)
enable or disable the activity and inactivity linking
Definition: driver_adxl345.c:2748
adxl345_get_free_fall_time
uint8_t adxl345_get_free_fall_time(adxl345_handle_t *handle, uint8_t *t)
get the free fall time
Definition: driver_adxl345.c:1503
adxl345_free_fall_time_convert_to_data
uint8_t adxl345_free_fall_time_convert_to_data(adxl345_handle_t *handle, uint8_t reg, uint16_t *ms)
convert the register raw data to the free fall time
Definition: driver_adxl345.c:1555
adxl345_get_sleep_frequency
uint8_t adxl345_get_sleep_frequency(adxl345_handle_t *handle, adxl345_sleep_frequency_t *sleep_frequency)
get the sleep frequency
Definition: driver_adxl345.c:3081
adxl345_get_sleep
uint8_t adxl345_get_sleep(adxl345_handle_t *handle, adxl345_bool_t *enable)
get the sleep mode status
Definition: driver_adxl345.c:3007
adxl345_get_mode
uint8_t adxl345_get_mode(adxl345_handle_t *handle, adxl345_mode_t *mode)
get the chip mode
Definition: driver_adxl345.c:2489
adxl345_set_action_threshold
uint8_t adxl345_set_action_threshold(adxl345_handle_t *handle, uint8_t threshold)
set the action threshold
Definition: driver_adxl345.c:838
adxl345_get_offset
uint8_t adxl345_get_offset(adxl345_handle_t *handle, int8_t *x, int8_t *y, int8_t *z)
get the axis offset
Definition: driver_adxl345.c:423
adxl345_get_free_fall_threshold
uint8_t adxl345_get_free_fall_threshold(adxl345_handle_t *handle, uint8_t *threshold)
get the free fall threshold
Definition: driver_adxl345.c:1399
adxl345_set_free_fall_threshold
uint8_t adxl345_set_free_fall_threshold(adxl345_handle_t *handle, uint8_t threshold)
set the free fall threshold
Definition: driver_adxl345.c:1374
adxl345_set_sleep
uint8_t adxl345_set_sleep(adxl345_handle_t *handle, adxl345_bool_t enable)
enable or disable the sleep mode
Definition: driver_adxl345.c:2970
adxl345_get_interface
uint8_t adxl345_get_interface(adxl345_handle_t *handle, adxl345_interface_t *interface)
get the chip interface
Definition: driver_adxl345.c:201
adxl345_get_window
uint8_t adxl345_get_window(adxl345_handle_t *handle, uint8_t *t)
get the window
Definition: driver_adxl345.c:759
adxl345_trigger_status_t
adxl345_trigger_status_t
adxl345 trigger status enumeration definition
Definition: driver_adxl345.h:217
adxl345_read
uint8_t adxl345_read(adxl345_handle_t *handle, int16_t(*raw)[3], float(*g)[3], uint16_t *len)
read the data
Definition: driver_adxl345.c:3335
adxl345_get_duration
uint8_t adxl345_get_duration(adxl345_handle_t *handle, uint8_t *t)
get the duration
Definition: driver_adxl345.c:551
adxl345_action_threshold_convert_to_data
uint8_t adxl345_action_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
convert the register raw data to the action threshold
Definition: driver_adxl345.c:915
adxl345_get_latent
uint8_t adxl345_get_latent(adxl345_handle_t *handle, uint8_t *t)
get the latent
Definition: driver_adxl345.c:655
adxl345_set_offset
uint8_t adxl345_set_offset(adxl345_handle_t *handle, int8_t x, int8_t y, int8_t z)
set the axis offset
Definition: driver_adxl345.c:372
adxl345_set_latent
uint8_t adxl345_set_latent(adxl345_handle_t *handle, uint8_t t)
set the latent
Definition: driver_adxl345.c:630
adxl345_set_rate
uint8_t adxl345_set_rate(adxl345_handle_t *handle, adxl345_rate_t rate)
set the sampling rate
Definition: driver_adxl345.c:1757
adxl345_set_inaction_threshold
uint8_t adxl345_set_inaction_threshold(adxl345_handle_t *handle, uint8_t threshold)
set the inaction threshold
Definition: driver_adxl345.c:942
adxl345_get_inaction_time
uint8_t adxl345_get_inaction_time(adxl345_handle_t *handle, uint8_t *t)
get the inaction time
Definition: driver_adxl345.c:1071
adxl345_set_addr_pin
uint8_t adxl345_set_addr_pin(adxl345_handle_t *handle, adxl345_address_t addr_pin)
set the iic address pin
Definition: driver_adxl345.c:222
adxl345_get_range
uint8_t adxl345_get_range(adxl345_handle_t *handle, adxl345_range_t *range)
get the chip range
Definition: driver_adxl345.c:2415
adxl345_set_self_test
uint8_t adxl345_set_self_test(adxl345_handle_t *handle, adxl345_bool_t enable)
enable or disable the self test
Definition: driver_adxl345.c:2008
adxl345_tap_threshold_convert_to_data
uint8_t adxl345_tap_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
convert the register raw data to the tap threshold
Definition: driver_adxl345.c:343
adxl345_free_fall_time_convert_to_register
uint8_t adxl345_free_fall_time_convert_to_register(adxl345_handle_t *handle, uint16_t ms, uint8_t *reg)
convert the free fall time to the register raw data
Definition: driver_adxl345.c:1528
adxl345_get_measure
uint8_t adxl345_get_measure(adxl345_handle_t *handle, adxl345_bool_t *enable)
get the measure status
Definition: driver_adxl345.c:2933
adxl345_range_t
adxl345_range_t
adxl345 range enumeration definition
Definition: driver_adxl345.h:184
adxl345_get_action_inaction
uint8_t adxl345_get_action_inaction(adxl345_handle_t *handle, adxl345_action_inaction_t type, adxl345_bool_t *enable)
get the action or inaction status
Definition: driver_adxl345.c:1189
adxl345_get_spi_wire
uint8_t adxl345_get_spi_wire(adxl345_handle_t *handle, adxl345_spi_wire_t *wire)
get the chip spi wire
Definition: driver_adxl345.c:2119
adxl345_get_rate
uint8_t adxl345_get_rate(adxl345_handle_t *handle, adxl345_rate_t *rate)
get the sampling rate
Definition: driver_adxl345.c:1794
adxl345_set_action_inaction
uint8_t adxl345_set_action_inaction(adxl345_handle_t *handle, adxl345_action_inaction_t type, adxl345_bool_t enable)
enable or disable the action or inaction
Definition: driver_adxl345.c:1151
adxl345_free_fall_threshold_convert_to_register
uint8_t adxl345_free_fall_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
convert the free fall threshold to the register raw data
Definition: driver_adxl345.c:1424
adxl345_window_convert_to_register
uint8_t adxl345_window_convert_to_register(adxl345_handle_t *handle, float ms, uint8_t *reg)
convert the window time to the register raw data
Definition: driver_adxl345.c:784
adxl345_get_trigger_status
uint8_t adxl345_get_trigger_status(adxl345_handle_t *handle, adxl345_trigger_status_t *status)
get the trigger status
Definition: driver_adxl345.c:2711
adxl345_set_duration
uint8_t adxl345_set_duration(adxl345_handle_t *handle, uint8_t t)
set the duration
Definition: driver_adxl345.c:526
adxl345_tap_threshold_convert_to_register
uint8_t adxl345_tap_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
convert the tap threshold to the register raw data
Definition: driver_adxl345.c:316
adxl345_set_tap_suppress
uint8_t adxl345_set_tap_suppress(adxl345_handle_t *handle, adxl345_bool_t enable)
enable or disable the tap suppress
Definition: driver_adxl345.c:1658
adxl345_set_auto_sleep
uint8_t adxl345_set_auto_sleep(adxl345_handle_t *handle, adxl345_bool_t enable)
enable or disable the auto sleep
Definition: driver_adxl345.c:2822
adxl345_get_addr_pin
uint8_t adxl345_get_addr_pin(adxl345_handle_t *handle, adxl345_address_t *addr_pin)
get the iic address pin
Definition: driver_adxl345.c:243
adxl345_set_tap_axis
uint8_t adxl345_set_tap_axis(adxl345_handle_t *handle, adxl345_tap_axis_t axis, adxl345_bool_t enable)
enable or disable the tap axis
Definition: driver_adxl345.c:1583
adxl345_rate_t
adxl345_rate_t
adxl345 rate enumeration definition
Definition: driver_adxl345.h:137
adxl345_set_free_fall_time
uint8_t adxl345_set_free_fall_time(adxl345_handle_t *handle, uint8_t t)
set the free fall time
Definition: driver_adxl345.c:1478
adxl345_get_inaction_coupled
uint8_t adxl345_get_inaction_coupled(adxl345_handle_t *handle, adxl345_coupled_t *coupled)
get the inaction coupled
Definition: driver_adxl345.c:1337
adxl345_set_window
uint8_t adxl345_set_window(adxl345_handle_t *handle, uint8_t t)
set the window
Definition: driver_adxl345.c:734
adxl345_action_threshold_convert_to_register
uint8_t adxl345_action_threshold_convert_to_register(adxl345_handle_t *handle, float g, uint8_t *reg)
convert the action threshold to the register raw data
Definition: driver_adxl345.c:888
adxl345_set_sleep_frequency
uint8_t adxl345_set_sleep_frequency(adxl345_handle_t *handle, adxl345_sleep_frequency_t sleep_frequency)
set the sleep frequency
Definition: driver_adxl345.c:3044
adxl345_address_t
adxl345_address_t
adxl345 address enumeration definition
Definition: driver_adxl345.h:73
adxl345_latent_convert_to_register
uint8_t adxl345_latent_convert_to_register(adxl345_handle_t *handle, float ms, uint8_t *reg)
convert the latent to the register raw data
Definition: driver_adxl345.c:680
adxl345_tap_axis_t
adxl345_tap_axis_t
adxl345 tap axis enumeration definition
Definition: driver_adxl345.h:113
adxl345_offset_convert_to_register
uint8_t adxl345_offset_convert_to_register(adxl345_handle_t *handle, float g, int8_t *reg)
convert the offset to the register raw data
Definition: driver_adxl345.c:472
adxl345_init
uint8_t adxl345_init(adxl345_handle_t *handle)
initialize the chip
Definition: driver_adxl345.c:3156
adxl345_coupled_t
adxl345_coupled_t
adxl345 coupled enumeration definition
Definition: driver_adxl345.h:91
adxl345_inaction_time_convert_to_data
uint8_t adxl345_inaction_time_convert_to_data(adxl345_handle_t *handle, uint8_t reg, uint8_t *s)
convert the register raw data to the inaction time
Definition: driver_adxl345.c:1123
adxl345_window_convert_to_data
uint8_t adxl345_window_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *ms)
convert the register raw data to the window time
Definition: driver_adxl345.c:811
adxl345_set_action_coupled
uint8_t adxl345_set_action_coupled(adxl345_handle_t *handle, adxl345_coupled_t coupled)
set the action coupled
Definition: driver_adxl345.c:1226
adxl345_bool_t
adxl345_bool_t
adxl345 bool enumeration definition
Definition: driver_adxl345.h:82
adxl345_get_inaction_threshold
uint8_t adxl345_get_inaction_threshold(adxl345_handle_t *handle, uint8_t *threshold)
get the inaction threshold
Definition: driver_adxl345.c:967
adxl345_get_tap_status
uint8_t adxl345_get_tap_status(adxl345_handle_t *handle, uint8_t *status)
get the tap status
Definition: driver_adxl345.c:1732
adxl345_get_self_test
uint8_t adxl345_get_self_test(adxl345_handle_t *handle, adxl345_bool_t *enable)
get the self test status
Definition: driver_adxl345.c:2045
adxl345_set_justify
uint8_t adxl345_set_justify(adxl345_handle_t *handle, adxl345_justify_t enable)
enable or disable the justify
Definition: driver_adxl345.c:2304
adxl345_set_interface
uint8_t adxl345_set_interface(adxl345_handle_t *handle, adxl345_interface_t interface)
set the chip interface
Definition: driver_adxl345.c:180
adxl345_get_action_threshold
uint8_t adxl345_get_action_threshold(adxl345_handle_t *handle, uint8_t *threshold)
get the action threshold
Definition: driver_adxl345.c:863
adxl345_set_mode
uint8_t adxl345_set_mode(adxl345_handle_t *handle, adxl345_mode_t mode)
set the chip mode
Definition: driver_adxl345.c:2452
adxl345_latent_convert_to_data
uint8_t adxl345_latent_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *ms)
convert the register raw data to the latent
Definition: driver_adxl345.c:707
adxl345_get_tap_suppress
uint8_t adxl345_get_tap_suppress(adxl345_handle_t *handle, adxl345_bool_t *enable)
get the tap suppress status
Definition: driver_adxl345.c:1695
adxl345_sleep_frequency_t
adxl345_sleep_frequency_t
adxl345 sleep frequency enumeration definition
Definition: driver_adxl345.h:195
adxl345_offset_convert_to_data
uint8_t adxl345_offset_convert_to_data(adxl345_handle_t *handle, int8_t reg, float *g)
convert the register raw data to the offset
Definition: driver_adxl345.c:499
adxl345_mode_t
adxl345_mode_t
adxl345 mode enumeration definition
Definition: driver_adxl345.h:206
adxl345_info
uint8_t adxl345_info(adxl345_info_t *info)
get chip's information
Definition: driver_adxl345.c:3912
adxl345_set_tap_threshold
uint8_t adxl345_set_tap_threshold(adxl345_handle_t *handle, uint8_t threshold)
set the tap threshold
Definition: driver_adxl345.c:266
adxl345_set_range
uint8_t adxl345_set_range(adxl345_handle_t *handle, adxl345_range_t range)
set the chip range
Definition: driver_adxl345.c:2378
adxl345_free_fall_threshold_convert_to_data
uint8_t adxl345_free_fall_threshold_convert_to_data(adxl345_handle_t *handle, uint8_t reg, float *g)
convert the register raw data to the free fall threshold
Definition: driver_adxl345.c:1451
ADXL345_INTERFACE_IIC
@ ADXL345_INTERFACE_IIC
Definition: driver_adxl345.h:65
ADXL345_MODE_BYPASS
@ ADXL345_MODE_BYPASS
Definition: driver_adxl345.h:207
adxl345_get_reg
uint8_t adxl345_get_reg(adxl345_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
get the chip register
Definition: driver_adxl345.c:3890
adxl345_set_reg
uint8_t adxl345_set_reg(adxl345_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
set the chip register
Definition: driver_adxl345.c:3863
adxl345_get_watermark
uint8_t adxl345_get_watermark(adxl345_handle_t *handle, uint8_t *level)
get the fifo watermark
Definition: driver_adxl345.c:2637
adxl345_get_watermark_level
uint8_t adxl345_get_watermark_level(adxl345_handle_t *handle, uint8_t *level)
get the current fifo watermark level
Definition: driver_adxl345.c:2674
adxl345_set_watermark
uint8_t adxl345_set_watermark(adxl345_handle_t *handle, uint8_t level)
set the fifo watermark
Definition: driver_adxl345.c:2600
adxl345_interrupt_active_level_t
adxl345_interrupt_active_level_t
adxl345 interrupt active_level enumeration definition
Definition: driver_adxl345.h:259
adxl345_interrupt_pin_t
adxl345_interrupt_pin_t
adxl345 interrupt pin enumeration definition
Definition: driver_adxl345.h:250
adxl345_get_interrupt_source
uint8_t adxl345_get_interrupt_source(adxl345_handle_t *handle, uint8_t *source)
get the interrupt source
Definition: driver_adxl345.c:1983
adxl345_get_interrupt_active_level
uint8_t adxl345_get_interrupt_active_level(adxl345_handle_t *handle, adxl345_interrupt_active_level_t *active_level)
get the interrupt active level
Definition: driver_adxl345.c:2193
adxl345_set_interrupt
uint8_t adxl345_set_interrupt(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_bool_t enable)
enable or disable the interrupt
Definition: driver_adxl345.c:1832
adxl345_get_interrupt
uint8_t adxl345_get_interrupt(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_bool_t *enable)
get the interrupt status
Definition: driver_adxl345.c:1870
adxl345_interrupt_t
adxl345_interrupt_t
adxl345 interrupt enumeration definition
Definition: driver_adxl345.h:235
adxl345_set_interrupt_map
uint8_t adxl345_set_interrupt_map(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_interrupt_pin_t pin)
set the interrupt map
Definition: driver_adxl345.c:1908
adxl345_set_interrupt_active_level
uint8_t adxl345_set_interrupt_active_level(adxl345_handle_t *handle, adxl345_interrupt_active_level_t active_level)
set the interrupt active level
Definition: driver_adxl345.c:2156
adxl345_get_interrupt_map
uint8_t adxl345_get_interrupt_map(adxl345_handle_t *handle, adxl345_interrupt_t type, adxl345_interrupt_pin_t *pin)
get the interrupt map
Definition: driver_adxl345.c:1946
ADXL345_INTERRUPT_DATA_READY
@ ADXL345_INTERRUPT_DATA_READY
Definition: driver_adxl345.h:236
ADXL345_INTERRUPT_DOUBLE_TAP
@ ADXL345_INTERRUPT_DOUBLE_TAP
Definition: driver_adxl345.h:238
ADXL345_INTERRUPT_ACTIVITY
@ ADXL345_INTERRUPT_ACTIVITY
Definition: driver_adxl345.h:239
ADXL345_INTERRUPT_SINGLE_TAP
@ ADXL345_INTERRUPT_SINGLE_TAP
Definition: driver_adxl345.h:237
ADXL345_INTERRUPT_INACTIVITY
@ ADXL345_INTERRUPT_INACTIVITY
Definition: driver_adxl345.h:240
ADXL345_INTERRUPT_WATERMARK
@ ADXL345_INTERRUPT_WATERMARK
Definition: driver_adxl345.h:242
ADXL345_INTERRUPT_OVERRUN
@ ADXL345_INTERRUPT_OVERRUN
Definition: driver_adxl345.h:243
ADXL345_INTERRUPT_FREE_FALL
@ ADXL345_INTERRUPT_FREE_FALL
Definition: driver_adxl345.h:241
adxl345_handle_s
adxl345 handle structure definition
Definition: driver_adxl345.h:277
adxl345_handle_s::iic_spi
uint8_t iic_spi
Definition: driver_adxl345.h:291
adxl345_handle_s::inited
uint8_t inited
Definition: driver_adxl345.h:290
adxl345_handle_s::spi_init
uint8_t(* spi_init)(void)
Definition: driver_adxl345.h:283
adxl345_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition: driver_adxl345.h:288
adxl345_handle_s::spi_read
uint8_t(* spi_read)(uint8_t reg, uint8_t *buf, uint16_t len)
Definition: driver_adxl345.h:285
adxl345_handle_s::receive_callback
void(* receive_callback)(uint8_t type)
Definition: driver_adxl345.h:287
adxl345_handle_s::spi_write
uint8_t(* spi_write)(uint8_t reg, uint8_t *buf, uint16_t len)
Definition: driver_adxl345.h:286
adxl345_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition: driver_adxl345.h:289
adxl345_handle_s::iic_init
uint8_t(* iic_init)(void)
Definition: driver_adxl345.h:279
adxl345_handle_s::spi_deinit
uint8_t(* spi_deinit)(void)
Definition: driver_adxl345.h:284
adxl345_handle_s::iic_write
uint8_t(* iic_write)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
Definition: driver_adxl345.h:282
adxl345_handle_s::iic_addr
uint8_t iic_addr
Definition: driver_adxl345.h:278
adxl345_handle_s::iic_read
uint8_t(* iic_read)(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
Definition: driver_adxl345.h:281
adxl345_handle_s::iic_deinit
uint8_t(* iic_deinit)(void)
Definition: driver_adxl345.h:280
adxl345_info_s
adxl345 information structure definition
Definition: driver_adxl345.h:298
adxl345_info_s::temperature_max
float temperature_max
Definition: driver_adxl345.h:306
adxl345_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition: driver_adxl345.h:303
adxl345_info_s::driver_version
uint32_t driver_version
Definition: driver_adxl345.h:307
adxl345_info_s::temperature_min
float temperature_min
Definition: driver_adxl345.h:305
adxl345_info_s::max_current_ma
float max_current_ma
Definition: driver_adxl345.h:304
adxl345_info_s::manufacturer_name
char manufacturer_name[32]
Definition: driver_adxl345.h:300
adxl345_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition: driver_adxl345.h:302
adxl345_info_s::interface
char interface[8]
Definition: driver_adxl345.h:301
adxl345_info_s::chip_name
char chip_name[32]
Definition: driver_adxl345.h:299