37#ifndef DRIVER_CH9120_H
38#define DRIVER_CH9120_H
62#ifndef CH9120_UART_PRE_DELAY
63 #define CH9120_UART_PRE_DELAY 50
162#define DRIVER_CH9120_LINK_INIT(HANDLE, STRUCTURE) memset(HANDLE, 0, sizeof(STRUCTURE))
170#define DRIVER_CH9120_LINK_UART_INIT(HANDLE, FUC) (HANDLE)->uart_init = FUC
178#define DRIVER_CH9120_LINK_UART_DEINIT(HANDLE, FUC) (HANDLE)->uart_deinit = FUC
186#define DRIVER_CH9120_LINK_UART_READ(HANDLE, FUC) (HANDLE)->uart_read = FUC
194#define DRIVER_CH9120_LINK_UART_WRITE(HANDLE, FUC) (HANDLE)->uart_write = FUC
202#define DRIVER_CH9120_LINK_UART_FLUSH(HANDLE, FUC) (HANDLE)->uart_flush = FUC
210#define DRIVER_CH9120_LINK_RESET_GPIO_INIT(HANDLE, FUC) (HANDLE)->reset_gpio_init = FUC
218#define DRIVER_CH9120_LINK_RESET_GPIO_DEINIT(HANDLE, FUC) (HANDLE)->reset_gpio_deinit = FUC
226#define DRIVER_CH9120_LINK_RESET_GPIO_WRITE(HANDLE, FUC) (HANDLE)->reset_gpio_write = FUC
234#define DRIVER_CH9120_LINK_CFG_GPIO_INIT(HANDLE, FUC) (HANDLE)->cfg_gpio_init = FUC
242#define DRIVER_CH9120_LINK_CFG_GPIO_DEINIT(HANDLE, FUC) (HANDLE)->cfg_gpio_deinit = FUC
250#define DRIVER_CH9120_LINK_CFG_GPIO_WRITE(HANDLE, FUC) (HANDLE)->cfg_gpio_write = FUC
258#define DRIVER_CH9120_LINK_DELAY_MS(HANDLE, FUC) (HANDLE)->delay_ms = FUC
266#define DRIVER_CH9120_LINK_DEBUG_PRINT(HANDLE, FUC) (HANDLE)->debug_print = FUC
843 uint8_t *param, uint16_t len,
844 uint8_t *out, uint16_t out_len,
845 uint16_t pre_delay, uint16_t timeout);
uint8_t ch9120_set_uart_baud(ch9120_handle_t *handle, uint32_t baud)
set uart baud
uint8_t ch9120_set_dest_ip(ch9120_handle_t *handle, uint8_t ip[4])
set dest ip
uint8_t ch9120_get_status(ch9120_handle_t *handle, ch9120_status_t *status)
get status
uint8_t ch9120_get_disconnect_with_no_rj45(ch9120_handle_t *handle, ch9120_bool_t *enable)
get disconnect with no rj45 status
uint8_t ch9120_get_gateway(ch9120_handle_t *handle, uint8_t ip[4])
get gateway
uint8_t ch9120_get_uart_baud(ch9120_handle_t *handle, uint32_t *baud)
get uart baud
uint8_t ch9120_get_dest_port(ch9120_handle_t *handle, uint16_t *num)
get dest port
struct ch9120_info_s ch9120_info_t
ch9120 information structure definition
uint8_t ch9120_get_uart_buffer_length(ch9120_handle_t *handle, uint32_t *len)
get uart buffer length
uint8_t ch9120_uart_timeout_convert_to_data(ch9120_handle_t *handle, uint8_t reg, uint16_t *ms)
convert the register raw data to the offset
uint8_t ch9120_init(ch9120_handle_t *handle)
initialize the chip
uint8_t ch9120_get_ip(ch9120_handle_t *handle, uint8_t ip[4])
get ip address
ch9120_mode_t
ch9120 mode enumeration definition
struct ch9120_handle_s ch9120_handle_t
ch9120 handle structure definition
uint8_t ch9120_get_source_port(ch9120_handle_t *handle, uint16_t *num)
get source port
ch9120_parity_t
ch9120 parity enumeration definition
uint8_t ch9120_read(ch9120_handle_t *handle, uint8_t *buf, uint16_t *len)
read data
uint8_t ch9120_get_uart_timeout(ch9120_handle_t *handle, uint8_t *timeout)
get uart timeout
uint8_t ch9120_set_dest_port(ch9120_handle_t *handle, uint16_t num)
set dest port
uint8_t ch9120_reset(ch9120_handle_t *handle)
reset the chip
uint8_t ch9120_set_source_port_random(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable random source port number
uint8_t ch9120_set_uart_config(ch9120_handle_t *handle, uint8_t data_bit, ch9120_parity_t parity, uint8_t stop_bit)
set uart config
uint8_t ch9120_set_uart_buffer_length(ch9120_handle_t *handle, uint32_t len)
set uart buffer length
uint8_t ch9120_set_uart_flush(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable uart auto flush
uint8_t ch9120_get_dest_ip(ch9120_handle_t *handle, uint8_t ip[4])
get dest ip
uint8_t ch9120_deinit(ch9120_handle_t *handle)
close the chip
uint8_t ch9120_get_uart_flush(ch9120_handle_t *handle, ch9120_bool_t *enable)
get uart auto flush status
uint8_t ch9120_set_gateway(ch9120_handle_t *handle, uint8_t ip[4])
set gateway
uint8_t ch9120_config_and_reset(ch9120_handle_t *handle)
config and reset the chip
uint8_t ch9120_set_uart_timeout(ch9120_handle_t *handle, uint8_t timeout)
set uart timeout
uint8_t ch9120_get_uart_config(ch9120_handle_t *handle, uint8_t *data_bit, ch9120_parity_t *parity, uint8_t *stop_bit)
get uart config
uint8_t ch9120_exit(ch9120_handle_t *handle)
exit
uint8_t ch9120_get_mode(ch9120_handle_t *handle, ch9120_mode_t *mode)
get mode
uint8_t ch9120_set_disconnect_with_no_rj45(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable disconnect with no rj45
uint8_t ch9120_info(ch9120_info_t *info)
get chip's information
uint8_t ch9120_set_mode(ch9120_handle_t *handle, ch9120_mode_t mode)
set mode
uint8_t ch9120_get_subnet_mask(ch9120_handle_t *handle, uint8_t mask[4])
get subnet mask
uint8_t ch9120_uart_timeout_convert_to_register(ch9120_handle_t *handle, uint16_t ms, uint8_t *reg)
convert the uart timeout to the register raw data
uint8_t ch9120_set_dhcp(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable dhcp
ch9120_bool_t
ch9120 bool enumeration definition
uint8_t ch9120_save_to_eeprom(ch9120_handle_t *handle)
save to eeprom
uint8_t ch9120_set_subnet_mask(ch9120_handle_t *handle, uint8_t mask[4])
set subnet mask
ch9120_status_t
ch9120 status enumeration definition
uint8_t ch9120_set_ip(ch9120_handle_t *handle, uint8_t ip[4])
set ip address
uint8_t ch9120_write(ch9120_handle_t *handle, uint8_t *buf, uint16_t len)
write data
uint8_t ch9120_get_version(ch9120_handle_t *handle, uint8_t *version)
get version
uint8_t ch9120_set_source_port(ch9120_handle_t *handle, uint16_t num)
set source port
@ CH9120_STATUS_DISCONNECT
uint8_t ch9120_set_command(ch9120_handle_t *handle, uint8_t *param, uint16_t len, uint8_t *out, uint16_t out_len, uint16_t pre_delay, uint16_t timeout)
set command
ch9120 handle structure definition
uint8_t(* uart_flush)(void)
uint8_t(* cfg_gpio_write)(uint8_t data)
uint8_t(* uart_write)(uint8_t *buf, uint16_t len)
void(* delay_ms)(uint32_t ms)
uint8_t(* cfg_gpio_init)(void)
uint8_t(* uart_deinit)(void)
uint8_t(* reset_gpio_deinit)(void)
void(* debug_print)(const char *const fmt,...)
uint16_t(* uart_read)(uint8_t *buf, uint16_t len)
uint8_t(* reset_gpio_init)(void)
uint8_t(* uart_init)(void)
uint8_t(* reset_gpio_write)(uint8_t data)
uint8_t(* cfg_gpio_deinit)(void)
ch9120 information structure definition
float supply_voltage_max_v
char manufacturer_name[32]
float supply_voltage_min_v