LibDriver CH9121
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driver_ch9121_basic.c
Go to the documentation of this file.
1
36
37#include "driver_ch9121_basic.h"
38
39static ch9121_handle_t gs_handle;
40
79
96 uint8_t ip[4], uint16_t port,
97 uint8_t mask[4], uint8_t gateway[4],
98 uint8_t dest_ip[4], uint16_t dest_port)
99{
100 uint8_t res;
101 uint8_t reg;
102
103 /* set default dhcp */
105 if (res != 0)
106 {
107 ch9121_interface_debug_print("ch9121: set dhcp failed.\n");
108
109 return 1;
110 }
111
112 /* set local ip */
113 res = ch9121_set_ip(&gs_handle, ip);
114 if (res != 0)
115 {
116 ch9121_interface_debug_print("ch9121: set ip failed.\n");
117
118 return 1;
119 }
120
121 /* set subnet mask */
122 res = ch9121_set_subnet_mask(&gs_handle, mask);
123 if (res != 0)
124 {
125 ch9121_interface_debug_print("ch9121: set subnet mask failed.\n");
126
127 return 1;
128 }
129
130 /* set gateway */
131 res = ch9121_set_gateway(&gs_handle, gateway);
132 if (res != 0)
133 {
134 ch9121_interface_debug_print("ch9121: set gateway failed.\n");
135
136 return 1;
137 }
138
139 /* set source port */
140 res = ch9121_set_source_port(&gs_handle, uart_port, port);
141 if (res != 0)
142 {
143 ch9121_interface_debug_print("ch9121: set source port failed.\n");
144
145 return 1;
146 }
147
148 /* set dest ip */
149 res = ch9121_set_dest_ip(&gs_handle, uart_port, dest_ip);
150 if (res != 0)
151 {
152 ch9121_interface_debug_print("ch9121: set dest ip failed.\n");
153
154 return 1;
155 }
156
157 /* set dest port */
158 res = ch9121_set_dest_port(&gs_handle, uart_port, dest_port);
159 if (res != 0)
160 {
161 ch9121_interface_debug_print("ch9121: set dest port failed.\n");
162
163 return 1;
164 }
165
166 /* set default uart baud */
167 res = ch9121_set_uart_baud(&gs_handle, uart_port, CH9121_BASIC_DEFAULT_UART_PORT);
168 if (res != 0)
169 {
170 ch9121_interface_debug_print("ch9121: set uart baud failed.\n");
171
172 return 1;
173 }
174
175 /* set default uart config */
178 if (res != 0)
179 {
180 ch9121_interface_debug_print("ch9121: set uart config failed.\n");
181
182 return 1;
183 }
184
185 /* set default uart timeout */
187 if (res != 0)
188 {
189 ch9121_interface_debug_print("ch9121: uart timeout convert to register failed.\n");
190
191 return 1;
192 }
193
194 /* set uart timeout */
195 res = ch9121_set_uart_timeout(&gs_handle, uart_port, reg);
196 if (res != 0)
197 {
198 ch9121_interface_debug_print("ch9121: set uart timeout failed.\n");
199
200 return 1;
201 }
202
203 /* set default source port random */
205 if (res != 0)
206 {
207 ch9121_interface_debug_print("ch9121: set source port random failed.\n");
208
209 return 1;
210 }
211
212 /* set default uart buffer length */
214 if (res != 0)
215 {
216 ch9121_interface_debug_print("ch9121: set uart buffer length failed.\n");
217
218 return 1;
219 }
220
221 /* set default uart flush */
222 res = ch9121_set_uart_flush(&gs_handle, uart_port, CH9121_BASIC_DEFAULT_UART_FLUSH);
223 if (res != 0)
224 {
225 ch9121_interface_debug_print("ch9121: set uart flush failed.\n");
226
227 return 1;
228 }
229
230 /* set default port2 */
232 if (res != 0)
233 {
234 ch9121_interface_debug_print("ch9121: set port2 failed.\n");
235
236 return 1;
237 }
238
239 /* set default disconnect with no rj45 */
241 if (res != 0)
242 {
243 ch9121_interface_debug_print("ch9121: set disconnect with no rj45 failed.\n");
244
245 return 1;
246 }
247
248 /* set mode */
249 res = ch9121_set_mode(&gs_handle, uart_port, mode);
250 if (res != 0)
251 {
252 ch9121_interface_debug_print("ch9121: set mode failed.\n");
253
254 return 1;
255 }
256
257 /* save to eeprom */
258 res = ch9121_save_to_eeprom(&gs_handle);
259 if (res != 0)
260 {
261 ch9121_interface_debug_print("ch9121: save to eeprom failed.\n");
262
263 return 1;
264 }
265
266 /* config and reset */
267 res = ch9121_config_and_reset(&gs_handle);
268 if (res != 0)
269 {
270 ch9121_interface_debug_print("ch9121: config and reset failed.\n");
271
272 return 1;
273 }
274
275 return 0;
276}
277
287uint8_t ch9121_basic_read(uint8_t *buf, uint16_t *len)
288{
289 if (ch9121_read(&gs_handle, buf, len) != 0)
290 {
291 return 1;
292 }
293
294 return 0;
295}
296
306uint8_t ch9121_basic_write(uint8_t *buf, uint16_t len)
307{
308 if (ch9121_write(&gs_handle, buf, len) != 0)
309 {
310 return 1;
311 }
312
313 return 0;
314}
315
324{
325 /* deinit ch9121 */
326 if (ch9121_deinit(&gs_handle) != 0)
327 {
328 return 1;
329 }
330
331 return 0;
332}
driver ch9121 basic header file
uint8_t ch9121_init(ch9121_handle_t *handle)
initialize the chip
ch9121_mode_t
ch9121 mode enumeration definition
uint8_t ch9121_set_uart_baud(ch9121_handle_t *handle, ch9121_port_t port, uint32_t baud)
set uart baud
uint8_t ch9121_set_dhcp(ch9121_handle_t *handle, ch9121_bool_t enable)
enable or disable dhcp
uint8_t ch9121_set_ip(ch9121_handle_t *handle, uint8_t ip[4])
set ip address
uint8_t ch9121_config_and_reset(ch9121_handle_t *handle)
config and reset the chip
uint8_t ch9121_set_disconnect_with_no_rj45(ch9121_handle_t *handle, ch9121_bool_t enable)
enable or disable disconnect with no rj45
uint8_t ch9121_set_uart_flush(ch9121_handle_t *handle, ch9121_port_t port, ch9121_bool_t enable)
enable or disable uart auto flush
uint8_t ch9121_deinit(ch9121_handle_t *handle)
close the chip
uint8_t ch9121_read(ch9121_handle_t *handle, uint8_t *buf, uint16_t *len)
read data
uint8_t ch9121_set_source_port_random(ch9121_handle_t *handle, ch9121_port_t port, ch9121_bool_t enable)
enable or disable random source port number
uint8_t ch9121_set_mode(ch9121_handle_t *handle, ch9121_port_t port, ch9121_mode_t mode)
set mode
struct ch9121_handle_s ch9121_handle_t
ch9121 handle structure definition
uint8_t ch9121_set_dest_ip(ch9121_handle_t *handle, ch9121_port_t port, uint8_t ip[4])
set dest ip
uint8_t ch9121_save_to_eeprom(ch9121_handle_t *handle)
save to eeprom
uint8_t ch9121_set_uart_config(ch9121_handle_t *handle, ch9121_port_t port, uint8_t data_bit, ch9121_parity_t parity, uint8_t stop_bit)
set uart config
ch9121_port_t
ch9121 port enumeration definition
uint8_t ch9121_uart_timeout_convert_to_register(ch9121_handle_t *handle, uint16_t ms, uint8_t *reg)
convert the uart timeout to the register raw data
uint8_t ch9121_set_subnet_mask(ch9121_handle_t *handle, uint8_t mask[4])
set subnet mask
uint8_t ch9121_set_uart_timeout(ch9121_handle_t *handle, ch9121_port_t port, uint8_t timeout)
set uart timeout
uint8_t ch9121_set_gateway(ch9121_handle_t *handle, uint8_t ip[4])
set gateway
uint8_t ch9121_set_source_port(ch9121_handle_t *handle, ch9121_port_t port, uint16_t num)
set source port
uint8_t ch9121_set_port2(ch9121_handle_t *handle, ch9121_bool_t enable)
enable or disable uart port2
uint8_t ch9121_set_dest_port(ch9121_handle_t *handle, ch9121_port_t port, uint16_t num)
set dest port
uint8_t ch9121_set_uart_buffer_length(ch9121_handle_t *handle, ch9121_port_t port, uint32_t len)
set uart buffer length
uint8_t ch9121_write(ch9121_handle_t *handle, uint8_t *buf, uint16_t len)
write data
#define CH9121_BASIC_DEFAULT_UART_SOURCE_PORT_RANDOM
#define CH9121_BASIC_DEFAULT_UART_FLUSH
#define CH9121_BASIC_DEFAULT_UART_TIMEOUT
uint8_t ch9121_basic_read(uint8_t *buf, uint16_t *len)
basic example read data
#define CH9121_BASIC_DEFAULT_UART_PORT2
#define CH9121_BASIC_DEFAULT_UART_BUFFER_LENGTH
#define CH9121_BASIC_DEFAULT_UART_PORT
uint8_t ch9121_basic_deinit(void)
basic example deinit
uint8_t ch9121_basic_config(ch9121_port_t uart_port, ch9121_mode_t mode, uint8_t ip[4], uint16_t port, uint8_t mask[4], uint8_t gateway[4], uint8_t dest_ip[4], uint16_t dest_port)
basic example config
#define CH9121_BASIC_DEFAULT_UART_PARITY
uint8_t ch9121_basic_init(void)
basic example init
#define CH9121_BASIC_DEFAULT_UART_STOP_BIT
#define CH9121_BASIC_DEFAULT_DHCP
ch9121 basic example default definition
#define CH9121_BASIC_DEFAULT_UART_DATA_BIT
uint8_t ch9121_basic_write(uint8_t *buf, uint16_t len)
basic example write data
#define CH9121_BASIC_DEFAULT_DISCONNECT_WITH_NO_RJ45
uint8_t ch9121_interface_cfg_gpio_deinit(void)
interface cfg gpio deinit
void ch9121_interface_delay_ms(uint32_t ms)
interface delay ms
uint8_t ch9121_interface_cfg_gpio_write(uint8_t data)
interface cfg gpio write
uint16_t ch9121_interface_uart_read(uint8_t *buf, uint16_t len)
interface uart read
uint8_t ch9121_interface_uart_deinit(void)
interface uart deinit
uint8_t ch9121_interface_uart_flush(void)
interface uart flush
uint8_t ch9121_interface_uart_write(uint8_t *buf, uint16_t len)
interface uart write
uint8_t ch9121_interface_uart_init(void)
interface uart init
void ch9121_interface_debug_print(const char *const fmt,...)
interface print format data
uint8_t ch9121_interface_cfg_gpio_init(void)
interface cfg gpio init
uint8_t ch9121_interface_reset_gpio_init(void)
interface reset gpio init
uint8_t ch9121_interface_reset_gpio_write(uint8_t data)
interface reset gpio write
uint8_t ch9121_interface_reset_gpio_deinit(void)
interface reset gpio deinit