38#ifndef DRIVER_L3GD20H_BASIC_H
39#define DRIVER_L3GD20H_BASIC_H
57#define L3GD20H_BASIC_DEFAULT_BOOT L3GD20H_BOOT_NORMAL
58#define L3GD20H_BASIC_DEFAULT_AXIS_X L3GD20H_BOOL_TRUE
59#define L3GD20H_BASIC_DEFAULT_AXIS_Y L3GD20H_BOOL_TRUE
60#define L3GD20H_BASIC_DEFAULT_AXIS_Z L3GD20H_BOOL_TRUE
61#define L3GD20H_BASIC_DEFAULT_RATE_BANDWIDTH L3GD20H_LOW_ODR_0_ODR_100HZ_BW_0_12P5HZ
62#define L3GD20H_BASIC_DEFAULT_EDGE_TRIGGER L3GD20H_BOOL_FALSE
63#define L3GD20H_BASIC_DEFAULT_LEVEL_TRIGGER L3GD20H_BOOL_FALSE
64#define L3GD20H_BASIC_DEFAULT_LEVEL_SENSITIVE_LATCHED L3GD20H_BOOL_TRUE
65#define L3GD20H_BASIC_DEFAULT_SELF_TEST L3GD20H_SELF_TEST_NORMAL
66#define L3GD20H_BASIC_DEFAULT_HIGH_PASS_FILTER_MODE L3GD20H_HIGH_PASS_FILTER_MODE_NORMAL
67#define L3GD20H_BASIC_DEFAULT_HIGH_PASS_FILTER_CUT_OFF L3GD20H_HIGH_PASS_FILTER_CUT_OFF_FREQUENCY_0
68#define L3GD20H_BASIC_DEFAULT_HIGH_PASS_FILTER L3GD20H_BOOL_TRUE
69#define L3GD20H_BASIC_DEFAULT_BLOCK_DATA_UPDATE L3GD20H_BOOL_FALSE
70#define L3GD20H_BASIC_DEFAULT_OUT_SELECTION L3GD20H_SELECTION_LPF1_HPF_LPF2
71#define L3GD20H_BASIC_DEFAULT_INTERRUPT_SELECTION L3GD20H_SELECTION_LPF1_HPF_LPF2
72#define L3GD20H_BASIC_DEFAULT_HIGH_PASS_FILTER_REFERENCE 0x00
73#define L3GD20H_BASIC_DEFAULT_INTERRUPT1 L3GD20H_BOOL_FALSE
74#define L3GD20H_BASIC_DEFAULT_BOOT_ON_INTERRUPT1 L3GD20H_BOOL_FALSE
75#define L3GD20H_BASIC_DEFAULT_INTERRUPT_ACTIVE_LEVEL L3GD20H_INTERRUPT_ACTIVE_LEVEL_LOW
76#define L3GD20H_BASIC_DEFAULT_INTERRUPT_PIN_TYPE L3GD20H_PIN_PUSH_PULL
77#define L3GD20H_BASIC_DEFAULT_DATA_READY_ON_INTERRUPT2 L3GD20H_BOOL_FALSE
78#define L3GD20H_BASIC_DEFAULT_FIFO_THRESHOLD_ON_INTERRUPT2 L3GD20H_BOOL_FALSE
79#define L3GD20H_BASIC_DEFAULT_FIFO_OVERRUN_ON_INTERRUPT2 L3GD20H_BOOL_FALSE
80#define L3GD20H_BASIC_DEFAULT_FIFO_EMPTY_ON_INTERRUPT2 L3GD20H_BOOL_FALSE
81#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_AND_OR_COMBINATION L3GD20H_BOOL_FALSE
82#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_LATCH L3GD20H_BOOL_FALSE
83#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_Z_HIGH_EVENT L3GD20H_BOOL_FALSE
84#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_Z_LOW_EVENT L3GD20H_BOOL_FALSE
85#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_Y_HIGH_EVENT L3GD20H_BOOL_FALSE
86#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_Y_LOW_EVENT L3GD20H_BOOL_FALSE
87#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_X_HIGH_EVENT L3GD20H_BOOL_FALSE
88#define L3GD20H_BASIC_DEFAULT_INTERRUPT_EVENT_X_LOW_EVENT L3GD20H_BOOL_FALSE
89#define L3GD20H_BASIC_DEFAULT_INTERRUPT_THRESHOLD 0.0f
90#define L3GD20H_BASIC_DEFAULT_COUNTER_MODE L3GD20H_COUNTER_MODE_RESET
91#define L3GD20H_BASIC_DEFAULT_WAIT L3GD20H_BOOL_TRUE
92#define L3GD20H_BASIC_DEFAULT_DURATION 0x01
93#define L3GD20H_BASIC_DEFAULT_DATA_READY_ACTIVE_LEVEL L3GD20H_INTERRUPT_ACTIVE_LEVEL_LOW
94#define L3GD20H_BASIC_DEFAULT_STOP_ON_FIFO_THRESHOLD L3GD20H_BOOL_TRUE
95#define L3GD20H_BASIC_DEFAULT_FIFO_THRESHOLD 16
96#define L3GD20H_BASIC_DEFAULT_DATA_FORMAT L3GD20H_DATA_FORMAT_LITTLE_ENDIAN
97#define L3GD20H_BASIC_DEFAULT_FULL_SCALE L3GD20H_FULL_SCALE_245_DPS
driver l3gd20h interface header file
l3gd20h_address_t
l3gd20h address enumeration definition
l3gd20h_interface_t
l3gd20h interface enumeration definition
uint8_t l3gd20h_basic_init(l3gd20h_interface_t interface, l3gd20h_address_t addr_pin)
basic example init
uint8_t l3gd20h_basic_deinit(void)
basic example deinit
uint8_t l3gd20h_basic_read(float dps[3])
basic example read