LibDriver LD3320
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driver_ld3320.c
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1
36
37#include "driver_ld3320.h"
38
42#define CHIP_NAME "IC Route LD3320"
43#define MANUFACTURER_NAME "IC Route"
44#define SUPPLY_VOLTAGE_MIN 3.0f
45#define SUPPLY_VOLTAGE_MAX 3.3f
46#define MAX_CURRENT 166.7f
47#define TEMPERATURE_MIN -40.0f
48#define TEMPERATURE_MAX 85.0f
49#define DRIVER_VERSION 1000
50
54#define LD3320_REG_FIFO_DATA 0x01
55#define LD3320_REG_FIFO_INT_CONF 0x02
56#define LD3320_REG_FIFO_EXT 0x05
57#define LD3320_REG_FIFO_STATUS 0x06
58#define LD3320_REG_FIFO_CLEAR 0x08
59#define LD3320_REG_CLK_CONF1 0x11
60#define LD3320_REG_CMD 0x17
61#define LD3320_REG_CLK_CONF2 0x19
62#define LD3320_REG_CLK_CONF3 0x1B
63#define LD3320_REG_ADC_CONF 0x1C
64#define LD3320_REG_CLK_CONF4 0x1D
65#define LD3320_REG_ADC_CONTROL 0x1E
66#define LD3320_REG_FIFO_DATA_UPPER_LOW 0x20
67#define LD3320_REG_FIFO_DATA_UPPER_HIGH 0x21
68#define LD3320_REG_FIFO_DATA_LOWER_LOW 0x22
69#define LD3320_REG_FIFO_DATA_LOWER_HIGH 0x23
70#define LD3320_REG_FIFO_MCU_WATER_MARK_L 0x24
71#define LD3320_REG_FIFO_MCU_WATER_MARK_H 0x25
72#define LD3320_REG_FIFO_DSP_WATER_MARK_L 0x26
73#define LD3320_REG_FIFO_DSP_WATER_MARK_H 0x27
74#define LD3320_REG_INT_CONF 0x29
75#define LD3320_REG_INT_FLAG 0x2B
76#define LD3320_REG_MP3_CONF 0x33
77#define LD3320_REG_ADC_GAIN 0x35
78#define LD3320_REG_DSP_CMD 0x37
79#define LD3320_REG_FIFO_EXT_UPPER_LOW 0x38
80#define LD3320_REG_FIFO_EXT_UPPER_HIGH 0x3A
81#define LD3320_REG_FIFO_EXT_LOWER_LOW 0x3C
82#define LD3320_REG_FIFO_EXT_LOWER_HIGH 0x3E
83#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_L 0x40
84#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_H 0x42
85#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_L 0x44
86#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_H 0x46
87#define LD3320_REG_INIT 0x6F
88#define LD3320_REG_CLK_CONF5 0x79
89#define LD3320_REG_HEADSET_LEFT 0x81
90#define LD3320_REG_HEADSET_RIGHT 0x83
91#define LD3320_REG_FEEDBACK 0x85
92#define LD3320_REG_ANALOG_CONTROL1 0x87
93#define LD3320_REG_ANALOG_CONTROL2 0x89
94#define LD3320_REG_GAIN_CONTROL 0x8D
95#define LD3320_REG_SPEAKER 0x8E
96#define LD3320_REG_LINEOUT 0x8F
97#define LD3320_REG_ASR_STATUS 0xB2
98#define LD3320_REG_ASR_VAD_PARAM 0xB3
99#define LD3320_REG_ASR_VAD_START 0xB4
100#define LD3320_REG_ASR_VAD_SILENCE_END 0xB5
101#define LD3320_REG_ASR_VAD_VOICE_MAX_LEN 0xB6
102#define LD3320_REG_ASR_PASS_FRAME 0xB7
103#define LD3320_REG_ASR_TIME 0xB8
104#define LD3320_REG_ASR_STR_LEN 0xB9
105#define LD3320_REG_INT_AUX 0xBA
106#define LD3320_REG_ASR_FORCE_STOP 0xBC
107#define LD3320_REG_INIT_CONTROL 0xBD
108#define LD3320_REG_ASR_STATUS2 0xBF
109#define LD3320_REG_ASR_INDEX 0xC1
110#define LD3320_REG_ASR_DATA 0xC3
111#define LD3320_REG_ASR_RES_1 0xC5
112#define LD3320_REG_ASR_RES_2 0xC7
113#define LD3320_REG_ASR_RES_3 0xC9
114#define LD3320_REG_ASR_RES_4 0xCB
115#define LD3320_REG_ASR_DSP_SLEEP 0xCD
116#define LD3320_REG_LOW_POWER 0xCF
117
121#define LD3320_PLL_MP3_19 0x0F
122#define LD3320_PLL_MP3_1B 0x18
123#define LD3320_PLL_MP3_1D (uint8_t)(((90.0f * ((LD3320_PLL_11) + 1.0f)) / (LD3320_CYSTAL_MHZ)) - 1.0f)
124#define LD3320_PLL_11 (uint8_t)((LD3320_CYSTAL_MHZ / 2.0f) - 1.0f)
125#define LD3320_PLL_ASR_19 (uint8_t)(LD3320_CYSTAL_MHZ * 32.0f / (LD3320_PLL_11 + 1.0f) - 0.51f)
126#define LD3320_PLL_ASR_1B 0x48
127#define LD3320_PLL_ASR_1D 0x1F
128
139static uint8_t a_ld3320_write_byte(ld3320_handle_t *handle, uint8_t address, uint8_t data)
140{
141 uint8_t res;
142 uint8_t buf[3];
143
144 buf[0] = 0x04; /* set write command */
145 buf[1] = address; /* set register address */
146 buf[2] = data; /* set written data */
147 res = handle->spi_write_cmd((uint8_t *)buf, 3); /* write data command */
148 if (res != 0) /* check result */
149 {
150 return 1; /* return error */
151 }
152 else
153 {
154 return 0; /* success return 0 */
155 }
156}
157
168static uint8_t a_ld3320_read_byte(ld3320_handle_t *handle, uint8_t address, uint8_t *data)
169{
170 uint8_t res;
171 uint16_t reg;
172
173 reg = ((uint16_t)(0x05) << 8) | address; /* set register */
174 res = handle->spi_read_address16(reg, data, 1); /* read data */
175 if (res != 0) /* check result */
176 {
177 return 1; /* return error */
178 }
179 else
180 {
181 return 0; /* success return 0 */
182 }
183}
184
193static uint8_t a_ld3320_common_init(ld3320_handle_t *handle)
194{
195 uint8_t res;
196 uint8_t reg;
197
198 res = a_ld3320_read_byte(handle, LD3320_REG_FIFO_STATUS, (uint8_t *)&reg); /* read fifo status */
199 if (res != 0) /* check result */
200 {
201 handle->debug_print("ld3320: read fifo status failed.\n"); /* read fifo status failed */
202
203 return 1; /* return error */
204 }
205 res = a_ld3320_write_byte(handle, LD3320_REG_CMD, 0x35); /* send soft reset command */
206 if (res != 0) /* check result */
207 {
208 handle->debug_print("ld3320: send command failed.\n"); /* send command failed */
209
210 return 1; /* return error */
211 }
212 handle->delay_ms(10); /* delay 10 ms */
213 res = a_ld3320_read_byte(handle, LD3320_REG_FIFO_STATUS, (uint8_t *)&reg); /* read fifo status */
214 if (res != 0) /* check result */
215 {
216 handle->debug_print("ld3320: read fifo status failed.\n"); /* read fifo status failed */
217
218 return 1; /* return error */
219 }
220 res = a_ld3320_write_byte(handle, LD3320_REG_ANALOG_CONTROL2, 0x03); /* set analog control2 */
221 if (res != 0) /* check result */
222 {
223 handle->debug_print("ld3320: write byte failed.\n"); /* write byte failed */
224
225 return 1; /* return error */
226 }
227 handle->delay_ms(5); /* delay 5 ms */
228 res = a_ld3320_write_byte(handle, LD3320_REG_LOW_POWER, 0x43); /* set low power */
229 if (res != 0) /* check result */
230 {
231 handle->debug_print("ld3320: set low power failed.\n"); /* set low power failed */
232
233 return 1; /* return error */
234 }
235 handle->delay_ms(5); /* delay 5 ms */
236 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_RES_4, 0x02); /* set asr result 4 */
237 if (res != 0) /* check result */
238 {
239 handle->debug_print("ld3320: write byte failed.\n"); /* write byte failed */
240
241 return 1; /* return error */
242 }
243 res = a_ld3320_write_byte(handle, LD3320_REG_CLK_CONF1, LD3320_PLL_11); /* set clock configure 1 */
244 if (res != 0) /* check result */
245 {
246 handle->debug_print("ld3320: set clock configure 1 failed.\n"); /* set clock configure 1 failed */
247
248 return 1; /* return error */
249 }
250 if (handle->mode == LD3320_MODE_ASR) /* asr mode */
251 {
252 res = a_ld3320_write_byte(handle, LD3320_REG_ADC_CONTROL, 0x00); /* set the adc control */
253 if (res != 0) /* check result */
254 {
255 handle->debug_print("ld3320: set adc control failed.\n"); /* set adc control failed */
256
257 return 1; /* return error */
258 }
259 res = a_ld3320_write_byte(handle, LD3320_REG_CLK_CONF2, LD3320_PLL_ASR_19); /* set clock conf 2 */
260 if (res != 0) /* check result */
261 {
262 handle->debug_print("ld3320: set clock conf 3 failed.\n"); /* set clock conf 2 failed */
263
264 return 1; /* return error */
265 }
266 res = a_ld3320_write_byte(handle, LD3320_REG_CLK_CONF3, LD3320_PLL_ASR_1B); /* set clock conf 3 */
267 if (res != 0) /* check result */
268 {
269 handle->debug_print("ld3320: set clock conf 3 failed.\n"); /* set clock conf 3 failed */
270
271 return 1; /* return error */
272 }
273 res = a_ld3320_write_byte(handle, LD3320_REG_CLK_CONF4, LD3320_PLL_ASR_1D); /* set clock conf 4 */
274 if (res != 0) /* check result */
275 {
276 handle->debug_print("ld3320: set clock conf 4 failed.\n"); /* set clock conf 4 failed */
277
278 return 1; /* return error */
279 }
280 }
281 else if (handle->mode == LD3320_MODE_MP3) /* mp3 mode */
282 {
283 res = a_ld3320_write_byte(handle, LD3320_REG_ADC_CONTROL, 0x00); /* set the adc control */
284 if (res != 0) /* check result */
285 {
286 handle->debug_print("ld3320: set adc control failed.\n"); /* set adc control failed */
287
288 return 1; /* return error */
289 }
290 res = a_ld3320_write_byte(handle, LD3320_REG_CLK_CONF2, LD3320_PLL_MP3_19); /* set clock conf 2 */
291 if (res != 0) /* check result */
292 {
293 handle->debug_print("ld3320: set clock conf 3 failed.\n"); /* set clock conf 2 failed */
294
295 return 1; /* return error */
296 }
297 res = a_ld3320_write_byte(handle, LD3320_REG_CLK_CONF3, LD3320_PLL_MP3_1B); /* set clock conf 3 */
298 if (res != 0) /* check result */
299 {
300 handle->debug_print("ld3320: set clock conf 3 failed.\n"); /* set clock conf 3 failed */
301
302 return 1; /* return error */
303 }
304 res = a_ld3320_write_byte(handle, LD3320_REG_CLK_CONF4, LD3320_PLL_MP3_1D); /* set clock conf 4 */
305 if (res != 0) /* check result */
306 {
307 handle->debug_print("ld3320: set clock conf 4 failed.\n"); /* set clock conf 4 failed */
308
309 return 1; /* return error */
310 }
311 }
312 else
313 {
314 handle->debug_print("ld3320: mode is invalid.\n"); /* mode is invalid */
315
316 return 1; /* return error */
317 }
318 handle->delay_ms(10); /* delay 10 ms */
319 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_DSP_SLEEP, 0x04); /* enable dsp sleep */
320 if (res != 0) /* check result */
321 {
322 handle->debug_print("ld3320: set dsp sleep failed.\n"); /* set dsp sleep failed */
323
324 return 1; /* return error */
325 }
326 res = a_ld3320_write_byte(handle, LD3320_REG_CMD, 0x4C); /* send dsp sleep enable command */
327 if (res != 0) /* check result */
328 {
329 handle->debug_print("ld3320: send command failed.\n"); /* send command failed */
330
331 return 1; /* return error */
332 }
333 handle->delay_ms(5); /* delay 5 ms */
334 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_STR_LEN, 0x00); /* set string length 0 */
335 if (res != 0) /* check result */
336 {
337 handle->debug_print("ld3320: set string length failed.\n"); /* set string length failed */
338
339 return 1; /* return error */
340 }
341 res = a_ld3320_write_byte(handle, LD3320_REG_LOW_POWER, 0x4F); /* set low power */
342 if (res != 0) /* check result */
343 {
344 handle->debug_print("ld3320: set low power failed.\n"); /* set low power failed */
345
346 return 1; /* return error */
347 }
348 res = a_ld3320_write_byte(handle, LD3320_REG_INIT, 0xFF); /* set init */
349 if (res != 0) /* check result */
350 {
351 handle->debug_print("ld3320: set init failed.\n"); /* set init failed */
352
353 return 1; /* return error */
354 }
355
356 return 0; /* success return 0 */
357}
358
367static uint8_t a_ld3320_mp3_init(ld3320_handle_t *handle)
368{
369 uint8_t res;
370
371 res = a_ld3320_common_init(handle); /* common init */
372 if (res != 0) /* check result */
373 {
374 return 1; /* return error */
375 }
376 res = a_ld3320_write_byte(handle, LD3320_REG_INIT_CONTROL, 0x02); /* set mp3 mode */
377 if (res != 0) /* check result */
378 {
379 handle->debug_print("ld3320: set int control failed.\n"); /* set int control failed */
380
381 return 1; /* return error */
382 }
383 res = a_ld3320_write_byte(handle, LD3320_REG_CMD, 0x48); /* active dsp */
384 if (res != 0) /* check result */
385 {
386 handle->debug_print("ld3320: set command failed.\n"); /* set command failed */
387
388 return 1; /* return error */
389 }
390 handle->delay_ms(10); /* delay 10 ms */
391 res = a_ld3320_write_byte(handle, LD3320_REG_FEEDBACK, 0x52); /* set feedback */
392 if (res != 0) /* check result */
393 {
394 handle->debug_print("ld3320: set feedback failed.\n"); /* set feedback failed */
395
396 return 1; /* return error */
397 }
398 res = a_ld3320_write_byte(handle, LD3320_REG_LINEOUT, 0x00); /* set line out */
399 if (res != 0) /* check result */
400 {
401 handle->debug_print("ld3320: set line out failed.\n"); /* set line out failed */
402
403 return 1; /* return error */
404 }
405 res = a_ld3320_write_byte(handle, LD3320_REG_HEADSET_LEFT, 0x00); /* set headset left */
406 if (res != 0) /* check result */
407 {
408 handle->debug_print("ld3320: set headset left failed.\n"); /* set headset left failed */
409
410 return 1; /* return error */
411 }
412 res = a_ld3320_write_byte(handle, LD3320_REG_HEADSET_RIGHT, 0x00); /* set headset right */
413 if (res != 0) /* check result */
414 {
415 handle->debug_print("ld3320: set headset right failed.\n"); /* set headset right failed */
416
417 return 1; /* return error */
418 }
419 handle->delay_ms(2); /* delay 2 ms */
420 res = a_ld3320_write_byte(handle, LD3320_REG_SPEAKER, 0xFF); /* set speaker */
421 if (res != 0) /* check result */
422 {
423 handle->debug_print("ld3320: set headset right failed.\n"); /* set speaker failed */
424
425 return 1; /* return error */
426 }
427 res = a_ld3320_write_byte(handle, LD3320_REG_GAIN_CONTROL, 0xFF); /* set gain control */
428 if (res != 0) /* check result */
429 {
430 handle->debug_print("ld3320: set gain control failed.\n"); /* set gain control failed */
431
432 return 1; /* return error */
433 }
434 handle->delay_ms(2); /* delay 2 ms */
435 res = a_ld3320_write_byte(handle, LD3320_REG_ANALOG_CONTROL1, 0xFF); /* set analog control 1 */
436 if (res != 0) /* check result */
437 {
438 handle->debug_print("ld3320: set analog control 1 failed.\n"); /* set analog control 1 failed */
439
440 return 1; /* return error */
441 }
442 res = a_ld3320_write_byte(handle, LD3320_REG_ANALOG_CONTROL2, 0xFF); /* set analog control 2 */
443 if (res != 0) /* check result */
444 {
445 handle->debug_print("ld3320: set analog control 2 failed.\n"); /* set analog control 2 failed */
446
447 return 1; /* return error */
448 }
449 handle->delay_ms(2); /* delay 2 ms */
450 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_DATA_LOWER_LOW, 0x00); /* set fifo data lower low */
451 if (res != 0) /* check result */
452 {
453 handle->debug_print("ld3320: set fifo data lower low failed.\n"); /* set fifo data lower low failed */
454
455 return 1; /* return error */
456 }
457 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_DATA_LOWER_HIGH, 0x00); /* set fifo data high low */
458 if (res != 0) /* check result */
459 {
460 handle->debug_print("ld3320: set fifo data lower high failed.\n"); /* set fifo data lower high failed */
461
462 return 1; /* return error */
463 }
464 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_DATA_UPPER_LOW, 0xEF); /* set fifo data upper low */
465 if (res != 0) /* check result */
466 {
467 handle->debug_print("ld3320: set fifo data upper low failed.\n"); /* set fifo data upper low failed */
468
469 return 1; /* return error */
470 }
471 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_DATA_UPPER_HIGH, 0x07); /* set fifo data upper high */
472 if (res != 0) /* check result */
473 {
474 handle->debug_print("ld3320: set fifo data upper high failed.\n"); /* set fifo data upper high failed */
475
476 return 1; /* return error */
477 }
478 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_MCU_WATER_MARK_L, 0x77); /* set fifo mcu watermark low */
479 if (res != 0) /* check result */
480 {
481 handle->debug_print("ld3320: set fifo mcu water mark low failed.\n"); /* set fifo mcu watermark low failed */
482
483 return 1; /* return error */
484 }
485 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_MCU_WATER_MARK_H, 0x03); /* set fifo mcu watermark high */
486 if (res != 0) /* check result */
487 {
488 handle->debug_print("ld3320: set fifo mcu water mark high failed.\n"); /* set fifo mcu watermark high failed */
489
490 return 1; /* return error */
491 }
492 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_DSP_WATER_MARK_L, 0xBB); /* set fifo dsp watermark low */
493 if (res != 0) /* check result */
494 {
495 handle->debug_print("ld3320: set fifo mcu water mark low failed.\n"); /* set fifo mcu watermark low failed */
496
497 return 1; /* return error */
498 }
499 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_DSP_WATER_MARK_H, 0x01); /* set fifo dsp watermark high */
500 if (res != 0) /* check result */
501 {
502 handle->debug_print("ld3320: set fifo mcu water mark high failed.\n"); /* set fifo mcu watermark high failed */
503
504 return 1; /* return error */
505 }
506
507 return 0; /* success return 0 */
508}
509
518static uint8_t a_ld3320_mp3_load(ld3320_handle_t *handle)
519{
520 uint8_t res;
521 uint8_t data;
522 uint16_t size, i;
523
524 while (1) /* loop */
525 {
526 res = a_ld3320_read_byte(handle, LD3320_REG_FIFO_STATUS, (uint8_t *)&data); /* read data */
527 if (res != 0) /* check result */
528 {
529 handle->debug_print("ld3320: fifo status read failed.\n"); /* fifo status read failed */
530
531 return 1; /* return error */
532 }
533 size = (uint16_t)(512 < (handle->size - handle->point) ?
534 512 : (handle->size - handle->point)); /* get size */
535 res = handle->mp3_read(handle->point, size, handle->buf); /* read data */
536 if (res != 0) /* check result */
537 {
538 handle->debug_print("ld3320: mp3 read failed.\n"); /* mp3 read failed */
539
540 return 1; /* return error */
541 }
542 i = 0; /* set index 0 */
543 while (!(data & 0x08) && (i < size))
544 {
545 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_DATA, handle->buf[i]); /* write data */
546 if (res != 0) /* check result */
547 {
548 handle->debug_print("ld3320: write fifo failed.\n"); /* write failed */
549
550 return 1; /* return error */
551 }
552 handle->delay_us(60); /* delay 60 us */
553 i++; /* i++ */
554 handle->point++; /* point++ */
555 res = a_ld3320_read_byte(handle, LD3320_REG_FIFO_STATUS, (uint8_t *)&data); /* read data */
556 if (res != 0) /* check result */
557 {
558 handle->debug_print("ld3320: fifo status read failed.\n"); /* fifo status read failed */
559
560 return 1; /* return error */
561 }
562 }
563 if (!(data & 0x08)) /* check fifo full */
564 {
565 continue; /* continue */
566 }
567 else
568 {
569 break; /* break */
570 }
571 }
572 if (handle->point >= handle->size) /* check the size */
573 {
574 handle->running_status = LD3320_STATUS_NONE; /* clear status */
575 handle->receive_callback(LD3320_STATUS_MP3_END, 0, NULL); /* run the callback */
576 }
577
578 return 0; /* success return 0 */
579}
580
589static uint8_t a_ld3320_asr_init(ld3320_handle_t *handle)
590{
591 uint8_t res;
592
593 res = a_ld3320_common_init(handle); /* common init */
594 if (res != 0) /* check result */
595 {
596 return 1; /* return error */
597 }
598 res = a_ld3320_write_byte(handle, LD3320_REG_INIT_CONTROL, 0x00); /* set asr mode */
599 if (res != 0) /* check result */
600 {
601 handle->debug_print("ld3320: set int control failed.\n"); /* set int control failed */
602
603 return 1; /* return error */
604 }
605 res = a_ld3320_write_byte(handle, LD3320_REG_CMD, 0x48); /* active dsp */
606 if (res != 0) /* check result */
607 {
608 handle->debug_print("ld3320: set command failed.\n"); /* set command failed */
609
610 return 1; /* return error */
611 }
612 handle->delay_ms(10); /* delay 10 ms */
613 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_LOWER_LOW, 0x80); /* fifo ext lower low */
614 if (res != 0) /* check result */
615 {
616 handle->debug_print("ld3320: set fifo ext lower low failed.\n"); /* set fifo ext lower low failed */
617
618 return 1; /* return error */
619 }
620 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_LOWER_HIGH, 0x07); /* fifo ext lower high */
621 if (res != 0) /* check result */
622 {
623 handle->debug_print("ld3320: set fifo ext lower high failed.\n"); /* set fifo ext lower high failed */
624
625 return 1; /* return error */
626 }
627 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_UPPER_LOW, 0xFF); /* fifo ext upper low */
628 if (res != 0) /* check result */
629 {
630 handle->debug_print("ld3320: set fifo ext upper low failed.\n"); /* set fifo ext upper low failed */
631
632 return 1; /* return error */
633 }
634 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_UPPER_HIGH, 0x07); /* fifo ext upper high */
635 if (res != 0) /* check result */
636 {
637 handle->debug_print("ld3320: set fifo ext upper high failed.\n"); /* set fifo ext upper high failed */
638
639 return 1; /* return error */
640 }
641 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_MCU_WATER_MARK_L, 0x00); /* fifo ext mcu watermark low */
642 if (res != 0) /* check result */
643 {
644 handle->debug_print("ld3320: set fifo ext mcu water mark low failed.\n"); /* set fifo ext mcu watermark low failed */
645
646 return 1; /* return error */
647 }
648 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_MCU_WATER_MARK_H, 0x08); /* fifo ext mcu watermark high */
649 if (res != 0) /* check result */
650 {
651 handle->debug_print("ld3320: set fifo ext mcu water mark high failed.\n"); /* set fifo ext mcu watermark high failed */
652
653 return 1; /* return error */
654 }
655 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_DSP_WATER_MARK_L, 0x00); /* fifo ext mcu watermark low */
656 if (res != 0) /* check result */
657 {
658 handle->debug_print("ld3320: set fifo ext mcu water mark low failed.\n"); /* set fifo ext mcu watermark low failed */
659
660 return 1; /* return error */
661 }
662 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT_DSP_WATER_MARK_H, 0x08); /* fifo ext mcu watermark high */
663 if (res != 0) /* check result */
664 {
665 handle->debug_print("ld3320: set fifo ext mcu water mark high failed.\n"); /* set fifo ext mcu watermark high failed */
666
667 return 1; /* return error */
668 }
669 handle->delay_ms(2); /* delay 2 ms */
670
671 return 0; /* success return 0 */
672}
673
683static uint8_t a_ld3320_check_asr_busy(ld3320_handle_t *handle, uint8_t *s)
684{
685 uint8_t res, i;
686 uint8_t status;
687
688 *s = 0; /* clear status */
689 for (i = 0; i < 10; i++) /* wait 100 ms */
690 {
691 res = a_ld3320_read_byte(handle, LD3320_REG_ASR_STATUS, (uint8_t *)&status); /* read asr status */
692 if (res != 0) /* check result */
693 {
694 handle->debug_print("ld3320: read asr status failed.\n"); /* read asr status failed */
695
696 return 1; /* return error */
697 }
698 if (status == 0x21) /* check status */
699 {
700 *s = 1; /* flag */
701
702 break; /* break */
703 }
704 handle->delay_ms(10); /* delay 10 ms */
705 }
706
707 return 0; /* success return 0 */
708}
709
720static uint8_t a_ld3320_asr_start(ld3320_handle_t *handle, uint8_t mic_gain, uint8_t vad)
721{
722 uint8_t res;
723 uint8_t s;
724
725 res = a_ld3320_write_byte(handle, LD3320_REG_ADC_GAIN, mic_gain); /* set ad gain */
726 if (res != 0) /* check result */
727 {
728 handle->debug_print("ld3320: set adc gain failed.\n"); /* set adc gain failed */
729
730 return 1; /* return error */
731 }
732 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_VAD_PARAM, vad); /* set asr vad param gain */
733 if (res != 0) /* check result */
734 {
735 handle->debug_print("ld3320: set asr vad param failed.\n"); /* set asr vad param failed */
736
737 return 1; /* return error */
738 }
739 res = a_ld3320_write_byte(handle, LD3320_REG_ADC_CONF, 0x09); /* set adc conf */
740 if (res != 0) /* check result */
741 {
742 handle->debug_print("ld3320: set adc conf failed.\n"); /* set adc conf failed */
743
744 return 1; /* return error */
745 }
746 res = a_ld3320_write_byte(handle, LD3320_REG_INIT_CONTROL, 0x20); /* set init control */
747 if (res != 0) /* check result */
748 {
749 handle->debug_print("ld3320: set init control failed.\n"); /* set init control failed */
750
751 return 1; /* return error */
752 }
753 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_CLEAR, 0x01); /* set init control */
754 if (res != 0) /* check result */
755 {
756 handle->debug_print("ld3320: set fifo clear failed.\n"); /* set fifo clear failed */
757
758 return 1; /* return error */
759 }
760 handle->delay_ms(2); /* delay 2 ms */
761 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_CLEAR, 0x00); /* set init control */
762 if (res != 0) /* check result */
763 {
764 handle->debug_print("ld3320: set fifo clear failed.\n"); /* set fifo clear failed */
765
766 return 1; /* return error */
767 }
768 handle->delay_ms(2); /* delay 2 ms */
769 res = a_ld3320_check_asr_busy(handle, (uint8_t *)&s); /* check asr busy */
770 if (res != 0) /* check result */
771 {
772 handle->debug_print("ld3320: check asr busy failed.\n"); /* check asr busy failed */
773
774 return 1; /* return error */
775 }
776 if (s == 0) /* check result */
777 {
778 handle->debug_print("ld3320: asr busy .\n"); /* asr busy */
779
780 return 1; /* return error */
781 }
782 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_STATUS, 0xFF); /* clear asr status */
783 if (res != 0) /* check result */
784 {
785 handle->debug_print("ld3320: clear asr status failed.\n"); /* clear asr status failed */
786
787 return 1; /* return error */
788 }
789 res = a_ld3320_write_byte(handle, LD3320_REG_DSP_CMD, 0x06); /* start dsp asr */
790 if (res != 0) /* check result */
791 {
792 handle->debug_print("ld3320: start dsp asr failed.\n"); /* start dsp asr failed */
793
794 return 1; /* return error */
795 }
796 handle->delay_ms(5); /* delay 5 ms */
797 res = a_ld3320_write_byte(handle, LD3320_REG_ADC_CONF, 0x0B); /* enable adc mic */
798 if (res != 0) /* check result */
799 {
800 handle->debug_print("ld3320: enable adc mic failed.\n"); /* enable adc mic failed */
801
802 return 1; /* return error */
803 }
804 res = a_ld3320_write_byte(handle, LD3320_REG_INT_CONF, 0x10); /* enable sync */
805 if (res != 0) /* check result */
806 {
807 handle->debug_print("ld3320: enable sync failed.\n"); /* enable sync failed */
808
809 return 1; /* return error */
810 }
811 res = a_ld3320_write_byte(handle, LD3320_REG_INIT_CONTROL, 0x00); /* set the init control */
812 if (res != 0) /* check result */
813 {
814 handle->debug_print("ld3320: set the init control failed.\n"); /* set the init control failed */
815
816 return 1; /* return error */
817 }
818
819 return 0; /* success return 0 */
820}
821
833static uint8_t a_ld3320_asr_add_key_word(ld3320_handle_t *handle, uint8_t ind, char *word, uint16_t len)
834{
835 uint8_t res;
836 uint16_t i, k;
837
838 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_INDEX, ind); /* write asr index */
839 if (res != 0) /* check result */
840 {
841 handle->debug_print("ld3320: set asr index failed.\n"); /* set asr index failed */
842
843 return 1; /* return error */
844 }
845 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_DATA, 0x00); /* write asr data */
846 if (res != 0) /* check result */
847 {
848 handle->debug_print("ld3320: set asr data failed.\n"); /* set asr data failed */
849
850 return 1; /* return error */
851 }
852 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_CLEAR, 0x04); /* fifo clear */
853 if (res != 0) /* check result */
854 {
855 handle->debug_print("ld3320: fifo clear failed.\n"); /* fifo clear failed */
856
857 return 1; /* return error */
858 }
859 handle->delay_ms(2); /* delay 2 ms */
860 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_CLEAR, 0x00); /* fifo clear */
861 if (res != 0) /* check result */
862 {
863 handle->debug_print("ld3320: fifo clear failed.\n"); /* fifo clear failed */
864
865 return 1; /* return error */
866 }
867 handle->delay_ms(2); /* delay 2 ms */
868 k = (len < 50) ? len : 50; /* get the mini length */
869 for (i = 0; i < k; i++) /* write data */
870 {
871 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_EXT , word[i]); /* fifo ext write */
872 if (res != 0) /* check result */
873 {
874 handle->debug_print("ld3320: fifo ext write failed.\n"); /* fifo ext write failed */
875
876 return 1; /* return error */
877 }
878 }
879 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_STR_LEN, (uint8_t)k); /* asr str length */
880 if (res != 0) /* check result */
881 {
882 handle->debug_print("ld3320: asr string length failed.\n"); /* asr string length failed */
883
884 return 1; /* return error */
885 }
886 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_STATUS, 0xFF); /* clear asr status */
887 if (res != 0) /* check result */
888 {
889 handle->debug_print("ld3320: asr status failed.\n"); /* asr status failed */
890
891 return 1; /* return error */
892 }
893 res = a_ld3320_write_byte(handle, LD3320_REG_DSP_CMD, 0x04); /* add dsp words status */
894 if (res != 0) /* check result */
895 {
896 handle->debug_print("ld3320: dsp command failed.\n"); /* dsp command failed */
897
898 return 1; /* return error */
899 }
900
901 return 0; /* success return 0 */
902}
903
912static uint8_t a_ld3320_asr_add_fixed(ld3320_handle_t *handle)
913{
914 uint8_t res, i, s;
915
916 for (i = 0; i < handle->len; i++) /* add fixed length */
917 {
918 res = a_ld3320_check_asr_busy(handle, (uint8_t *)&s); /* check asr busy */
919 if (res != 0) /* check result */
920 {
921 handle->debug_print("ld3320: check asr busy failed.\n"); /* check asr busy failed */
922
923 return 1; /* return error */
924 }
925 if (s == 0) /* check status */
926 {
927 return 1; /* return error */
928 }
929 res = a_ld3320_asr_add_key_word(handle, i, handle->text[i],
930 (uint16_t)strlen(handle->text[i])); /* asr add key word */
931 if (res != 0) /* check result */
932 {
933 handle->debug_print("ld3320: asr add key word failed.\n"); /* asr add key word failed */
934
935 return 1; /* return error */
936 }
937 }
938
939 return 0; /* success return 0 */
940}
941
950static uint8_t a_ld3320_reset(ld3320_handle_t *handle)
951{
952 if (handle->reset_gpio_write(1) != 0) /* reset gpio write 1 */
953 {
954 handle->debug_print("ld3320: reset gpio write failed.\n"); /* reset gpio write failed */
955
956 return 1; /* return error */
957 }
958 handle->delay_ms(2); /* delay 2 ms */
959 if (handle->reset_gpio_write(0) != 0) /* reset gpio write 0 */
960 {
961 handle->debug_print("ld3320: reset gpio write failed.\n"); /* reset gpio write failed */
962
963 return 1; /* return error */
964 }
965 handle->delay_ms(2); /* delay 2 ms */
966 if (handle->reset_gpio_write(1) != 0) /* reset gpio write 1 */
967 {
968 handle->debug_print("ld3320: reset gpio write failed.\n"); /* reset gpio write failed */
969
970 return 1; /* return error */
971 }
972 if (handle->spi_write_cmd(NULL, 0) != 0) /* spi write command */
973 {
974 handle->debug_print("ld3320: spi write command failed.\n"); /* spi write command failed */
975
976 return 1; /* return error */
977 }
978 handle->delay_ms(2); /* delay 2 ms */
979
980 return 0; /* success return 0 */
981}
982
991static uint8_t a_ld3320_run_asr(ld3320_handle_t *handle)
992{
993 uint8_t res, i, flag;
994
995 flag = 2;
996 for (i = 0; i < 5; i++)
997 {
998 res = a_ld3320_asr_init(handle); /* asr init */
999 if (res != 0) /* check result */
1000 {
1001 handle->debug_print("ld3320: asr init failed.\n"); /* asr init failed */
1002 (void)a_ld3320_reset(handle); /* reset the ld3320 */
1003 handle->delay_ms(100); /* delay 100 ms */
1004
1005 return 1; /* return error */
1006 }
1007 handle->delay_ms(100); /* delay 100 ms */
1008 res = a_ld3320_asr_add_fixed(handle); /* asr add fixed */
1009 if (res != 0) /* check result */
1010 {
1011 (void)a_ld3320_reset(handle); /* reset the ld3320 */
1012 handle->delay_ms(100); /* delay 100 ms */
1013
1014 continue; /* continue */
1015 }
1016 handle->delay_ms(10); /* delay 10 ms */
1017 res = a_ld3320_asr_start(handle, handle->mic_gain, handle->vad); /* asr start */
1018 if (res != 0) /* check result */
1019 {
1020 (void)a_ld3320_reset(handle); /* reset the ld3320 */
1021 handle->delay_ms(100); /* delay 100 ms */
1022
1023 continue; /* continue */
1024 }
1025 flag = 0; /* flag ok */
1026
1027 break; /* break the loop */
1028 }
1029
1030 return flag; /* return flag */
1031}
1032
1043uint8_t ld3320_set_mode(ld3320_handle_t *handle, ld3320_mode_t mode)
1044{
1045 if (handle == NULL) /* check handle */
1046 {
1047 return 2; /* return error */
1048 }
1049 if (handle->inited != 1) /* check handle initialization */
1050 {
1051 return 3; /* return error */
1052 }
1053
1054 handle->mode = (uint8_t)mode; /* set mode */
1055
1056 return 0; /* success return 0 */
1057}
1058
1069uint8_t ld3320_get_mode(ld3320_handle_t *handle, ld3320_mode_t *mode)
1070{
1071 if (handle == NULL) /* check handle */
1072 {
1073 return 2; /* return error */
1074 }
1075 if (handle->inited != 1) /* check handle initialization */
1076 {
1077 return 3; /* return error */
1078 }
1079
1080 *mode = (ld3320_mode_t)(handle->mode); /* get mode */
1081
1082 return 0; /* success return 0 */
1083}
1084
1096uint8_t ld3320_set_key_words(ld3320_handle_t *handle, char text[50][50], uint8_t len)
1097{
1098 uint8_t i;
1099
1100 if (handle == NULL) /* check handle */
1101 {
1102 return 2; /* return error */
1103 }
1104 if (handle->inited != 1) /* check handle initialization */
1105 {
1106 return 3; /* return error */
1107 }
1108
1109 for (i = 0; i < len; i++) /* copy the text */
1110 {
1111 strcpy(handle->text[i], text[i]); /* copy the text */
1112 }
1113 handle->len = len; /* set length */
1114
1115 return 0; /* success return 0 */
1116}
1117
1129uint8_t ld3320_get_key_words(ld3320_handle_t *handle, char text[50][50], uint8_t *len)
1130{
1131 uint8_t i;
1132
1133 if (handle == NULL) /* check handle */
1134 {
1135 return 2; /* return error */
1136 }
1137 if (handle->inited != 1) /* check handle initialization */
1138 {
1139 return 3; /* return error */
1140 }
1141
1142 for (i = 0; i < handle->len; i++) /* copy the text */
1143 {
1144 strcpy(text[i], handle->text[i]); /* copy the text */
1145 }
1146 *len = handle->len; /* get length */
1147
1148 return 0; /* success return 0 */
1149}
1150
1161uint8_t ld3320_set_mic_gain(ld3320_handle_t *handle, ld3320_mic_gain_t gain)
1162{
1163 if (handle == NULL) /* check handle */
1164 {
1165 return 2; /* return error */
1166 }
1167 if (handle->inited != 1) /* check handle initialization */
1168 {
1169 return 3; /* return error */
1170 }
1171
1172 handle->mic_gain = (uint8_t)gain; /* set mode */
1173
1174 return 0; /* success return 0 */
1175}
1176
1187uint8_t ld3320_get_mic_gain(ld3320_handle_t *handle, ld3320_mic_gain_t *gain)
1188{
1189 if (handle == NULL) /* check handle */
1190 {
1191 return 2; /* return error */
1192 }
1193 if (handle->inited != 1) /* check handle initialization */
1194 {
1195 return 3; /* return error */
1196 }
1197
1198 *gain = (ld3320_mic_gain_t)(handle->mic_gain); /* get mode */
1199
1200 return 0; /* success return 0 */
1201}
1202
1213uint8_t ld3320_set_vad(ld3320_handle_t *handle, ld3320_vad_t vad)
1214{
1215 if (handle == NULL) /* check handle */
1216 {
1217 return 2; /* return error */
1218 }
1219 if (handle->inited != 1) /* check handle initialization */
1220 {
1221 return 3; /* return error */
1222 }
1223
1224 handle->vad = (uint8_t)vad; /* set vad */
1225
1226 return 0; /* success return 0 */
1227}
1228
1239uint8_t ld3320_get_vad(ld3320_handle_t *handle, ld3320_vad_t *vad)
1240{
1241 if (handle == NULL) /* check handle */
1242 {
1243 return 2; /* return error */
1244 }
1245 if (handle->inited != 1) /* check handle initialization */
1246 {
1247 return 3; /* return error */
1248 }
1249
1250 *vad = (ld3320_vad_t)(handle->vad); /* get vad */
1251
1252 return 0; /* success return 0 */
1253}
1254
1265uint8_t ld3320_get_status(ld3320_handle_t *handle, ld3320_status_t *status)
1266{
1267 if (handle == NULL) /* check handle */
1268 {
1269 return 2; /* return error */
1270 }
1271 if (handle->inited != 1) /* check handle initialization */
1272 {
1273 return 3; /* return error */
1274 }
1275
1276 *status = (ld3320_status_t)(handle->running_status); /* get running status */
1277
1278 return 0; /* success return 0 */
1279}
1280
1292uint8_t ld3320_init(ld3320_handle_t *handle)
1293{
1294 if (handle == NULL) /* check handle */
1295 {
1296 return 2; /* return error */
1297 }
1298 if (handle->debug_print == NULL) /* check debug_print */
1299 {
1300 return 3; /* return error */
1301 }
1302 if (handle->spi_init == NULL) /* check spi_init */
1303 {
1304 handle->debug_print("ld3320: spi_init is null.\n"); /* spi_init is null */
1305
1306 return 3; /* return error */
1307 }
1308 if (handle->spi_deinit == NULL) /* check spi_deinit */
1309 {
1310 handle->debug_print("ld3320: spi_deinit is null.\n"); /* spi_deinit is null */
1311
1312 return 3; /* return error */
1313 }
1314 if (handle->spi_read_address16 == NULL) /* check spi_read */
1315 {
1316 handle->debug_print("ld3320: spi_read_address16 is null.\n"); /* spi_read_address16 is null */
1317
1318 return 3; /* return error */
1319 }
1320 if (handle->spi_write_cmd == NULL) /* check spi_write_cmd */
1321 {
1322 handle->debug_print("ld3320: spi_write_cmd is null.\n"); /* spi_write_cmd is null */
1323
1324 return 3; /* return error */
1325 }
1326 if (handle->reset_gpio_init == NULL) /* check reset_gpio_init */
1327 {
1328 handle->debug_print("ld3320: reset_gpio_init is null.\n"); /* reset_gpio_init is null */
1329
1330 return 3; /* return error */
1331 }
1332 if (handle->reset_gpio_deinit == NULL) /* check reset_gpio_deinit */
1333 {
1334 handle->debug_print("ld3320: reset_gpio_deinit is null.\n"); /* reset_gpio_deinit is null */
1335
1336 return 3; /* return error */
1337 }
1338 if (handle->reset_gpio_write == NULL) /* check reset_gpio_write */
1339 {
1340 handle->debug_print("ld3320: reset_gpio_write is null.\n"); /* reset_gpio_write is null */
1341
1342 return 3; /* return error */
1343 }
1344 if (handle->delay_ms == NULL) /* check delay_ms */
1345 {
1346 handle->debug_print("ld3320: delay_ms is null.\n"); /* delay_ms is null */
1347
1348 return 3; /* return error */
1349 }
1350 if (handle->delay_us == NULL) /* check delay_us */
1351 {
1352 handle->debug_print("ld3320: delay_us is null.\n"); /* delay_us is null */
1353
1354 return 3; /* return error */
1355 }
1356 if (handle->receive_callback == NULL) /* check receive_callback */
1357 {
1358 handle->debug_print("ld3320: receive_callback is null.\n"); /* receive_callback is null */
1359
1360 return 3; /* return error */
1361 }
1362 if (handle->mp3_read_init == NULL) /* check mp3_read_init */
1363 {
1364 handle->debug_print("ld3320: mp3_read_init is null.\n"); /* mp3_read_init is null */
1365
1366 return 3; /* return error */
1367 }
1368 if (handle->mp3_read_deinit == NULL) /* check mp3_read_deinit */
1369 {
1370 handle->debug_print("ld3320: mp3_read_deinit is null.\n"); /* mp3_read_deinit is null */
1371
1372 return 3; /* return error */
1373 }
1374 if (handle->mp3_read == NULL) /* check mp3_read */
1375 {
1376 handle->debug_print("ld3320: mp3_read is null.\n"); /* mp3_read is null */
1377
1378 return 3; /* return error */
1379 }
1380
1381 if (handle->spi_init() != 0) /* spi init */
1382 {
1383 handle->debug_print("ld3320: spi init failed.\n"); /* spi init failed */
1384
1385 return 1; /* return error */
1386 }
1387 if (handle->reset_gpio_init() != 0) /* reset gpio init */
1388 {
1389 handle->debug_print("ld3320: reset gpio init failed.\n"); /* reset gpio init failed */
1390 (void)handle->spi_deinit(); /* spi deinit */
1391
1392 return 4; /* return error */
1393 }
1394 if (a_ld3320_reset(handle) != 0) /* result */
1395 {
1396 handle->debug_print("ld3320: reset failed.\n"); /* reset failed */
1397 (void)handle->spi_deinit(); /* spi deinit */
1398 (void)handle->reset_gpio_deinit(); /* gpio deinit */
1399
1400 return 4; /* return error */
1401 }
1402 handle->mic_gain = LD3320_MIC_GAIN_COMMON; /* set mic gain common */
1403 handle->vad = LD3320_VAD_COMMON; /* set vad common */
1404 handle->running_status = LD3320_STATUS_NONE; /* set status none */
1405 handle->inited = 1; /* flag finished */
1406
1407 return 0; /* success return 0 */
1408}
1409
1421uint8_t ld3320_irq_handler(ld3320_handle_t *handle)
1422{
1423 uint8_t res;
1424 uint8_t flag;
1425 uint8_t asr_status;
1426 uint8_t asr_status2;
1427 uint8_t count;
1428 uint8_t i;
1429
1430 if (handle == NULL) /* check handle */
1431 {
1432 return 2; /* return error */
1433 }
1434 if (handle->inited != 1) /* check handle initialization */
1435 {
1436 return 3; /* return error */
1437 }
1438
1439 if (handle->mode == LD3320_MODE_ASR) /* asr mode */
1440 {
1441 res = a_ld3320_read_byte(handle, LD3320_REG_INT_FLAG, (uint8_t *)&flag); /* read int flag */
1442 if (res != 0) /* check result */
1443 {
1444 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1445 handle->debug_print("ld3320: read int flag failed.\n"); /* read int flag failed */
1446
1447 return 1; /* return error */
1448 }
1449 res = a_ld3320_write_byte(handle, LD3320_REG_INT_CONF, 0x00); /* write int conf */
1450 if (res != 0) /* check result */
1451 {
1452 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1453 handle->debug_print("ld3320: write int conf failed.\n"); /* write int conf failed */
1454
1455 return 1; /* return error */
1456 }
1457 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_INT_CONF, 0x00); /* write fifo int conf */
1458 if (res != 0) /* check result */
1459 {
1460 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1461 handle->debug_print("ld3320: write fifo int conf failed.\n"); /* write fifo int conf failed */
1462
1463 return 1; /* return error */
1464 }
1465 res = a_ld3320_read_byte(handle, LD3320_REG_ASR_STATUS, (uint8_t *)&asr_status); /* read asr status flag */
1466 if (res != 0) /* check result */
1467 {
1468 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1469 handle->debug_print("ld3320: read asr status failed.\n"); /* read asr status failed */
1470
1471 return 1; /* return error */
1472 }
1473 res = a_ld3320_read_byte(handle, LD3320_REG_ASR_STATUS2 , (uint8_t *)&asr_status2); /* read asr status2 flag */
1474 if (res != 0) /* check result */
1475 {
1476 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1477 handle->debug_print("ld3320: read asr status2 failed.\n"); /* read asr status2 failed */
1478
1479 return 1; /* return error */
1480 }
1481 if (((flag & 0x10) != 0) && (asr_status == 0x21) && (asr_status2 == 0x35)) /* check flags */
1482 {
1483 res = a_ld3320_read_byte(handle, LD3320_REG_INT_AUX , (uint8_t *)&count); /* read count */
1484 if (res != 0) /* check result */
1485 {
1486 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1487 handle->debug_print("ld3320: read count failed.\n"); /* read count failed */
1488
1489 return 1; /* return error */
1490 }
1491 if ((count > 0) && (count <= 4)) /* check count */
1492 {
1493 handle->running_status = LD3320_STATUS_ASR_FOUND_OK; /* set ok */
1494 }
1495 else
1496 {
1497 handle->running_status = LD3320_STATUS_ASR_FOUND_ZERO; /* set zero */
1498 }
1499 }
1500 else
1501 {
1502 handle->running_status = LD3320_STATUS_ASR_FOUND_ZERO; /* set zero */
1503 }
1504 res = a_ld3320_write_byte(handle, LD3320_REG_INT_FLAG, 0x00); /* write int flag */
1505 if (res != 0) /* check result */
1506 {
1507 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1508 handle->debug_print("ld3320: write int flag failed.\n"); /* write int flag failed */
1509
1510 return 1; /* return error */
1511 }
1512 res = a_ld3320_write_byte(handle, LD3320_REG_ADC_CONF, 0x00); /* write adc conf */
1513 if (res != 0) /* check result */
1514 {
1515 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1516 handle->debug_print("ld3320: write adc conf failed.\n"); /* write adc conf failed */
1517
1518 return 1; /* return error */
1519 }
1520 }
1521 else if (handle->mode == LD3320_MODE_MP3) /* if mp3 mode */
1522 {
1523 uint8_t reg1;
1524 uint8_t reg2;
1525 uint8_t status;
1526
1527 res = a_ld3320_read_byte(handle, LD3320_REG_INT_FLAG, (uint8_t *)&flag); /* read int flag */
1528 if (res != 0) /* check result */
1529 {
1530 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1531 handle->debug_print("ld3320: read int flag failed.\n"); /* read int flag failed */
1532
1533 return 1; /* return error */
1534 }
1535 res = a_ld3320_read_byte(handle, LD3320_REG_INT_CONF, (uint8_t *)&reg1); /* read int conf */
1536 if (res != 0) /* check result */
1537 {
1538 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1539 handle->debug_print("ld3320: read int conf failed.\n"); /* read int conf failed */
1540
1541 return 1; /* return error */
1542 }
1543 res = a_ld3320_read_byte(handle, LD3320_REG_FIFO_INT_CONF, (uint8_t *)&reg2); /* read fifo int conf */
1544 if (res != 0) /* check result */
1545 {
1546 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1547 handle->debug_print("ld3320: read fifo int conf failed.\n"); /* read fifo int conf failed */
1548
1549 return 1; /* return error */
1550 }
1551 res = a_ld3320_write_byte(handle, LD3320_REG_INT_CONF, 0x00); /* write int conf */
1552 if (res != 0) /* check result */
1553 {
1554 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1555 handle->debug_print("ld3320: write int conf failed.\n"); /* write int conf failed */
1556
1557 return 1; /* return error */
1558 }
1559 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_INT_CONF, 0x00); /* write fifo int conf */
1560 if (res != 0) /* check result */
1561 {
1562 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1563 handle->debug_print("ld3320: write fifo int conf failed.\n"); /* write fifo int conf failed */
1564
1565 return 1; /* return error */
1566 }
1567 res = a_ld3320_read_byte(handle, LD3320_REG_INT_AUX, (uint8_t *)&status); /* read status */
1568 if (res != 0) /* check result */
1569 {
1570 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1571 handle->debug_print("ld3320: read status failed.\n"); /* read status failed */
1572
1573 return 1; /* return error */
1574 }
1575 if ((status & 0x20) != 0) /* check the status */
1576 {
1577 res = a_ld3320_write_byte(handle, LD3320_REG_INT_FLAG , 0x00); /* write int conf */
1578 if (res != 0) /* check result */
1579 {
1580 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1581 handle->debug_print("ld3320: write int conf failed.\n"); /* write int conf failed */
1582
1583 return 1; /* return error */
1584 }
1585 res = a_ld3320_write_byte(handle, LD3320_REG_INT_AUX, 0x00); /* write int aux */
1586 if (res != 0) /* check result */
1587 {
1588 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1589 handle->debug_print("ld3320: write int aux failed.\n"); /* write int aux failed */
1590
1591 return 1; /* return error */
1592 }
1593 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_FORCE_STOP, 0x00); /* asr force stop */
1594 if (res != 0) /* check result */
1595 {
1596 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1597 handle->debug_print("ld3320: asr force stop failed.\n"); /* asr force stop failed */
1598
1599 return 1; /* return error */
1600 }
1601 handle->point = 0; /* set zero */
1602 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_CLEAR, 0x01); /* clear fifo */
1603 if (res != 0) /* check result */
1604 {
1605 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1606 handle->debug_print("ld3320: clear fifo failed.\n"); /* clear fifo failed */
1607
1608 return 1; /* return error */
1609 }
1610 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_CLEAR, 0x00); /* clear fifo */
1611 if (res != 0) /* check result */
1612 {
1613 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1614 handle->debug_print("ld3320: clear fifo failed.\n"); /* clear fifo failed */
1615
1616 return 1; /* return error */
1617 }
1618 res = a_ld3320_write_byte(handle, LD3320_REG_MP3_CONF, 0x00); /* set mp3 conf */
1619 if (res != 0) /* check result */
1620 {
1621 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1622 handle->debug_print("ld3320: mp3 conf failed.\n"); /* mp3 conf failed */
1623
1624 return 1; /* return error */
1625 }
1626 handle->running_status = LD3320_STATUS_MP3_END; /* set end */
1627 }
1628 else if (handle->point >= handle->size &&
1629 handle->running_status == LD3320_STATUS_ASR_RUNNING) /* check size */
1630 {
1631 res = a_ld3320_write_byte(handle, LD3320_REG_ASR_FORCE_STOP, 0x01); /* set asr force stop */
1632 if (res != 0) /* check result */
1633 {
1634 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1635 handle->debug_print("ld3320: asr force stop failed.\n"); /* asr force stop failed */
1636
1637 return 1; /* return error */
1638 }
1639 res = a_ld3320_write_byte(handle, LD3320_REG_INT_CONF, 0x10); /* set int conf */
1640 if (res != 0) /* check result */
1641 {
1642 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1643 handle->debug_print("ld3320: set int conf failed.\n"); /* set int conf failed */
1644
1645 return 1; /* return error */
1646 }
1647 handle->running_status = LD3320_STATUS_MP3_END; /* set end */
1648 }
1649 else
1650 {
1651 res = a_ld3320_mp3_load(handle); /* mp3 load */
1652 if (res != 0) /* check result */
1653 {
1654 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1655 handle->debug_print("ld3320: mp3 load failed.\n"); /* mp3 load failed */
1656
1657 return 1; /* return error */
1658 }
1659 res = a_ld3320_write_byte(handle, LD3320_REG_INT_CONF, reg1); /* write int conf */
1660 if (res != 0) /* check result */
1661 {
1662 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1663 handle->debug_print("ld3320: write int conf failed.\n"); /* write int conf failed */
1664
1665 return 1; /* return error */
1666 }
1667 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_INT_CONF, reg2); /* write fifo int conf */
1668 if (res != 0) /* check result */
1669 {
1670 handle->running_status = LD3320_STATUS_MP3_ERROR; /* set mp3 error */
1671 handle->debug_print("ld3320: write fifo int conf failed.\n"); /* write fifo int conf failed */
1672
1673 return 1; /* return error */
1674 }
1675 handle->running_status = LD3320_STATUS_MP3_LOAD; /* set load */
1676 }
1677 }
1678 else /* unknown mode */
1679 {
1680 handle->debug_print("ld3320: mode is invalid.\n"); /* mode is invalid failed */
1681
1682 return 4; /* return error */
1683 }
1684 if (handle->running_status == LD3320_STATUS_ASR_FOUND_OK) /* asr ok */
1685 {
1686 handle->running_status = LD3320_STATUS_NONE; /* clear status */
1687 res = a_ld3320_read_byte(handle, LD3320_REG_ASR_RES_1 , (uint8_t *)&i); /* read asr index */
1688 if (res != 0) /* check result */
1689 {
1690 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1691 handle->debug_print("ld3320: read asr index failed.\n"); /* read asr index failed */
1692
1693 return 1; /* return error */
1694 }
1695 if (i >= handle->len) /* check index */
1696 {
1697 handle->running_status = LD3320_STATUS_ASR_ERROR; /* set error */
1698 handle->debug_print("ld3320: index is invalid.\n"); /* index is invalid */
1699
1700 return 1; /* return error */
1701 }
1702 handle->receive_callback(LD3320_STATUS_ASR_FOUND_OK, i, handle->text[i]); /* run callback */
1703 }
1704 else if (handle->running_status == LD3320_STATUS_ASR_FOUND_ZERO) /* asr zero */
1705 {
1706 handle->running_status = LD3320_STATUS_NONE; /* clear status */
1707 handle->receive_callback(LD3320_STATUS_ASR_FOUND_ZERO, 0, NULL); /* run the callback */
1708 }
1709 else if (handle->running_status == LD3320_STATUS_MP3_END) /* mp3 end */
1710 {
1711 handle->running_status = LD3320_STATUS_NONE; /* clear status */
1712 handle->receive_callback(LD3320_STATUS_MP3_END, 0, NULL); /* run the callback */
1713 }
1714 else if (handle->running_status == LD3320_STATUS_MP3_LOAD) /* mp3 load */
1715 {
1716 handle->running_status = LD3320_STATUS_ASR_RUNNING; /* clear status */
1717 handle->receive_callback(LD3320_STATUS_MP3_LOAD, 0, NULL); /* run the callback */
1718 }
1719 else
1720 {
1721 handle->debug_print("ld3320: unknown status.\n"); /* unknown status failed */
1722
1723 return 1; /* return error */
1724 }
1725
1726 return 0; /* success return 0 */
1727}
1728
1739uint8_t ld3320_start(ld3320_handle_t *handle)
1740{
1741 uint8_t res;
1742
1743 if (handle == NULL) /* check handle */
1744 {
1745 return 2; /* return error */
1746 }
1747 if (handle->inited != 1) /* check handle initialization */
1748 {
1749 return 3; /* return error */
1750 }
1751
1752 if (handle->mode == LD3320_MODE_ASR) /* asr mode */
1753 {
1754 res = a_ld3320_run_asr(handle); /* run asr */
1755 if (res != 0) /* check result */
1756 {
1757 handle->debug_print("ld3320: run adr failed.\n"); /* run receive callback failed */
1758
1759 return 1; /* return error */
1760 }
1761 handle->running_status = LD3320_STATUS_ASR_RUNNING; /* set running */
1762 }
1763 else if(handle->mode == LD3320_MODE_MP3) /* mp3 mode */
1764 {
1765 uint8_t volume;
1766
1767 if (handle->point >= handle->size) /* check point */
1768 {
1769 handle->debug_print("ld3320: point is the end.\n"); /* point is the end */
1770
1771 return 1; /* return error */
1772 }
1773 res = a_ld3320_mp3_init(handle); /* mp3 init */
1774 if (res != 0) /* check result */
1775 {
1776 handle->debug_print("ld3320: mp3 init failed.\n"); /* mp3 init failed */
1777
1778 return 1; /* return error */
1779 }
1780 volume = 5;
1781 volume =((15 - volume) & 0x0F) << 2; /* get register data */
1782 res = a_ld3320_write_byte(handle, LD3320_REG_SPEAKER, volume | 0xC3); /* set speaker volume */
1783 if (res != 0) /* check result */
1784 {
1785 handle->debug_print("ld3320: set speaker volume failed.\n"); /* set speaker volume failed */
1786
1787 return 1; /* return error */
1788 }
1789 res = a_ld3320_write_byte(handle, LD3320_REG_ANALOG_CONTROL1, 0x78); /* enable control1 */
1790 if (res != 0) /* check result */
1791 {
1792 handle->debug_print("ld3320: set analog control1 failed.\n"); /* set analog control1 failed */
1793
1794 return 1; /* return error */
1795 }
1796 res = a_ld3320_mp3_load(handle); /* load data */
1797 if (res != 0) /* check result */
1798 {
1799 handle->debug_print("ld3320: load data failed.\n"); /* load data failed */
1800
1801 return 1; /* return error */
1802 }
1803 res = a_ld3320_write_byte(handle, LD3320_REG_INT_AUX, 0x00); /* write int aux */
1804 if (res != 0) /* check result */
1805 {
1806 handle->debug_print("ld3320: set int aux failed.\n"); /* set int aux failed */
1807
1808 return 1; /* return error */
1809 }
1810 res = a_ld3320_write_byte(handle, LD3320_REG_CMD, 0x48); /* write command */
1811 if (res != 0) /* check result */
1812 {
1813 handle->debug_print("ld3320: set command failed.\n"); /* set command failed */
1814
1815 return 1; /* return error */
1816 }
1817 res = a_ld3320_write_byte(handle, LD3320_REG_MP3_CONF, 0x01); /* set mp3 conf */
1818 if (res != 0) /* check result */
1819 {
1820 handle->debug_print("ld3320: set mp3 conf failed.\n"); /* set mp3 conf failed */
1821
1822 return 1; /* return error */
1823 }
1824 res = a_ld3320_write_byte(handle, LD3320_REG_INT_CONF, 0x04); /* set int conf */
1825 if (res != 0) /* check result */
1826 {
1827 handle->debug_print("ld3320: set int conf failed.\n"); /* set int conf failed */
1828
1829 return 1; /* return error */
1830 }
1831 res = a_ld3320_write_byte(handle, LD3320_REG_FIFO_INT_CONF, 0x01); /* set fifo int conf */
1832 if (res != 0) /* check result */
1833 {
1834 handle->debug_print("ld3320: set fifo int conf failed.\n"); /* set fifo int conf failed */
1835
1836 return 1; /* return error */
1837 }
1838 res = a_ld3320_write_byte(handle, LD3320_REG_FEEDBACK, 0x5A); /* set feedback */
1839 if (res != 0) /* check result */
1840 {
1841 handle->debug_print("ld3320: set feedback failed.\n"); /* set feedback failed */
1842
1843 return 1; /* return error */
1844 }
1845 handle->running_status = LD3320_STATUS_MP3_RUNNING; /* set status */
1846 }
1847 else
1848 {
1849 handle->debug_print("ld3320: mode is invalid.\n"); /* mode is invalid */
1850
1851 return 1;
1852 }
1853
1854 return 0; /* success return 0 */
1855}
1856
1870uint8_t ld3320_deinit(ld3320_handle_t *handle)
1871{
1872 uint8_t res;
1873
1874 if (handle == NULL) /* check handle */
1875 {
1876 return 2; /* return error */
1877 }
1878 if (handle->inited != 1) /* check handle initialization */
1879 {
1880 return 3; /* return error */
1881 }
1882
1883 if (handle->mode == LD3320_MODE_ASR) /* asr mode */
1884 {
1885 res = a_ld3320_reset(handle); /* reset handle */
1886 if (res != 0) /* check result */
1887 {
1888 handle->debug_print("ld3320: reset failed.\n"); /* reset failed */
1889
1890 return 1; /* return error */
1891 }
1892 res = handle->reset_gpio_deinit(); /* deinit */
1893 if (res != 0) /* check result */
1894 {
1895 handle->debug_print("ld3320: gpio deinit failed.\n"); /* gpio deinit failed */
1896
1897 return 4; /* return error */
1898 }
1899 res = handle->spi_deinit(); /* spi deinit */
1900 if (res != 0) /* check result */
1901 {
1902 handle->debug_print("ld3320: spi deinit failed.\n"); /* spi deinit failed */
1903
1904 return 5; /* return error */
1905 }
1906 }
1907 else if (handle->mode == LD3320_MODE_MP3) /* mp3 mode */
1908 {
1909 res = a_ld3320_reset(handle); /* reset handle */
1910 if (res != 0) /* check result */
1911 {
1912 handle->debug_print("ld3320: reset failed.\n"); /* reset failed */
1913
1914 return 1; /* return error */
1915 }
1916 res = handle->reset_gpio_deinit(); /* deinit */
1917 if (res != 0) /* check result */
1918 {
1919 handle->debug_print("ld3320: gpio deinit failed.\n"); /* gpio deinit failed */
1920
1921 return 4; /* return error */
1922 }
1923 res = handle->spi_deinit(); /* spi deinit */
1924 if (res != 0) /* check result */
1925 {
1926 handle->debug_print("ld3320: spi deinit failed.\n"); /* spi deinit failed */
1927
1928 return 5; /* return error */
1929 }
1930 res = handle->mp3_read_deinit(); /* close */
1931 if (res != 0) /* check result */
1932 {
1933 handle->debug_print("ld3320: mp3 deinit failed.\n"); /* deinit failed */
1934
1935 return 6; /* return error */
1936 }
1937 }
1938 else /* invalid mode */
1939 {
1940 handle->debug_print("ld3320: mode is invalid.\n"); /* mode is invalid */
1941
1942 return 1; /* return error */
1943 }
1944
1945 return 0; /* success return 0 */
1946}
1947
1958uint8_t ld3320_stop(ld3320_handle_t *handle)
1959{
1960 uint8_t res;
1961
1962 if (handle == NULL) /* check handle */
1963 {
1964 return 2; /* return error */
1965 }
1966 if (handle->inited != 1) /* check handle initialization */
1967 {
1968 return 3; /* return error */
1969 }
1970
1971 if (handle->mode == LD3320_MODE_ASR) /* asr mode */
1972 {
1973 res = a_ld3320_reset(handle); /* reset handle */
1974 if (res != 0) /* check result */
1975 {
1976 handle->debug_print("ld3320: reset failed.\n"); /* reset failed */
1977
1978 return 1; /* return error */
1979 }
1980 }
1981 else if (handle->mode == LD3320_MODE_MP3) /* mp3 mode */
1982 {
1983 res = a_ld3320_reset(handle); /* reset handle */
1984 if (res != 0) /* check result */
1985 {
1986 handle->debug_print("ld3320: reset failed.\n"); /* reset failed */
1987
1988 return 1; /* return error */
1989 }
1990 }
1991 else /* invalid mode */
1992 {
1993 handle->debug_print("ld3320: mode is invalid.\n"); /* mode is invalid */
1994
1995 return 1; /* return error */
1996 }
1997
1998 return 0; /* success return 0 */
1999}
2000
2013uint8_t ld3320_set_speaker_volume(ld3320_handle_t *handle, uint8_t volume)
2014{
2015 uint8_t res;
2016
2017 if (handle == NULL) /* check handle */
2018 {
2019 return 2; /* return error */
2020 }
2021 if (handle->inited != 1) /* check handle initialization */
2022 {
2023 return 3; /* return error */
2024 }
2025 if (volume > 15) /* check volume */
2026 {
2027 handle->debug_print("ld3320: volume is invalid.\n"); /* volume is invalid */
2028
2029 return 4; /* return error */
2030 }
2031
2032 volume =((15 - volume) & 0x0F) << 2; /* get register data */
2033 res = a_ld3320_write_byte(handle, LD3320_REG_SPEAKER, volume | 0xC3); /* set speaker volume */
2034 if (res != 0) /* check result */
2035 {
2036 handle->debug_print("ld3320: set speaker volume failed.\n"); /* set speaker volume failed */
2037
2038 return 1; /* return error */
2039 }
2040 res = a_ld3320_write_byte(handle, LD3320_REG_ANALOG_CONTROL1, 0x78); /* enable control1 */
2041 if (res != 0) /* check result */
2042 {
2043 handle->debug_print("ld3320: set analog control1 failed.\n"); /* set analog control1 failed */
2044
2045 return 1; /* return error */
2046 }
2047
2048 return 0; /* success return 0 */
2049}
2050
2062uint8_t ld3320_get_speaker_volume(ld3320_handle_t *handle, uint8_t *volume)
2063{
2064 uint8_t res;
2065
2066 if (handle == NULL) /* check handle */
2067 {
2068 return 2; /* return error */
2069 }
2070 if (handle->inited != 1) /* check handle initialization */
2071 {
2072 return 3; /* return error */
2073 }
2074
2075 res = a_ld3320_read_byte(handle, LD3320_REG_SPEAKER, volume); /* get speaker volume */
2076 if (res != 0) /* check result */
2077 {
2078 handle->debug_print("ld3320: get speaker volume failed.\n"); /* get speaker volume failed */
2079
2080 return 1; /* return error */
2081 }
2082 *volume = (*volume) >> 2; /* set volume */
2083 *volume = (*volume) & 0xF; /* set volume */
2084 *volume = 15 - (*volume); /* set volume */
2085
2086 return 0; /* success return 0 */
2087}
2088
2102uint8_t ld3320_set_headset_volume(ld3320_handle_t *handle, uint8_t volume_left, uint8_t volume_right)
2103{
2104 uint8_t res;
2105
2106 if (handle == NULL) /* check handle */
2107 {
2108 return 2; /* return error */
2109 }
2110 if (handle->inited != 1) /* check handle initialization */
2111 {
2112 return 3; /* return error */
2113 }
2114 if (volume_left > 15) /* check volume_left */
2115 {
2116 handle->debug_print("ld3320: volume left is invalid.\n"); /* volume left is invalid */
2117
2118 return 4; /* return error */
2119 }
2120 if (volume_right > 15) /* check volume_right */
2121 {
2122 handle->debug_print("ld3320: volume right is invalid.\n"); /* volume right is invalid */
2123
2124 return 4; /* return error */
2125 }
2126
2127 volume_left =((15 - volume_left) & 0x0F) << 2; /* get register data */
2128 res = a_ld3320_write_byte(handle, LD3320_REG_HEADSET_LEFT, volume_left | 0xC3); /* set headset left volume */
2129 if (res != 0) /* check result */
2130 {
2131 handle->debug_print("ld3320: set headset left failed.\n"); /* set headset left failed */
2132
2133 return 1; /* return error */
2134 }
2135 volume_right =((15 - volume_right) & 0x0F) << 2; /* get register data */
2136 res = a_ld3320_write_byte(handle, LD3320_REG_HEADSET_RIGHT, volume_right | 0xC3); /* set headset right volume */
2137 if (res != 0) /* check result */
2138 {
2139 handle->debug_print("ld3320: set headset right failed.\n"); /* set headset right failed */
2140
2141 return 1; /* return error */
2142 }
2143 res = a_ld3320_write_byte(handle, LD3320_REG_ANALOG_CONTROL1, 0x78); /* enable control1 */
2144 if (res != 0) /* check result */
2145 {
2146 handle->debug_print("ld3320: set analog control1 failed.\n"); /* set analog control1 failed */
2147
2148 return 1; /* return error */
2149 }
2150
2151 return 0; /* success return 0 */
2152}
2153
2166uint8_t ld3320_get_headset_volume(ld3320_handle_t *handle, uint8_t *volume_left, uint8_t *volume_right)
2167{
2168 uint8_t res;
2169
2170 if (handle == NULL) /* check handle */
2171 {
2172 return 2; /* return error */
2173 }
2174 if (handle->inited != 1) /* check handle initialization */
2175 {
2176 return 3; /* return error */
2177 }
2178
2179 res = a_ld3320_read_byte(handle, LD3320_REG_HEADSET_LEFT, volume_left); /* get headset left volume */
2180 if (res != 0) /* check result */
2181 {
2182 handle->debug_print("ld3320: get headset left failed.\n"); /* get headset left failed */
2183
2184 return 1; /* return error */
2185 }
2186
2187 res = a_ld3320_read_byte(handle, LD3320_REG_HEADSET_RIGHT, volume_right); /* get headset right volume */
2188 if (res != 0) /* check result */
2189 {
2190 handle->debug_print("ld3320: get headset right failed.\n"); /* get headset right failed */
2191
2192 return 1; /* return error */
2193 }
2194 *volume_left = (*volume_left) >> 2; /* set left volume */
2195 *volume_left = (*volume_left) & 0xF; /* set left volume */
2196 *volume_left = 15 - (*volume_left); /* set left volume */
2197 *volume_right = (*volume_right) >> 2; /* set right volume */
2198 *volume_right = (*volume_right) & 0xF; /* set right volume */
2199 *volume_right = 15 - (*volume_right); /* set right volume */
2200
2201 return 0; /* success return 0 */
2202}
2203
2215uint8_t ld3320_configure_mp3(ld3320_handle_t *handle, char *name)
2216{
2217 uint8_t res;
2218
2219 if (handle == NULL) /* check handle */
2220 {
2221 return 2; /* return error */
2222 }
2223 if (handle->inited != 1) /* check handle initialization */
2224 {
2225 return 3; /* return error */
2226 }
2227
2228 res = handle->mp3_read_init(name, &handle->size); /* mp3 read init */
2229 if (res != 0) /* check result */
2230 {
2231 handle->debug_print("ld3320: mp3 read init failed.\n"); /* mp3 read init failed */
2232
2233 return 1; /* return error */
2234 }
2235 handle->point = 0; /* set point 0 */
2236
2237 return 0; /* success return 0 */
2238}
2239
2252uint8_t ld3320_set_reg(ld3320_handle_t *handle, uint8_t reg, uint8_t data)
2253{
2254 if (handle == NULL) /* check handle */
2255 {
2256 return 2; /* return error */
2257 }
2258 if (handle->inited != 1) /* check handle initialization */
2259 {
2260 return 3; /* return error */
2261 }
2262
2263 return a_ld3320_write_byte(handle, reg, data); /* write data */
2264}
2265
2278uint8_t ld3320_get_reg(ld3320_handle_t *handle, uint8_t reg, uint8_t *data)
2279{
2280 if (handle == NULL) /* check handle */
2281 {
2282 return 2; /* return error */
2283 }
2284 if (handle->inited != 1) /* check handle initialization */
2285 {
2286 return 3; /* return error */
2287 }
2288
2289 return a_ld3320_read_byte(handle, reg, data); /* read data */
2290}
2291
2300uint8_t ld3320_info(ld3320_info_t *info)
2301{
2302 if (info == NULL) /* check handle */
2303 {
2304 return 2; /* return error */
2305 }
2306
2307 memset(info, 0, sizeof(ld3320_info_t)); /* initialize ld3320 info structure */
2308 strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
2309 strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
2310 strncpy(info->interface, "SPI", 8); /* copy interface name */
2311 info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
2312 info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
2313 info->max_current_ma = MAX_CURRENT; /* set maximum current */
2314 info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
2315 info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
2316 info->driver_version = DRIVER_VERSION; /* set driver version */
2317
2318 return 0; /* success return 0 */
2319}
LD3320_REG_FIFO_MCU_WATER_MARK_H
#define LD3320_REG_FIFO_MCU_WATER_MARK_H
Definition driver_ld3320.c:71
LD3320_REG_HEADSET_RIGHT
#define LD3320_REG_HEADSET_RIGHT
Definition driver_ld3320.c:90
LD3320_REG_FIFO_EXT_DSP_WATER_MARK_L
#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_L
Definition driver_ld3320.c:85
LD3320_REG_CLK_CONF1
#define LD3320_REG_CLK_CONF1
Definition driver_ld3320.c:59
LD3320_REG_FIFO_DSP_WATER_MARK_H
#define LD3320_REG_FIFO_DSP_WATER_MARK_H
Definition driver_ld3320.c:73
LD3320_REG_DSP_CMD
#define LD3320_REG_DSP_CMD
Definition driver_ld3320.c:78
LD3320_REG_ADC_CONF
#define LD3320_REG_ADC_CONF
Definition driver_ld3320.c:63
LD3320_REG_FIFO_EXT_UPPER_HIGH
#define LD3320_REG_FIFO_EXT_UPPER_HIGH
Definition driver_ld3320.c:80
LD3320_REG_CLK_CONF4
#define LD3320_REG_CLK_CONF4
Definition driver_ld3320.c:64
LD3320_REG_CLK_CONF2
#define LD3320_REG_CLK_CONF2
Definition driver_ld3320.c:61
LD3320_REG_ASR_DATA
#define LD3320_REG_ASR_DATA
Definition driver_ld3320.c:110
LD3320_REG_FIFO_EXT_MCU_WATER_MARK_H
#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_H
Definition driver_ld3320.c:84
LD3320_REG_FEEDBACK
#define LD3320_REG_FEEDBACK
Definition driver_ld3320.c:91
MAX_CURRENT
#define MAX_CURRENT
Definition driver_ld3320.c:46
LD3320_REG_ANALOG_CONTROL2
#define LD3320_REG_ANALOG_CONTROL2
Definition driver_ld3320.c:93
LD3320_REG_INT_FLAG
#define LD3320_REG_INT_FLAG
Definition driver_ld3320.c:75
LD3320_REG_FIFO_EXT_UPPER_LOW
#define LD3320_REG_FIFO_EXT_UPPER_LOW
Definition driver_ld3320.c:79
LD3320_REG_ASR_INDEX
#define LD3320_REG_ASR_INDEX
Definition driver_ld3320.c:109
LD3320_REG_FIFO_MCU_WATER_MARK_L
#define LD3320_REG_FIFO_MCU_WATER_MARK_L
Definition driver_ld3320.c:70
LD3320_PLL_11
#define LD3320_PLL_11
Definition driver_ld3320.c:124
LD3320_REG_LOW_POWER
#define LD3320_REG_LOW_POWER
Definition driver_ld3320.c:116
LD3320_REG_FIFO_DATA_LOWER_HIGH
#define LD3320_REG_FIFO_DATA_LOWER_HIGH
Definition driver_ld3320.c:69
LD3320_REG_FIFO_EXT_MCU_WATER_MARK_L
#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_L
Definition driver_ld3320.c:83
LD3320_REG_FIFO_DATA_UPPER_LOW
#define LD3320_REG_FIFO_DATA_UPPER_LOW
Definition driver_ld3320.c:66
LD3320_REG_ASR_RES_1
#define LD3320_REG_ASR_RES_1
Definition driver_ld3320.c:111
LD3320_REG_CMD
#define LD3320_REG_CMD
Definition driver_ld3320.c:60
LD3320_REG_INIT_CONTROL
#define LD3320_REG_INIT_CONTROL
Definition driver_ld3320.c:107
SUPPLY_VOLTAGE_MAX
#define SUPPLY_VOLTAGE_MAX
Definition driver_ld3320.c:45
LD3320_REG_INIT
#define LD3320_REG_INIT
Definition driver_ld3320.c:87
LD3320_REG_SPEAKER
#define LD3320_REG_SPEAKER
Definition driver_ld3320.c:95
LD3320_REG_FIFO_EXT_LOWER_LOW
#define LD3320_REG_FIFO_EXT_LOWER_LOW
Definition driver_ld3320.c:81
LD3320_REG_ASR_VAD_PARAM
#define LD3320_REG_ASR_VAD_PARAM
Definition driver_ld3320.c:98
LD3320_REG_ADC_GAIN
#define LD3320_REG_ADC_GAIN
Definition driver_ld3320.c:77
LD3320_REG_CLK_CONF3
#define LD3320_REG_CLK_CONF3
Definition driver_ld3320.c:62
LD3320_REG_FIFO_EXT
#define LD3320_REG_FIFO_EXT
Definition driver_ld3320.c:56
LD3320_REG_ASR_DSP_SLEEP
#define LD3320_REG_ASR_DSP_SLEEP
Definition driver_ld3320.c:115
LD3320_REG_FIFO_DATA_LOWER_LOW
#define LD3320_REG_FIFO_DATA_LOWER_LOW
Definition driver_ld3320.c:68
LD3320_REG_MP3_CONF
#define LD3320_REG_MP3_CONF
Definition driver_ld3320.c:76
TEMPERATURE_MAX
#define TEMPERATURE_MAX
Definition driver_ld3320.c:48
LD3320_REG_INT_AUX
#define LD3320_REG_INT_AUX
Definition driver_ld3320.c:105
LD3320_REG_GAIN_CONTROL
#define LD3320_REG_GAIN_CONTROL
Definition driver_ld3320.c:94
LD3320_REG_ASR_STR_LEN
#define LD3320_REG_ASR_STR_LEN
Definition driver_ld3320.c:104
LD3320_REG_ADC_CONTROL
#define LD3320_REG_ADC_CONTROL
Definition driver_ld3320.c:65
MANUFACTURER_NAME
#define MANUFACTURER_NAME
Definition driver_ld3320.c:43
LD3320_REG_FIFO_EXT_DSP_WATER_MARK_H
#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_H
Definition driver_ld3320.c:86
TEMPERATURE_MIN
#define TEMPERATURE_MIN
Definition driver_ld3320.c:47
SUPPLY_VOLTAGE_MIN
#define SUPPLY_VOLTAGE_MIN
Definition driver_ld3320.c:44
LD3320_REG_ANALOG_CONTROL1
#define LD3320_REG_ANALOG_CONTROL1
Definition driver_ld3320.c:92
LD3320_REG_FIFO_DATA
#define LD3320_REG_FIFO_DATA
chip register definition
Definition driver_ld3320.c:54
LD3320_REG_FIFO_DATA_UPPER_HIGH
#define LD3320_REG_FIFO_DATA_UPPER_HIGH
Definition driver_ld3320.c:67
LD3320_PLL_ASR_19
#define LD3320_PLL_ASR_19
Definition driver_ld3320.c:125
LD3320_PLL_MP3_1D
#define LD3320_PLL_MP3_1D
Definition driver_ld3320.c:123
LD3320_PLL_MP3_19
#define LD3320_PLL_MP3_19
chip register param definition
Definition driver_ld3320.c:121
LD3320_PLL_ASR_1B
#define LD3320_PLL_ASR_1B
Definition driver_ld3320.c:126
LD3320_REG_ASR_FORCE_STOP
#define LD3320_REG_ASR_FORCE_STOP
Definition driver_ld3320.c:106
LD3320_REG_ASR_STATUS
#define LD3320_REG_ASR_STATUS
Definition driver_ld3320.c:97
LD3320_REG_FIFO_EXT_LOWER_HIGH
#define LD3320_REG_FIFO_EXT_LOWER_HIGH
Definition driver_ld3320.c:82
LD3320_REG_LINEOUT
#define LD3320_REG_LINEOUT
Definition driver_ld3320.c:96
CHIP_NAME
#define CHIP_NAME
chip information definition
Definition driver_ld3320.c:42
LD3320_PLL_MP3_1B
#define LD3320_PLL_MP3_1B
Definition driver_ld3320.c:122
LD3320_REG_HEADSET_LEFT
#define LD3320_REG_HEADSET_LEFT
Definition driver_ld3320.c:89
LD3320_REG_ASR_STATUS2
#define LD3320_REG_ASR_STATUS2
Definition driver_ld3320.c:108
LD3320_REG_FIFO_STATUS
#define LD3320_REG_FIFO_STATUS
Definition driver_ld3320.c:57
DRIVER_VERSION
#define DRIVER_VERSION
Definition driver_ld3320.c:49
LD3320_REG_FIFO_DSP_WATER_MARK_L
#define LD3320_REG_FIFO_DSP_WATER_MARK_L
Definition driver_ld3320.c:72
LD3320_REG_ASR_RES_4
#define LD3320_REG_ASR_RES_4
Definition driver_ld3320.c:114
LD3320_REG_INT_CONF
#define LD3320_REG_INT_CONF
Definition driver_ld3320.c:74
LD3320_REG_FIFO_INT_CONF
#define LD3320_REG_FIFO_INT_CONF
Definition driver_ld3320.c:55
LD3320_PLL_ASR_1D
#define LD3320_PLL_ASR_1D
Definition driver_ld3320.c:127
LD3320_REG_FIFO_CLEAR
#define LD3320_REG_FIFO_CLEAR
Definition driver_ld3320.c:58
driver_ld3320.h
driver ld3320 header file
ld3320_get_mode
uint8_t ld3320_get_mode(ld3320_handle_t *handle, ld3320_mode_t *mode)
get the chip mode
Definition driver_ld3320.c:1069
ld3320_info_t
struct ld3320_info_s ld3320_info_t
ld3320 information structure definition
ld3320_get_mic_gain
uint8_t ld3320_get_mic_gain(ld3320_handle_t *handle, ld3320_mic_gain_t *gain)
get the microphone gain
Definition driver_ld3320.c:1187
ld3320_set_vad
uint8_t ld3320_set_vad(ld3320_handle_t *handle, ld3320_vad_t vad)
set the vad
Definition driver_ld3320.c:1213
ld3320_deinit
uint8_t ld3320_deinit(ld3320_handle_t *handle)
deinit the chip
Definition driver_ld3320.c:1870
ld3320_stop
uint8_t ld3320_stop(ld3320_handle_t *handle)
stop the process
Definition driver_ld3320.c:1958
ld3320_get_key_words
uint8_t ld3320_get_key_words(ld3320_handle_t *handle, char text[50][50], uint8_t *len)
get the key words
Definition driver_ld3320.c:1129
ld3320_mode_t
ld3320_mode_t
ld3320 mode enumeration definition
Definition driver_ld3320.h:70
ld3320_status_t
ld3320_status_t
ld3320 asr status enumeration definition
Definition driver_ld3320.h:97
ld3320_init
uint8_t ld3320_init(ld3320_handle_t *handle)
initialize the chip
Definition driver_ld3320.c:1292
ld3320_configure_mp3
uint8_t ld3320_configure_mp3(ld3320_handle_t *handle, char *name)
configure the mp3
Definition driver_ld3320.c:2215
ld3320_set_key_words
uint8_t ld3320_set_key_words(ld3320_handle_t *handle, char text[50][50], uint8_t len)
set the key words
Definition driver_ld3320.c:1096
ld3320_get_speaker_volume
uint8_t ld3320_get_speaker_volume(ld3320_handle_t *handle, uint8_t *volume)
get the speaker volume
Definition driver_ld3320.c:2062
ld3320_vad_t
ld3320_vad_t
ld3320 vad enumeration definition
Definition driver_ld3320.h:88
ld3320_handle_t
struct ld3320_handle_s ld3320_handle_t
ld3320 handle structure definition
ld3320_set_headset_volume
uint8_t ld3320_set_headset_volume(ld3320_handle_t *handle, uint8_t volume_left, uint8_t volume_right)
set the headset volume
Definition driver_ld3320.c:2102
ld3320_info
uint8_t ld3320_info(ld3320_info_t *info)
get chip's information
Definition driver_ld3320.c:2300
ld3320_start
uint8_t ld3320_start(ld3320_handle_t *handle)
start the process
Definition driver_ld3320.c:1739
ld3320_irq_handler
uint8_t ld3320_irq_handler(ld3320_handle_t *handle)
irq handler
Definition driver_ld3320.c:1421
ld3320_get_vad
uint8_t ld3320_get_vad(ld3320_handle_t *handle, ld3320_vad_t *vad)
get the vad
Definition driver_ld3320.c:1239
ld3320_get_headset_volume
uint8_t ld3320_get_headset_volume(ld3320_handle_t *handle, uint8_t *volume_left, uint8_t *volume_right)
get the headset volume
Definition driver_ld3320.c:2166
ld3320_set_mode
uint8_t ld3320_set_mode(ld3320_handle_t *handle, ld3320_mode_t mode)
set the chip mode
Definition driver_ld3320.c:1043
ld3320_set_mic_gain
uint8_t ld3320_set_mic_gain(ld3320_handle_t *handle, ld3320_mic_gain_t gain)
set the microphone gain
Definition driver_ld3320.c:1161
ld3320_get_status
uint8_t ld3320_get_status(ld3320_handle_t *handle, ld3320_status_t *status)
get the status
Definition driver_ld3320.c:1265
ld3320_set_speaker_volume
uint8_t ld3320_set_speaker_volume(ld3320_handle_t *handle, uint8_t volume)
set the speaker volume
Definition driver_ld3320.c:2013
ld3320_mic_gain_t
ld3320_mic_gain_t
ld3320 mic gain enumeration definition
Definition driver_ld3320.h:79
LD3320_MODE_ASR
@ LD3320_MODE_ASR
Definition driver_ld3320.h:71
LD3320_MODE_MP3
@ LD3320_MODE_MP3
Definition driver_ld3320.h:72
LD3320_STATUS_MP3_END
@ LD3320_STATUS_MP3_END
Definition driver_ld3320.h:105
LD3320_STATUS_ASR_ERROR
@ LD3320_STATUS_ASR_ERROR
Definition driver_ld3320.h:102
LD3320_STATUS_MP3_LOAD
@ LD3320_STATUS_MP3_LOAD
Definition driver_ld3320.h:104
LD3320_STATUS_ASR_RUNNING
@ LD3320_STATUS_ASR_RUNNING
Definition driver_ld3320.h:99
LD3320_STATUS_ASR_FOUND_OK
@ LD3320_STATUS_ASR_FOUND_OK
Definition driver_ld3320.h:100
LD3320_STATUS_MP3_ERROR
@ LD3320_STATUS_MP3_ERROR
Definition driver_ld3320.h:106
LD3320_STATUS_NONE
@ LD3320_STATUS_NONE
Definition driver_ld3320.h:98
LD3320_STATUS_MP3_RUNNING
@ LD3320_STATUS_MP3_RUNNING
Definition driver_ld3320.h:103
LD3320_STATUS_ASR_FOUND_ZERO
@ LD3320_STATUS_ASR_FOUND_ZERO
Definition driver_ld3320.h:101
LD3320_VAD_COMMON
@ LD3320_VAD_COMMON
Definition driver_ld3320.h:89
LD3320_MIC_GAIN_COMMON
@ LD3320_MIC_GAIN_COMMON
Definition driver_ld3320.h:80
ld3320_set_reg
uint8_t ld3320_set_reg(ld3320_handle_t *handle, uint8_t reg, uint8_t data)
set the chip register
Definition driver_ld3320.c:2252
ld3320_get_reg
uint8_t ld3320_get_reg(ld3320_handle_t *handle, uint8_t reg, uint8_t *data)
get the chip register
Definition driver_ld3320.c:2278
ld3320_handle_s::mic_gain
uint8_t mic_gain
Definition driver_ld3320.h:131
ld3320_handle_s::inited
uint8_t inited
Definition driver_ld3320.h:128
ld3320_handle_s::mp3_read_init
uint8_t(* mp3_read_init)(char *name, uint32_t *size)
Definition driver_ld3320.h:125
ld3320_handle_s::vad
uint8_t vad
Definition driver_ld3320.h:132
ld3320_handle_s::spi_init
uint8_t(* spi_init)(void)
Definition driver_ld3320.h:114
ld3320_handle_s::mode
uint8_t mode
Definition driver_ld3320.h:129
ld3320_handle_s::mp3_read
uint8_t(* mp3_read)(uint32_t addr, uint16_t size, uint8_t *buffer)
Definition driver_ld3320.h:126
ld3320_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition driver_ld3320.h:121
ld3320_handle_s::len
uint8_t len
Definition driver_ld3320.h:134
ld3320_handle_s::running_status
uint8_t running_status
Definition driver_ld3320.h:130
ld3320_handle_s::reset_gpio_deinit
uint8_t(* reset_gpio_deinit)(void)
Definition driver_ld3320.h:119
ld3320_handle_s::mp3_read_deinit
uint8_t(* mp3_read_deinit)(void)
Definition driver_ld3320.h:127
ld3320_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition driver_ld3320.h:123
ld3320_handle_s::spi_read_address16
uint8_t(* spi_read_address16)(uint16_t addr, uint8_t *buf, uint16_t len)
Definition driver_ld3320.h:116
ld3320_handle_s::buf
uint8_t buf[512]
Definition driver_ld3320.h:137
ld3320_handle_s::point
uint32_t point
Definition driver_ld3320.h:135
ld3320_handle_s::receive_callback
void(* receive_callback)(uint8_t type, uint8_t index, char *text)
Definition driver_ld3320.h:124
ld3320_handle_s::delay_us
void(* delay_us)(uint32_t us)
Definition driver_ld3320.h:122
ld3320_handle_s::spi_deinit
uint8_t(* spi_deinit)(void)
Definition driver_ld3320.h:115
ld3320_handle_s::reset_gpio_init
uint8_t(* reset_gpio_init)(void)
Definition driver_ld3320.h:118
ld3320_handle_s::size
uint32_t size
Definition driver_ld3320.h:136
ld3320_handle_s::spi_write_cmd
uint8_t(* spi_write_cmd)(uint8_t *buf, uint16_t len)
Definition driver_ld3320.h:117
ld3320_handle_s::text
char text[50][50]
Definition driver_ld3320.h:133
ld3320_handle_s::reset_gpio_write
uint8_t(* reset_gpio_write)(uint8_t data)
Definition driver_ld3320.h:120
ld3320_info_s::temperature_max
float temperature_max
Definition driver_ld3320.h:152
ld3320_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition driver_ld3320.h:149
ld3320_info_s::driver_version
uint32_t driver_version
Definition driver_ld3320.h:153
ld3320_info_s::temperature_min
float temperature_min
Definition driver_ld3320.h:151
ld3320_info_s::max_current_ma
float max_current_ma
Definition driver_ld3320.h:150
ld3320_info_s::manufacturer_name
char manufacturer_name[32]
Definition driver_ld3320.h:146
ld3320_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition driver_ld3320.h:148
ld3320_info_s::interface
char interface[8]
Definition driver_ld3320.h:147
ld3320_info_s::chip_name
char chip_name[32]
Definition driver_ld3320.h:145