LibDriver LD3320
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driver_ld3320.c File Reference

driver ld3320 source file More...

#include "driver_ld3320.h"
Include dependency graph for driver_ld3320.c:

Go to the source code of this file.

Macros

#define CHIP_NAME   "IC Route LD3320"
 chip information definition
#define MANUFACTURER_NAME   "IC Route"
#define SUPPLY_VOLTAGE_MIN   3.0f
#define SUPPLY_VOLTAGE_MAX   3.3f
#define MAX_CURRENT   166.7f
#define TEMPERATURE_MIN   -40.0f
#define TEMPERATURE_MAX   85.0f
#define DRIVER_VERSION   1000
#define LD3320_REG_FIFO_DATA   0x01
 chip register definition
#define LD3320_REG_FIFO_INT_CONF   0x02
#define LD3320_REG_FIFO_EXT   0x05
#define LD3320_REG_FIFO_STATUS   0x06
#define LD3320_REG_FIFO_CLEAR   0x08
#define LD3320_REG_CLK_CONF1   0x11
#define LD3320_REG_CMD   0x17
#define LD3320_REG_CLK_CONF2   0x19
#define LD3320_REG_CLK_CONF3   0x1B
#define LD3320_REG_ADC_CONF   0x1C
#define LD3320_REG_CLK_CONF4   0x1D
#define LD3320_REG_ADC_CONTROL   0x1E
#define LD3320_REG_FIFO_DATA_UPPER_LOW   0x20
#define LD3320_REG_FIFO_DATA_UPPER_HIGH   0x21
#define LD3320_REG_FIFO_DATA_LOWER_LOW   0x22
#define LD3320_REG_FIFO_DATA_LOWER_HIGH   0x23
#define LD3320_REG_FIFO_MCU_WATER_MARK_L   0x24
#define LD3320_REG_FIFO_MCU_WATER_MARK_H   0x25
#define LD3320_REG_FIFO_DSP_WATER_MARK_L   0x26
#define LD3320_REG_FIFO_DSP_WATER_MARK_H   0x27
#define LD3320_REG_INT_CONF   0x29
#define LD3320_REG_INT_FLAG   0x2B
#define LD3320_REG_MP3_CONF   0x33
#define LD3320_REG_ADC_GAIN   0x35
#define LD3320_REG_DSP_CMD   0x37
#define LD3320_REG_FIFO_EXT_UPPER_LOW   0x38
#define LD3320_REG_FIFO_EXT_UPPER_HIGH   0x3A
#define LD3320_REG_FIFO_EXT_LOWER_LOW   0x3C
#define LD3320_REG_FIFO_EXT_LOWER_HIGH   0x3E
#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_L   0x40
#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_H   0x42
#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_L   0x44
#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_H   0x46
#define LD3320_REG_INIT   0x6F
#define LD3320_REG_CLK_CONF5   0x79
#define LD3320_REG_HEADSET_LEFT   0x81
#define LD3320_REG_HEADSET_RIGHT   0x83
#define LD3320_REG_FEEDBACK   0x85
#define LD3320_REG_ANALOG_CONTROL1   0x87
#define LD3320_REG_ANALOG_CONTROL2   0x89
#define LD3320_REG_GAIN_CONTROL   0x8D
#define LD3320_REG_SPEAKER   0x8E
#define LD3320_REG_LINEOUT   0x8F
#define LD3320_REG_ASR_STATUS   0xB2
#define LD3320_REG_ASR_VAD_PARAM   0xB3
#define LD3320_REG_ASR_VAD_START   0xB4
#define LD3320_REG_ASR_VAD_SILENCE_END   0xB5
#define LD3320_REG_ASR_VAD_VOICE_MAX_LEN   0xB6
#define LD3320_REG_ASR_PASS_FRAME   0xB7
#define LD3320_REG_ASR_TIME   0xB8
#define LD3320_REG_ASR_STR_LEN   0xB9
#define LD3320_REG_INT_AUX   0xBA
#define LD3320_REG_ASR_FORCE_STOP   0xBC
#define LD3320_REG_INIT_CONTROL   0xBD
#define LD3320_REG_ASR_STATUS2   0xBF
#define LD3320_REG_ASR_INDEX   0xC1
#define LD3320_REG_ASR_DATA   0xC3
#define LD3320_REG_ASR_RES_1   0xC5
#define LD3320_REG_ASR_RES_2   0xC7
#define LD3320_REG_ASR_RES_3   0xC9
#define LD3320_REG_ASR_RES_4   0xCB
#define LD3320_REG_ASR_DSP_SLEEP   0xCD
#define LD3320_REG_LOW_POWER   0xCF
#define LD3320_PLL_MP3_19   0x0F
 chip register param definition
#define LD3320_PLL_MP3_1B   0x18
#define LD3320_PLL_MP3_1D   (uint8_t)(((90.0f * ((LD3320_PLL_11) + 1.0f)) / (LD3320_CYSTAL_MHZ)) - 1.0f)
#define LD3320_PLL_11   (uint8_t)((LD3320_CYSTAL_MHZ / 2.0f) - 1.0f)
#define LD3320_PLL_ASR_19   (uint8_t)(LD3320_CYSTAL_MHZ * 32.0f / (LD3320_PLL_11 + 1.0f) - 0.51f)
#define LD3320_PLL_ASR_1B   0x48
#define LD3320_PLL_ASR_1D   0x1F

Functions

uint8_t ld3320_set_mode (ld3320_handle_t *handle, ld3320_mode_t mode)
 set the chip mode
uint8_t ld3320_get_mode (ld3320_handle_t *handle, ld3320_mode_t *mode)
 get the chip mode
uint8_t ld3320_set_key_words (ld3320_handle_t *handle, char text[50][50], uint8_t len)
 set the key words
uint8_t ld3320_get_key_words (ld3320_handle_t *handle, char text[50][50], uint8_t *len)
 get the key words
uint8_t ld3320_set_mic_gain (ld3320_handle_t *handle, ld3320_mic_gain_t gain)
 set the microphone gain
uint8_t ld3320_get_mic_gain (ld3320_handle_t *handle, ld3320_mic_gain_t *gain)
 get the microphone gain
uint8_t ld3320_set_vad (ld3320_handle_t *handle, ld3320_vad_t vad)
 set the vad
uint8_t ld3320_get_vad (ld3320_handle_t *handle, ld3320_vad_t *vad)
 get the vad
uint8_t ld3320_get_status (ld3320_handle_t *handle, ld3320_status_t *status)
 get the status
uint8_t ld3320_init (ld3320_handle_t *handle)
 initialize the chip
uint8_t ld3320_irq_handler (ld3320_handle_t *handle)
 irq handler
uint8_t ld3320_start (ld3320_handle_t *handle)
 start the process
uint8_t ld3320_deinit (ld3320_handle_t *handle)
 deinit the chip
uint8_t ld3320_stop (ld3320_handle_t *handle)
 stop the process
uint8_t ld3320_set_speaker_volume (ld3320_handle_t *handle, uint8_t volume)
 set the speaker volume
uint8_t ld3320_get_speaker_volume (ld3320_handle_t *handle, uint8_t *volume)
 get the speaker volume
uint8_t ld3320_set_headset_volume (ld3320_handle_t *handle, uint8_t volume_left, uint8_t volume_right)
 set the headset volume
uint8_t ld3320_get_headset_volume (ld3320_handle_t *handle, uint8_t *volume_left, uint8_t *volume_right)
 get the headset volume
uint8_t ld3320_configure_mp3 (ld3320_handle_t *handle, char *name)
 configure the mp3
uint8_t ld3320_set_reg (ld3320_handle_t *handle, uint8_t reg, uint8_t data)
 set the chip register
uint8_t ld3320_get_reg (ld3320_handle_t *handle, uint8_t reg, uint8_t *data)
 get the chip register
uint8_t ld3320_info (ld3320_info_t *info)
 get chip's information

Detailed Description

driver ld3320 source file

Copyright (c) 2015 - present LibDriver All rights reserved

The MIT License (MIT)

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Version
1.0.0
Author
Shifeng Li
Date
2021-05-12

history

Date Version Author Description
2021/05/12 1.0 Shifeng Li first upload

Definition in file driver_ld3320.c.

Macro Definition Documentation

◆ CHIP_NAME

#define CHIP_NAME   "IC Route LD3320"

chip information definition

chip name

Definition at line 42 of file driver_ld3320.c.

◆ DRIVER_VERSION

#define DRIVER_VERSION   1000

driver version

Definition at line 49 of file driver_ld3320.c.

◆ LD3320_PLL_11

#define LD3320_PLL_11   (uint8_t)((LD3320_CYSTAL_MHZ / 2.0f) - 1.0f)

Definition at line 124 of file driver_ld3320.c.

◆ LD3320_PLL_ASR_19

#define LD3320_PLL_ASR_19   (uint8_t)(LD3320_CYSTAL_MHZ * 32.0f / (LD3320_PLL_11 + 1.0f) - 0.51f)

Definition at line 125 of file driver_ld3320.c.

◆ LD3320_PLL_ASR_1B

#define LD3320_PLL_ASR_1B   0x48

Definition at line 126 of file driver_ld3320.c.

◆ LD3320_PLL_ASR_1D

#define LD3320_PLL_ASR_1D   0x1F

Definition at line 127 of file driver_ld3320.c.

◆ LD3320_PLL_MP3_19

#define LD3320_PLL_MP3_19   0x0F

chip register param definition

Definition at line 121 of file driver_ld3320.c.

◆ LD3320_PLL_MP3_1B

#define LD3320_PLL_MP3_1B   0x18

Definition at line 122 of file driver_ld3320.c.

◆ LD3320_PLL_MP3_1D

#define LD3320_PLL_MP3_1D   (uint8_t)(((90.0f * ((LD3320_PLL_11) + 1.0f)) / (LD3320_CYSTAL_MHZ)) - 1.0f)

Definition at line 123 of file driver_ld3320.c.

◆ LD3320_REG_ADC_CONF

#define LD3320_REG_ADC_CONF   0x1C

adc configure register

Definition at line 63 of file driver_ld3320.c.

◆ LD3320_REG_ADC_CONTROL

#define LD3320_REG_ADC_CONTROL   0x1E

adc control register

Definition at line 65 of file driver_ld3320.c.

◆ LD3320_REG_ADC_GAIN

#define LD3320_REG_ADC_GAIN   0x35

adc gain register

Definition at line 77 of file driver_ld3320.c.

◆ LD3320_REG_ANALOG_CONTROL1

#define LD3320_REG_ANALOG_CONTROL1   0x87

analog control 1 register

Definition at line 92 of file driver_ld3320.c.

◆ LD3320_REG_ANALOG_CONTROL2

#define LD3320_REG_ANALOG_CONTROL2   0x89

analog control 2 register

Definition at line 93 of file driver_ld3320.c.

◆ LD3320_REG_ASR_DATA

#define LD3320_REG_ASR_DATA   0xC3

asr data register

Definition at line 110 of file driver_ld3320.c.

◆ LD3320_REG_ASR_DSP_SLEEP

#define LD3320_REG_ASR_DSP_SLEEP   0xCD

dsp sleep register

Definition at line 115 of file driver_ld3320.c.

◆ LD3320_REG_ASR_FORCE_STOP

#define LD3320_REG_ASR_FORCE_STOP   0xBC

force stop asr register

Definition at line 106 of file driver_ld3320.c.

◆ LD3320_REG_ASR_INDEX

#define LD3320_REG_ASR_INDEX   0xC1

asr index register

Definition at line 109 of file driver_ld3320.c.

◆ LD3320_REG_ASR_PASS_FRAME

#define LD3320_REG_ASR_PASS_FRAME   0xB7

asr pass frame register

Definition at line 102 of file driver_ld3320.c.

◆ LD3320_REG_ASR_RES_1

#define LD3320_REG_ASR_RES_1   0xC5

result 1 register

Definition at line 111 of file driver_ld3320.c.

◆ LD3320_REG_ASR_RES_2

#define LD3320_REG_ASR_RES_2   0xC7

result 2 register

Definition at line 112 of file driver_ld3320.c.

◆ LD3320_REG_ASR_RES_3

#define LD3320_REG_ASR_RES_3   0xC9

result 3 register

Definition at line 113 of file driver_ld3320.c.

◆ LD3320_REG_ASR_RES_4

#define LD3320_REG_ASR_RES_4   0xCB

result 4 register

Definition at line 114 of file driver_ld3320.c.

◆ LD3320_REG_ASR_STATUS

#define LD3320_REG_ASR_STATUS   0xB2

asr status register

Definition at line 97 of file driver_ld3320.c.

◆ LD3320_REG_ASR_STATUS2

#define LD3320_REG_ASR_STATUS2   0xBF

asr status 2 register

Definition at line 108 of file driver_ld3320.c.

◆ LD3320_REG_ASR_STR_LEN

#define LD3320_REG_ASR_STR_LEN   0xB9

asr string length register

Definition at line 104 of file driver_ld3320.c.

◆ LD3320_REG_ASR_TIME

#define LD3320_REG_ASR_TIME   0xB8

asr time register

Definition at line 103 of file driver_ld3320.c.

◆ LD3320_REG_ASR_VAD_PARAM

#define LD3320_REG_ASR_VAD_PARAM   0xB3

asr vad param register

Definition at line 98 of file driver_ld3320.c.

◆ LD3320_REG_ASR_VAD_SILENCE_END

#define LD3320_REG_ASR_VAD_SILENCE_END   0xB5

asr vad silence end register

Definition at line 100 of file driver_ld3320.c.

◆ LD3320_REG_ASR_VAD_START

#define LD3320_REG_ASR_VAD_START   0xB4

asr vad start register

Definition at line 99 of file driver_ld3320.c.

◆ LD3320_REG_ASR_VAD_VOICE_MAX_LEN

#define LD3320_REG_ASR_VAD_VOICE_MAX_LEN   0xB6

asr vad voice max length register

Definition at line 101 of file driver_ld3320.c.

◆ LD3320_REG_CLK_CONF1

#define LD3320_REG_CLK_CONF1   0x11

clock frequency configure 1 register

Definition at line 59 of file driver_ld3320.c.

◆ LD3320_REG_CLK_CONF2

#define LD3320_REG_CLK_CONF2   0x19

clock frequency configure 2 register

Definition at line 61 of file driver_ld3320.c.

◆ LD3320_REG_CLK_CONF3

#define LD3320_REG_CLK_CONF3   0x1B

clock frequency configure 3 register

Definition at line 62 of file driver_ld3320.c.

◆ LD3320_REG_CLK_CONF4

#define LD3320_REG_CLK_CONF4   0x1D

clock frequency configure 4 register

Definition at line 64 of file driver_ld3320.c.

◆ LD3320_REG_CLK_CONF5

#define LD3320_REG_CLK_CONF5   0x79

clock frequency configure 5 register

Definition at line 88 of file driver_ld3320.c.

◆ LD3320_REG_CMD

#define LD3320_REG_CMD   0x17

command register

Definition at line 60 of file driver_ld3320.c.

◆ LD3320_REG_DSP_CMD

#define LD3320_REG_DSP_CMD   0x37

dsp command register

Definition at line 78 of file driver_ld3320.c.

◆ LD3320_REG_FEEDBACK

#define LD3320_REG_FEEDBACK   0x85

internal feedback register

Definition at line 91 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_CLEAR

#define LD3320_REG_FIFO_CLEAR   0x08

fifo clear register

Definition at line 58 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_DATA

#define LD3320_REG_FIFO_DATA   0x01

chip register definition

fifo data register

Definition at line 54 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_DATA_LOWER_HIGH

#define LD3320_REG_FIFO_DATA_LOWER_HIGH   0x23

fifo lower boundary high register

Definition at line 69 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_DATA_LOWER_LOW

#define LD3320_REG_FIFO_DATA_LOWER_LOW   0x22

fifo lower boundary low register

Definition at line 68 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_DATA_UPPER_HIGH

#define LD3320_REG_FIFO_DATA_UPPER_HIGH   0x21

fifo upper boundary high register

Definition at line 67 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_DATA_UPPER_LOW

#define LD3320_REG_FIFO_DATA_UPPER_LOW   0x20

fifo upper boundary low register

Definition at line 66 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_DSP_WATER_MARK_H

#define LD3320_REG_FIFO_DSP_WATER_MARK_H   0x27

fifo dsp water mark high register

Definition at line 73 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_DSP_WATER_MARK_L

#define LD3320_REG_FIFO_DSP_WATER_MARK_L   0x26

fifo dsp water mark low register

Definition at line 72 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT

#define LD3320_REG_FIFO_EXT   0x05

fifo extern register

Definition at line 56 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_DSP_WATER_MARK_H

#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_H   0x46

fifo extern dsp water mark high register

Definition at line 86 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_DSP_WATER_MARK_L

#define LD3320_REG_FIFO_EXT_DSP_WATER_MARK_L   0x44

fifo extern dsp water mark low register

Definition at line 85 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_LOWER_HIGH

#define LD3320_REG_FIFO_EXT_LOWER_HIGH   0x3E

dsp lower boundary high register

Definition at line 82 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_LOWER_LOW

#define LD3320_REG_FIFO_EXT_LOWER_LOW   0x3C

dsp lower boundary low register

Definition at line 81 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_MCU_WATER_MARK_H

#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_H   0x42

fifo extern mcu water mark high register

Definition at line 84 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_MCU_WATER_MARK_L

#define LD3320_REG_FIFO_EXT_MCU_WATER_MARK_L   0x40

fifo extern mcu water mark low register

Definition at line 83 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_UPPER_HIGH

#define LD3320_REG_FIFO_EXT_UPPER_HIGH   0x3A

dsp upper boundary high register

Definition at line 80 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_EXT_UPPER_LOW

#define LD3320_REG_FIFO_EXT_UPPER_LOW   0x38

dsp upper boundary low register

Definition at line 79 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_INT_CONF

#define LD3320_REG_FIFO_INT_CONF   0x02

fifo interrupt configure register

Definition at line 55 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_MCU_WATER_MARK_H

#define LD3320_REG_FIFO_MCU_WATER_MARK_H   0x25

fifo mcu water mark high register

Definition at line 71 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_MCU_WATER_MARK_L

#define LD3320_REG_FIFO_MCU_WATER_MARK_L   0x24

fifo mcu water mark low register

Definition at line 70 of file driver_ld3320.c.

◆ LD3320_REG_FIFO_STATUS

#define LD3320_REG_FIFO_STATUS   0x06

fifo status register

Definition at line 57 of file driver_ld3320.c.

◆ LD3320_REG_GAIN_CONTROL

#define LD3320_REG_GAIN_CONTROL   0x8D

internal gain control register

Definition at line 94 of file driver_ld3320.c.

◆ LD3320_REG_HEADSET_LEFT

#define LD3320_REG_HEADSET_LEFT   0x81

headset left register

Definition at line 89 of file driver_ld3320.c.

◆ LD3320_REG_HEADSET_RIGHT

#define LD3320_REG_HEADSET_RIGHT   0x83

headset right register

Definition at line 90 of file driver_ld3320.c.

◆ LD3320_REG_INIT

#define LD3320_REG_INIT   0x6F

init register

Definition at line 87 of file driver_ld3320.c.

◆ LD3320_REG_INIT_CONTROL

#define LD3320_REG_INIT_CONTROL   0xBD

init control register

Definition at line 107 of file driver_ld3320.c.

◆ LD3320_REG_INT_AUX

#define LD3320_REG_INT_AUX   0xBA

interrupt auxiliary register

Definition at line 105 of file driver_ld3320.c.

◆ LD3320_REG_INT_CONF

#define LD3320_REG_INT_CONF   0x29

interrupt configure register

Definition at line 74 of file driver_ld3320.c.

◆ LD3320_REG_INT_FLAG

#define LD3320_REG_INT_FLAG   0x2B

interrupt flag register

Definition at line 75 of file driver_ld3320.c.

◆ LD3320_REG_LINEOUT

#define LD3320_REG_LINEOUT   0x8F

line out register

Definition at line 96 of file driver_ld3320.c.

◆ LD3320_REG_LOW_POWER

#define LD3320_REG_LOW_POWER   0xCF

low power register

Definition at line 116 of file driver_ld3320.c.

◆ LD3320_REG_MP3_CONF

#define LD3320_REG_MP3_CONF   0x33

mp3 configure register

Definition at line 76 of file driver_ld3320.c.

◆ LD3320_REG_SPEAKER

#define LD3320_REG_SPEAKER   0x8E

speaker register

Definition at line 95 of file driver_ld3320.c.

◆ MANUFACTURER_NAME

#define MANUFACTURER_NAME   "IC Route"

manufacturer name

Definition at line 43 of file driver_ld3320.c.

◆ MAX_CURRENT

#define MAX_CURRENT   166.7f

chip max current

Definition at line 46 of file driver_ld3320.c.

◆ SUPPLY_VOLTAGE_MAX

#define SUPPLY_VOLTAGE_MAX   3.3f

chip max supply voltage

Definition at line 45 of file driver_ld3320.c.

◆ SUPPLY_VOLTAGE_MIN

#define SUPPLY_VOLTAGE_MIN   3.0f

chip min supply voltage

Definition at line 44 of file driver_ld3320.c.

◆ TEMPERATURE_MAX

#define TEMPERATURE_MAX   85.0f

chip max operating temperature

Definition at line 48 of file driver_ld3320.c.

◆ TEMPERATURE_MIN

#define TEMPERATURE_MIN   -40.0f

chip min operating temperature

Definition at line 47 of file driver_ld3320.c.