LibDriver SX1262
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driver_sx1262.c
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1
36
37#include "driver_sx1262.h"
38#include <math.h>
39
43#define CHIP_NAME "Semtech SX1262"
44#define MANUFACTURER_NAME "Semtech"
45#define SUPPLY_VOLTAGE_MIN 1.8f
46#define SUPPLY_VOLTAGE_MAX 3.7f
47#define MAX_CURRENT 107.0f
48#define TEMPERATURE_MIN -40.0f
49#define TEMPERATURE_MAX 85.0f
50#define DRIVER_VERSION 1000
51
55#define SX1262_COMMAND_SET_SLEEP 0x84
56#define SX1262_COMMAND_SET_STANDBY 0x80
57#define SX1262_COMMAND_SET_FS 0xC1
58#define SX1262_COMMAND_SET_TX 0x83
59#define SX1262_COMMAND_SET_RX 0x82
60#define SX1262_COMMAND_STOP_TIMER_ON_PREAMBLE 0x9F
61#define SX1262_COMMAND_SET_RX_DUTY_CYCLE 0x94
62#define SX1262_COMMAND_SET_CAD 0xC5
63#define SX1262_COMMAND_SET_TX_CONTINUOUS_WAVE 0xD1
64#define SX1262_COMMAND_SET_TX_INFINITE_PREAMBLE 0xD2
65#define SX1262_COMMAND_SET_REGULATOR_MODE 0x96
66#define SX1262_COMMAND_SET_CALIBRATE 0x89
67#define SX1262_COMMAND_SET_CALIBRATE_IMAGE 0x98
68#define SX1262_COMMAND_SET_PA_CONFIG 0x95
69#define SX1262_COMMAND_SET_RX_TX_FALLBACK_MODE 0x93
70#define SX1262_COMMAND_WRITE_REGISTER 0x0D
71#define SX1262_COMMAND_READ_REGISTER 0x1D
72#define SX1262_COMMAND_WRITE_BUFFER 0x0E
73#define SX1262_COMMAND_READ_BUFFER 0x1E
74#define SX1262_COMMAND_SET_DIO_IRQ_PARAMS 0x08
75#define SX1262_COMMAND_GET_IRQ_STATUS 0x12
76#define SX1262_COMMAND_CLEAR_IRQ_STATUS 0x02
77#define SX1262_COMMAND_SET_DIO2_AS_RF_SWITCH_CTRL 0x9D
78#define SX1262_COMMAND_SET_DIO3_AS_TCXO_CTRL 0x97
79#define SX1262_COMMAND_SET_RF_FREQUENCY 0x86
80#define SX1262_COMMAND_SET_PACKET_TYPE 0x8A
81#define SX1262_COMMAND_GET_PACKET_TYPE 0x11
82#define SX1262_COMMAND_SET_TX_PARAMS 0x8E
83#define SX1262_COMMAND_SET_MODULATION_PARAMS 0x8B
84#define SX1262_COMMAND_SET_PACKET_PARAMS 0x8C
85#define SX1262_COMMAND_SET_CAD_PARAMS 0x88
86#define SX1262_COMMAND_SET_BUFFER_BASE_ADDRESS 0x8F
87#define SX1262_COMMAND_SET_LORA_SYMB_NUM_TIMEOUT 0xA0
88#define SX1262_COMMAND_GET_STATUS 0xC0
89#define SX1262_COMMAND_GET_RSSI_LNST 0x15
90#define SX1262_COMMAND_GET_RX_BUFFER_STATUS 0x13
91#define SX1262_COMMAND_GET_PACKET_STATUS 0x14
92#define SX1262_COMMAND_GET_DEVICE_ERRORS 0x17
93#define SX1262_COMMAND_CLEAR_DEVICE_ERRORS 0x07
94#define SX1262_COMMAND_GET_STATS 0x10
95#define SX1262_COMMAND_RESET_STATS 0x00
96
100#define SX1262_REG_HOPPING_ENABLE 0x0385
101#define SX1262_REG_PACKET_LENGTH 0x0386
102#define SX1262_REG_NB_HOPPING_BLOCKS 0x0387
103#define SX1262_REG_NB_SYMBOLS_0 0x0388
104#define SX1262_REG_FREQ_0 0x038A
105#define SX1262_REG_NB_SYMBOLS_15 0x03E2
106#define SX1262_REG_FREQ_15 0x03E4
107#define SX1262_REG_DIOX_OUTPUT_ENABLE 0x0580
108#define SX1262_REG_DIOX_INPUT_ENABLE 0x0583
109#define SX1262_REG_DIOX_PULL_UP_CONTROL 0x0584
110#define SX1262_REG_DIOX_PULL_DOWN_CONTROL 0x0585
111#define SX1262_REG_WHITENING_INIT_VALUE_MSB 0x06B8
112#define SX1262_REG_WHITENING_INIT_VALUE_LSB 0x06B9
113#define SX1262_REG_CRC_INIT_VALUE_MSB 0x06BC
114#define SX1262_REG_CRC_INIT_VALUE_LSB 0x06BD
115#define SX1262_REG_CRC_POLYNOMIAL_VALUE_MSB 0x06BE
116#define SX1262_REG_CRC_POLYNOMIAL_VALUE_LSB 0x06BF
117#define SX1262_REG_SYNC_WORD_0 0x06C0
118#define SX1262_REG_SYNC_WORD_1 0x06C1
119#define SX1262_REG_SYNC_WORD_2 0x06C2
120#define SX1262_REG_SYNC_WORD_3 0x06C3
121#define SX1262_REG_SYNC_WORD_4 0x06C4
122#define SX1262_REG_SYNC_WORD_5 0x06C5
123#define SX1262_REG_SYNC_WORD_6 0x06C6
124#define SX1262_REG_SYNC_WORD_7 0x06C7
125#define SX1262_REG_NODE_ADDRESS 0x06CD
126#define SX1262_REG_BROADCAST_ADDRESS 0x06CE
127#define SX1262_REG_IQ_POLARITY_SETUP 0x0736
128#define SX1262_REG_LORA_SYNC_WORD_MSB 0x0740
129#define SX1262_REG_LORA_SYNC_WORD_LSB 0x0741
130#define SX1262_REG_RANDOM_NUMBER_GEN_0 0x0819
131#define SX1262_REG_RANDOM_NUMBER_GEN_1 0x081A
132#define SX1262_REG_RANDOM_NUMBER_GEN_2 0x081B
133#define SX1262_REG_RANDOM_NUMBER_GEN_3 0x081C
134#define SX1262_REG_TX_MODULATION 0x0889
135#define SX1262_REG_RX_GAIN 0x08AC
136#define SX1262_REG_TX_CLAMP_CONFIG 0x08D8
137#define SX1262_REG_OCP_CONFIGURATION 0x08E7
138#define SX1262_REG_RTC_CONTROL 0x0902
139#define SX1262_REG_XTA_TRIM 0x0911
140#define SX1262_REG_XTB_TRIM 0x0912
141#define SX1262_REG_DIO3_OUTPUT_CONTROL 0x0920
142#define SX1262_REG_EVENT_MASK 0x0944
143
155static uint8_t a_sx1262_spi_read(sx1262_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
156{
157 if (handle->spi_write_read(&reg, 1, buf, len) != 0) /* spi read */
158 {
159 return 1; /* return error */
160 }
161 else
162 {
163 return 0; /* success return 0 */
164 }
165}
166
179static uint8_t a_sx1262_spi_write(sx1262_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
180{
181 if (len > (384 - 1)) /* check the length */
182 {
183 handle->debug_print("sx1262: len is over 383.\n"); /* len is over 383 */
184
185 return 2; /* return error */
186 }
187
188 memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
189 handle->buf[0] = reg; /* set the reg */
190 memcpy(&handle->buf[1], buf, len); /* copy the buffer */
191 if (handle->spi_write_read(handle->buf, len + 1, NULL, 0) != 0) /* spi write */
192 {
193 return 1; /* return error */
194 }
195 else
196 {
197 return 0; /* success return 0 */
198 }
199}
200
213static uint8_t a_sx1262_spi_read_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
214{
215 uint8_t reg_buf[3];
216
217 if (len > (384 - 1)) /* check the length */
218 {
219 handle->debug_print("sx1262: len is over 383.\n"); /* len is over 383 */
220
221 return 2; /* return error */
222 }
223
224 memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
225 reg_buf[0] = SX1262_COMMAND_READ_REGISTER; /* set the command */
226 reg_buf[1] = (reg >> 8) & 0xFF; /* set msb */
227 reg_buf[2] = (reg >> 0) & 0xFF; /* set lsb */
228 if (handle->spi_write_read((uint8_t *)reg_buf, 3, handle->buf, len + 1) != 0) /* spi read */
229 {
230 return 1; /* return error */
231 }
232 else
233 {
234 memcpy(buf, handle->buf + 1, len); /* copy the data */
235
236 return 0; /* success return 0 */
237 }
238}
239
252static uint8_t a_sx1262_spi_write_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
253{
254 if (len > (384 - 3)) /* check the length */
255 {
256 handle->debug_print("sx1262: len is over 381.\n"); /* len is over 381 */
257
258 return 2; /* return error */
259 }
260
261 memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
262 handle->buf[0] = SX1262_COMMAND_WRITE_REGISTER; /* set the command */
263 handle->buf[1] = (reg >> 8) & 0xFF; /* set reg msb */
264 handle->buf[2] = (reg >> 0) & 0xFF; /* set reg lsb */
265 memcpy(&handle->buf[3], buf, len); /* copy the buffer */
266 if (handle->spi_write_read(handle->buf, len + 3, NULL, 0) != 0) /* spi write */
267 {
268 return 1; /* return error */
269 }
270 else
271 {
272 return 0; /* success return 0 */
273 }
274}
275
288static uint8_t a_sx1262_spi_write_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
289{
290 if (len > (384 - 2)) /* check the length */
291 {
292 handle->debug_print("sx1262: len is over 382.\n"); /* len is over 382 */
293
294 return 2; /* return error */
295 }
296
297 memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
298 handle->buf[0] = SX1262_COMMAND_WRITE_BUFFER; /* set the command */
299 handle->buf[1] = offset; /* set reg msb */
300 memcpy(&handle->buf[2], buf, len); /* copy the buffer */
301 if (handle->spi_write_read(handle->buf, len + 2, NULL, 0) != 0) /* spi write */
302 {
303 return 1; /* return error */
304 }
305 else
306 {
307 return 0; /* success return 0 */
308 }
309}
310
323static uint8_t a_sx1262_spi_read_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
324{
325 uint8_t reg_buf[2];
326
327 if (len > (384 - 1)) /* check the length */
328 {
329 handle->debug_print("sx1262: len is over 383.\n"); /* len is over 383 */
330
331 return 2; /* return error */
332 }
333
334 memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
335 reg_buf[0] = SX1262_COMMAND_READ_BUFFER ; /* set the command */
336 reg_buf[1] = offset; /* set msb */
337 if (handle->spi_write_read((uint8_t *)reg_buf, 2, handle->buf, len + 1) != 0) /* spi write */
338 {
339 return 1; /* return error */
340 }
341 else
342 {
343 memcpy(buf, handle->buf + 1, len); /* copy the data */
344
345 return 0; /* success return 0 */
346 }
347}
348
357static uint8_t a_sx1262_check_busy(sx1262_handle_t *handle)
358{
359 uint8_t level;
360 uint8_t timeout;
361
362 timeout = 100; /* set max 100 */
363
364 while (1) /* loop */
365 {
366 if (handle->busy_gpio_read((uint8_t *)&level) != 0) /* read busy gpio */
367 {
368 return 1; /* return error */
369 }
370 else
371 {
372 if (level == 0) /* check level */
373 {
374 return 0; /* success return 0 */
375 }
376 else if ((level == 1) && (timeout != 0)) /* check level and timeout */
377 {
378 handle->delay_ms(10); /* delay 10 ms */
379 timeout--; /* timeout-- */
380 if (timeout != 0) /* check timeout */
381 {
382 continue; /* continue */
383 }
384 else
385 {
386 return 1; /* return error */
387 }
388 }
389 else
390 {
391 return 1; /* return error */
392 }
393 }
394 }
395}
396
408{
409 uint8_t res;
410 uint8_t buf[3];
411 uint16_t status;
412
413 if (handle == NULL) /* check handle */
414 {
415 return 2; /* return error */
416 }
417 if (handle->inited != 1) /* check handle initialization */
418 {
419 return 3; /* return error */
420 }
421
422 memset(buf, 0, sizeof(uint8_t) * 3); /* clear the buffer */
423 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_IRQ_STATUS, (uint8_t *)buf, 3); /* read command */
424 if (res != 0) /* check result */
425 {
426 handle->debug_print("sx1262: get irq status failed.\n"); /* get irq status failed */
427
428 return 1; /* return error */
429 }
430 status = ((uint16_t)buf[1] << 8) | buf[2]; /* set status */
431 res = a_sx1262_spi_write(handle, SX1262_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)&buf[1], 2); /* write command */
432 if (res != 0) /* check result */
433 {
434 handle->debug_print("sx1262: clear irq status failed.\n"); /* clear irq status failed */
435
436 return 1; /* return error */
437 }
438
439 handle->crc_error = 0; /* clear crc error */
440 if ((status & SX1262_IRQ_PREAMBLE_DETECTED) != 0) /* if preamble detected */
441 {
442 if (handle->receive_callback != NULL) /* if receive callback */
443 {
444 handle->receive_callback(SX1262_IRQ_PREAMBLE_DETECTED, NULL, 0); /* run callback */
445 }
446 }
447 if ((status & SX1262_IRQ_SYNC_WORD_VALID) != 0) /* if valid sync word detected */
448 {
449 if (handle->receive_callback != NULL) /* if receive callback */
450 {
451 handle->receive_callback(SX1262_IRQ_SYNC_WORD_VALID, NULL, 0); /* run callback */
452 }
453 }
454 if ((status & SX1262_IRQ_HEADER_VALID) != 0) /* if valid header */
455 {
456 if (handle->receive_callback != NULL) /* if receive callback */
457 {
458 handle->receive_callback(SX1262_IRQ_HEADER_VALID, NULL, 0); /* run callback */
459 }
460 }
461 if ((status & SX1262_IRQ_HEADER_ERR) != 0) /* if header error */
462 {
463 if (handle->receive_callback != NULL) /* if receive callback */
464 {
465 handle->receive_callback(SX1262_IRQ_HEADER_ERR, NULL, 0); /* run callback */
466 }
467 }
468 if ((status & SX1262_IRQ_CRC_ERR) != 0) /* if crc error */
469 {
470 if (handle->receive_callback != NULL) /* if receive callback */
471 {
472 handle->receive_callback(SX1262_IRQ_CRC_ERR, NULL, 0); /* run callback */
473 }
474 handle->crc_error = 1; /* set crc error */
475 }
476 if ((status & SX1262_IRQ_CAD_DONE) != 0) /* if cad done */
477 {
478 if (handle->receive_callback != NULL) /* if receive callback */
479 {
480 handle->receive_callback(SX1262_IRQ_CAD_DONE, NULL, 0); /* run callback */
481 }
482 handle->cad_done = 1; /* set cad done */
483 }
484 if ((status & SX1262_IRQ_CAD_DETECTED) != 0) /* if cad detected */
485 {
486 if (handle->receive_callback != NULL) /* if receive callback */
487 {
488 handle->receive_callback(SX1262_IRQ_CAD_DETECTED, NULL, 0); /* run callback */
489 }
490 handle->cad_detected = 1; /* set detected */
491 }
492 if ((status & SX1262_IRQ_TIMEOUT) != 0) /* if timeout */
493 {
494 uint8_t control;
495 uint8_t mask;
496
497 control = 0x00;
498 res = a_sx1262_spi_write_register(handle, SX1262_REG_DIO3_OUTPUT_CONTROL, (uint8_t *)&control, 1); /* write register */
499 if (res != 0) /* check result */
500 {
501 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
502
503 return 1; /* return error */
504 }
505
506 /* read mask */
507 res = a_sx1262_spi_read_register(handle, SX1262_REG_EVENT_MASK, (uint8_t *)&mask, 1); /* read register */
508 if (res != 0) /* check result */
509 {
510 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
511
512 return 1; /* return error */
513 }
514 mask |= 0x02; /* set mask */
515 res = a_sx1262_spi_write_register(handle, SX1262_REG_EVENT_MASK, (uint8_t *)&mask, 1); /* write register */
516 if (res != 0) /* check result */
517 {
518 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
519
520 return 1; /* return error */
521 }
522
523 if (handle->receive_callback != NULL) /* if receive callback */
524 {
525 handle->receive_callback(SX1262_IRQ_TIMEOUT, NULL, 0); /* run callback */
526 }
527 handle->timeout = 1; /* flag timeout */
528 }
529 if ((status & SX1262_IRQ_TX_DONE) != 0) /* if tx done */
530 {
531 if (handle->receive_callback != NULL) /* if receive callback */
532 {
533 handle->receive_callback(SX1262_IRQ_TX_DONE, NULL, 0); /* run callback */
534 }
535 handle->tx_done = 1; /* flag tx done */
536 }
537 if ((status & SX1262_IRQ_RX_DONE) != 0) /* if rx done */
538 {
539 uint8_t payload_length_rx;
540 uint8_t rx_start_buffer_pointer;
541
542 memset(buf, 0, sizeof(uint8_t) * 3); /* clear the buffer */
543 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_RX_BUFFER_STATUS, (uint8_t *)buf, 3); /* read command */
544 if (res != 0) /* check result */
545 {
546 handle->debug_print("sx1262: get rx buffer status failed.\n"); /* get rx buffer status failed */
547
548 return 1; /* return error */
549 }
550 payload_length_rx = buf[1]; /* set status */
551 rx_start_buffer_pointer = buf[2]; /* set status */
552
553 res = a_sx1262_spi_read_buffer(handle, rx_start_buffer_pointer, handle->receive_buf,
554 payload_length_rx); /* read buffer */
555 if (res != 0) /* check result */
556 {
557 handle->debug_print("sx1262: read buffer failed.\n"); /* read buffer failed */
558
559 return 1; /* return error */
560 }
561 if (handle->receive_callback != NULL) /* if receive callback */
562 {
563 if (handle->crc_error == 0) /* check crc error */
564 {
565 handle->receive_callback(SX1262_IRQ_RX_DONE, handle->receive_buf, payload_length_rx); /* run callback */
566 }
567 else
568 {
569 handle->receive_callback(SX1262_IRQ_RX_DONE, NULL, 0); /* run callback */
570 }
571 }
572 }
573
574 return 0; /* success return 0 */
575}
576
591{
592 uint8_t buf[1];
593 uint8_t prev;
594
595 if (handle == NULL) /* check handle */
596 {
597 return 2; /* return error */
598 }
599 if (handle->debug_print == NULL) /* check debug_print */
600 {
601 return 3; /* return error */
602 }
603 if (handle->spi_init == NULL) /* check spi_init */
604 {
605 handle->debug_print("sx1262: spi_init is null.\n"); /* spi_init is null */
606
607 return 3; /* return error */
608 }
609 if (handle->spi_deinit == NULL) /* check spi_deinit */
610 {
611 handle->debug_print("sx1262: spi_deinit is null.\n"); /* spi_deinit is null */
612
613 return 3; /* return error */
614 }
615 if (handle->spi_write_read == NULL) /* check spi_write_read */
616 {
617 handle->debug_print("sx1262: spi_write_read is null.\n"); /* spi_write_read is null */
618
619 return 3; /* return error */
620 }
621 if (handle->reset_gpio_init == NULL) /* check reset_gpio_init */
622 {
623 handle->debug_print("sx1262: reset_gpio_init is null.\n"); /* reset_gpio_init is null */
624
625 return 3; /* return error */
626 }
627 if (handle->reset_gpio_deinit == NULL) /* check reset_gpio_deinit */
628 {
629 handle->debug_print("sx1262: reset_gpio_deinit is null.\n"); /* reset_gpio_deinit is null */
630
631 return 3; /* return error */
632 }
633 if (handle->reset_gpio_write == NULL) /* check reset_gpio_write */
634 {
635 handle->debug_print("sx1262: reset_gpio_write is null.\n"); /* reset_gpio_write is null */
636
637 return 3; /* return error */
638 }
639 if (handle->busy_gpio_init == NULL) /* check busy_gpio_init */
640 {
641 handle->debug_print("sx1262: busy_gpio_init is null.\n"); /* busy_gpio_init is null */
642
643 return 3; /* return error */
644 }
645 if (handle->busy_gpio_deinit == NULL) /* check busy_gpio_deinit */
646 {
647 handle->debug_print("sx1262: busy_gpio_deinit is null.\n"); /* busy_gpio_deinit is null */
648
649 return 3; /* return error */
650 }
651 if (handle->busy_gpio_read == NULL) /* check busy_gpio_read */
652 {
653 handle->debug_print("sx1262: busy_gpio_read is null.\n"); /* busy_gpio_read is null */
654
655 return 3; /* return error */
656 }
657 if (handle->delay_ms == NULL) /* check delay_ms */
658 {
659 handle->debug_print("sx1262: delay_ms is null.\n"); /* delay_ms is null */
660
661 return 3; /* return error */
662 }
663 if (handle->receive_callback == NULL) /* check receive_callback */
664 {
665 handle->debug_print("sx1262: receive_callback is null.\n"); /* receive_callback is null */
666
667 return 3; /* return error */
668 }
669
670 if (handle->spi_init() != 0) /* spi initialization */
671 {
672 handle->debug_print("sx1262: spi initialization failed.\n"); /* spi initialization failed */
673
674 return 1; /* return error */
675 }
676 if (handle->reset_gpio_init() != 0) /* reset gpio initialization */
677 {
678 handle->debug_print("sx1262: reset gpio initialization failed.\n"); /* reset gpio initialization failed */
679 (void)handle->spi_deinit(); /* spi deinit */
680
681 return 4; /* return error */
682 }
683 if (handle->busy_gpio_init() != 0) /* busy gpio initialization */
684 {
685 handle->debug_print("sx1262: busy gpio initialization failed.\n"); /* busy gpio initialization failed */
686 (void)handle->spi_deinit(); /* spi deinit */
687 (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
688
689 return 5; /* return error */
690 }
691
692 if (handle->reset_gpio_write(1) != 0) /* set high */
693 {
694 handle->debug_print("sx1262: reset chip failed.\n"); /* reset chip failed */
695 (void)handle->spi_deinit(); /* spi deinit */
696 (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
697 (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
698
699 return 6; /* return error */
700 }
701 handle->delay_ms(5); /* delay 5 ms */
702 if (handle->reset_gpio_write(0) != 0) /* set low */
703 {
704 handle->debug_print("sx1262: reset chip failed.\n"); /* reset chip failed */
705 (void)handle->spi_deinit(); /* spi deinit */
706 (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
707 (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
708
709 return 6; /* return error */
710 }
711 handle->delay_ms(10); /* delay 10 ms */
712 if (handle->reset_gpio_write(1) != 0) /* set high */
713 {
714 handle->debug_print("sx1262: reset chip failed.\n"); /* reset chip failed */
715 (void)handle->spi_deinit(); /* spi deinit */
716 (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
717 (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
718
719 return 6; /* return error */
720 }
721 handle->delay_ms(5); /* delay 5 ms */
722
723 if (a_sx1262_spi_read(handle, SX1262_COMMAND_GET_STATUS, (uint8_t *)buf, 1) != 0) /* read command */
724 {
725 handle->debug_print("sx1262: get status failed.\n"); /* get status failed */
726 (void)handle->spi_deinit(); /* spi deinit */
727 (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
728 (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
729
730 return 6; /* return error */
731 }
732 prev = 0x00;
733 if (a_sx1262_spi_write(handle, SX1262_COMMAND_SET_STANDBY, (uint8_t *)&prev, 1) != 0) /* write command */
734 {
735 handle->debug_print("sx1262: set standby failed.\n"); /* set standby failed */
736 (void)handle->spi_deinit(); /* spi deinit */
737 (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
738 (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
739
740 return 6; /* return error */
741 }
742 handle->inited = 1; /* flag finish initialization */
743
744 return 0; /* success return 0 */
745}
746
762{
763 uint8_t res, prev;
764
765 if (handle == NULL) /* check handle */
766 {
767 return 2; /* return error */
768 }
769 if (handle->inited != 1) /* check handle initialization */
770 {
771 return 3; /* return error */
772 }
773
774 res = a_sx1262_check_busy(handle); /* check busy */
775 if (res != 0) /* check result */
776 {
777 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
778
779 return 4; /* return error */
780 }
781
782 prev = 0x00; /* set power down */
783 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_SLEEP, (uint8_t *)&prev, 1); /* write command */
784 if (res != 0) /* check result */
785 {
786 handle->debug_print("sx1262: power down failed.\n"); /* power down failed */
787
788 return 5; /* return error */
789 }
790
791 res = handle->busy_gpio_deinit(); /* busy gpio deinit */
792 if (res != 0) /* check result */
793 {
794 handle->debug_print("sx1262: busy gpio deinit failed.\n"); /* busy gpio deinit failed */
795
796 return 6; /* return error */
797 }
798 res = handle->reset_gpio_deinit(); /* reset gpio deinit */
799 if (res != 0) /* check result */
800 {
801 handle->debug_print("sx1262: reset gpio deinit failed.\n"); /* reset gpio deinit failed */
802
803 return 7; /* return error */
804 }
805 res = handle->spi_deinit(); /* spi deinit */
806 if (res != 0) /* check result */
807 {
808 handle->debug_print("sx1262: spi deinit failed.\n"); /* spi deinit failed */
809
810 return 1; /* return error */
811 }
812
813 return 0; /* success return 0 */
814}
815
828uint8_t sx1262_single_receive(sx1262_handle_t *handle, double us)
829{
830 uint8_t res;
831 uint8_t buf[3];
832 uint16_t clear_irq_param;
833 uint32_t timeout;
834
835 if (handle == NULL) /* check handle */
836 {
837 return 2; /* return error */
838 }
839 if (handle->inited != 1) /* check handle initialization */
840 {
841 return 3; /* return error */
842 }
843
844 res = a_sx1262_check_busy(handle); /* check busy */
845 if (res != 0) /* check result */
846 {
847 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
848
849 return 4; /* return error */
850 }
851
852 clear_irq_param = 0x03FF; /* set mask */
853 buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
854 buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
855 res = a_sx1262_spi_write(handle, SX1262_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
856 if (res != 0) /* check result */
857 {
858 handle->debug_print("sx1262: clear irq status failed.\n"); /* clear irq status failed */
859
860 return 1; /* return error */
861 }
862
863 res = a_sx1262_check_busy(handle); /* check busy */
864 if (res != 0) /* check result */
865 {
866 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
867
868 return 4; /* return error */
869 }
870
871 timeout = (uint32_t)(us / 15.625); /* convert real data to register data */
872 buf[0] = (timeout >> 16) & 0xFF; /* bit 23 : 16 */
873 buf[1] = (timeout >> 8) & 0xFF; /* bit 15 : 8 */
874 buf[2] = (timeout >> 0) & 0xFF; /* bit 7 : 0 */
875 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_RX, (uint8_t *)buf, 3); /* write command */
876 if (res != 0) /* check result */
877 {
878 handle->debug_print("sx1262: set rx failed.\n"); /* set rx failed */
879
880 return 1; /* return error */
881 }
882
883 return 0; /* success return 0 */
884}
885
898{
899 uint8_t res;
900 uint16_t clear_irq_param;
901 uint8_t buf[3];
902
903 if (handle == NULL) /* check handle */
904 {
905 return 2; /* return error */
906 }
907 if (handle->inited != 1) /* check handle initialization */
908 {
909 return 3; /* return error */
910 }
911
912 res = a_sx1262_check_busy(handle); /* check busy */
913 if (res != 0) /* check result */
914 {
915 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
916
917 return 4; /* return error */
918 }
919
920 clear_irq_param = 0x03FF; /* set mask */
921 buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
922 buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
923 res = a_sx1262_spi_write(handle, SX1262_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
924 if (res != 0) /* check result */
925 {
926 handle->debug_print("sx1262: clear irq status failed.\n"); /* clear irq status failed */
927
928 return 1; /* return error */
929 }
930
931 res = a_sx1262_check_busy(handle); /* check busy */
932 if (res != 0) /* check result */
933 {
934 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
935
936 return 4; /* return error */
937 }
938
939 buf[0] = 0xFF; /* bit 23 : 16 */
940 buf[1] = 0xFF; /* bit 15 : 8 */
941 buf[2] = 0xFF; /* bit 7 : 0 */
942 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_RX, (uint8_t *)buf, 3); /* write command */
943 if (res != 0) /* check result */
944 {
945 handle->debug_print("sx1262: set rx failed.\n"); /* set rx failed */
946
947 return 1; /* return error */
948 }
949
950 return 0; /* success return 0 */
951}
952
967{
968 uint8_t res;
969 uint16_t clear_irq_param;
970 uint8_t buf[2];
971 uint16_t timeout;
972
973 if (handle == NULL) /* check handle */
974 {
975 return 2; /* return error */
976 }
977 if (handle->inited != 1) /* check handle initialization */
978 {
979 return 3; /* return error */
980 }
981
982 res = a_sx1262_check_busy(handle); /* check busy */
983 if (res != 0) /* check result */
984 {
985 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
986
987 return 4; /* return error */
988 }
989
990 clear_irq_param = 0x03FF; /* set mask */
991 buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
992 buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
993 res = a_sx1262_spi_write(handle, SX1262_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
994 if (res != 0) /* check result */
995 {
996 handle->debug_print("sx1262: clear irq status failed.\n"); /* clear irq status failed */
997
998 return 1; /* return error */
999 }
1000
1001 res = a_sx1262_check_busy(handle); /* check busy */
1002 if (res != 0) /* check result */
1003 {
1004 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1005
1006 return 4; /* return error */
1007 }
1008
1009 handle->cad_done = 0; /* clear cad done */
1010 handle->cad_detected = 0; /* clear cad done */
1011 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_CAD, NULL, 0); /* write command */
1012 if (res != 0) /* check result */
1013 {
1014 handle->debug_print("sx1262: set cad failed.\n"); /* set cad failed */
1015
1016 return 1; /* return error */
1017 }
1018
1019 timeout = 10000; /* set timeout */
1020 while ((timeout != 0) && (handle->cad_done == 0)) /* wait */
1021 {
1022 handle->delay_ms(1); /* delay 1 ms */
1023 timeout--; /* timeout-- */
1024 }
1025 if (timeout == 0) /* check timeout */
1026 {
1027 handle->debug_print("sx1262: cad timeout.\n"); /* cad timeout */
1028
1029 return 5; /* return error */
1030 }
1031 if (handle->cad_detected == 1) /* set cad */
1032 {
1033 *enable = SX1262_BOOL_TRUE; /* enable */
1034 }
1035 else
1036 {
1037 *enable = SX1262_BOOL_FALSE; /* disable */
1038 }
1039
1040 return 0; /* success return 0 */
1041}
1042
1054{
1055 if (handle == NULL) /* check handle */
1056 {
1057 return 2; /* return error */
1058 }
1059 if (handle->inited != 1) /* check handle initialization */
1060 {
1061 return 3; /* return error */
1062 }
1063
1064 *enable = (sx1262_bool_t)(handle->crc_error); /* check error */
1065
1066 return 0; /* success return 0 */
1067}
1068
1092 uint16_t preamble_length, sx1262_lora_header_t header_type,
1093 sx1262_lora_crc_type_t crc_type, sx1262_bool_t invert_iq_enable,
1094 uint8_t *buf, uint16_t len, uint32_t us)
1095{
1096 uint8_t res;
1097 uint8_t prev;
1098 uint8_t buffer[6];
1099 uint16_t clear_irq_param;
1100 uint32_t ms;
1101 uint32_t reg;
1102
1103 if (handle == NULL) /* check handle */
1104 {
1105 return 2; /* return error */
1106 }
1107 if (handle->inited != 1) /* check handle initialization */
1108 {
1109 return 3; /* return error */
1110 }
1111
1112 res = a_sx1262_check_busy(handle); /* check busy */
1113 if (res != 0) /* check result */
1114 {
1115 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1116
1117 return 4; /* return error */
1118 }
1119
1120 clear_irq_param = 0x03FF; /* set mask */
1121 buffer[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
1122 buffer[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
1123 res = a_sx1262_spi_write(handle, SX1262_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buffer, 2); /* write command */
1124 if (res != 0) /* check result */
1125 {
1126 handle->debug_print("sx1262: clear irq status failed.\n"); /* clear irq status failed */
1127
1128 return 1; /* return error */
1129 }
1130
1131 res = a_sx1262_check_busy(handle); /* check busy */
1132 if (res != 0) /* check result */
1133 {
1134 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1135
1136 return 4; /* return error */
1137 }
1138
1139 prev = standby_src; /* set param */
1140 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_STANDBY, (uint8_t *)&prev, 1); /* write command */
1141 if (res != 0) /* check result */
1142 {
1143 handle->debug_print("sx1262: set standby failed.\n"); /* set standby failed */
1144
1145 return 1; /* return error */
1146 }
1147
1148 res = a_sx1262_check_busy(handle); /* check busy */
1149 if (res != 0) /* check result */
1150 {
1151 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1152
1153 return 4; /* return error */
1154 }
1155
1156 buffer[0] = (preamble_length >> 8) & 0xFF; /* set param */
1157 buffer[1] = (preamble_length >> 0) & 0xFF; /* set param */
1158 buffer[2] = header_type; /* set param */
1159 buffer[3] = (uint8_t)len; /* set param */
1160 buffer[4] = crc_type; /* set param */
1161 buffer[5] = invert_iq_enable; /* set param */
1162 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_PACKET_PARAMS, (uint8_t *)buffer, 6); /* write command */
1163 if (res != 0) /* check result */
1164 {
1165 handle->debug_print("sx1262: set lora modulation params failed.\n"); /* set lora modulation params failed */
1166
1167 return 1; /* return error */
1168 }
1169
1170 if (invert_iq_enable == SX1262_BOOL_FALSE) /* not invert iq */
1171 {
1172 uint8_t setup;
1173
1174 res = a_sx1262_check_busy(handle); /* check busy */
1175 if (res != 0) /* check result */
1176 {
1177 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1178
1179 return 4; /* return error */
1180 }
1181
1182 res = a_sx1262_spi_read_register(handle, SX1262_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1183 if (res != 0) /* check result */
1184 {
1185 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
1186
1187 return 1; /* return error */
1188 }
1189
1190 setup |= (1 << 2); /* set bit 2 */
1191 res = a_sx1262_spi_write_register(handle, SX1262_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1192 if (res != 0) /* check result */
1193 {
1194 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
1195
1196 return 1; /* return error */
1197 }
1198 }
1199 else
1200 {
1201 uint8_t setup;
1202
1203 res = a_sx1262_check_busy(handle); /* check busy */
1204 if (res != 0) /* check result */
1205 {
1206 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1207
1208 return 4; /* return error */
1209 }
1210
1211 res = a_sx1262_spi_read_register(handle, SX1262_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1212 if (res != 0) /* check result */
1213 {
1214 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
1215
1216 return 1; /* return error */
1217 }
1218
1219 setup &= ~(1 << 2); /* clear bit 2 */
1220 res = a_sx1262_spi_write_register(handle, SX1262_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1221 if (res != 0) /* check result */
1222 {
1223 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
1224
1225 return 1; /* return error */
1226 }
1227 }
1228
1229 res = a_sx1262_check_busy(handle); /* check busy */
1230 if (res != 0) /* check result */
1231 {
1232 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1233
1234 return 4; /* return error */
1235 }
1236
1237 if (a_sx1262_spi_write_buffer(handle, 0x00, buf, len) != 0) /* write buffer */
1238 {
1239 handle->debug_print("sx1262: write buffer failed.\n"); /* write buffer failed */
1240
1241 return 1; /* return error */
1242 }
1243
1244 res = a_sx1262_check_busy(handle); /* check busy */
1245 if (res != 0) /* check result */
1246 {
1247 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1248
1249 return 4; /* return error */
1250 }
1251
1252 reg = (uint32_t)(us / 15.625); /* convert the timeout */
1253 buffer[0] = (reg >> 16) & 0xFF; /* bit 23 : 16 */
1254 buffer[1] = (reg >> 8) & 0xFF; /* bit 15 : 8 */
1255 buffer[2] = (reg >> 0) & 0xFF; /* bit 7 : 0 */
1256 handle->tx_done = 0; /* flag 0 */
1257 handle->timeout = 0; /* flag 0 */
1258 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_TX, (uint8_t *)buffer, 3); /* write command */
1259 if (res != 0) /* check result */
1260 {
1261 handle->debug_print("sx1262: set tx failed.\n"); /* set tx failed */
1262
1263 return 1; /* return error */
1264 }
1265 ms = us / 1000 + 10000; /* set timeout */
1266 while ((ms != 0) && (handle->tx_done == 0) && (handle->timeout == 0)) /* check timeout */
1267 {
1268 handle->delay_ms(1); /* delay 1 ms */
1269 ms--; /* ms-- */
1270 }
1271 if ((ms != 0) && (handle->tx_done == 1)) /* check the result */
1272 {
1273 return 0; /* success return 0 */
1274 }
1275 else if ((ms == 0) && (handle->tx_done == 0)) /* check the result */
1276 {
1277 handle->debug_print("sx1262: send timeout.\n"); /* send timeout */
1278
1279 return 5; /* return error */
1280 }
1281 else if (handle->timeout == 1) /* check the result */
1282 {
1283 handle->debug_print("sx1262: irq timeout.\n"); /* irq timeout */
1284
1285 return 6; /* return error */
1286 }
1287 else
1288 {
1289 handle->debug_print("sx1262: unknown result.\n"); /* unknown result */
1290
1291 return 7; /* return error */
1292 }
1293}
1294
1309uint8_t sx1262_write_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
1310{
1311 uint8_t res;
1312
1313 if (handle == NULL) /* check handle */
1314 {
1315 return 2; /* return error */
1316 }
1317 if (handle->inited != 1) /* check handle initialization */
1318 {
1319 return 3; /* return error */
1320 }
1321
1322 res = a_sx1262_check_busy(handle); /* check busy */
1323 if (res != 0) /* check result */
1324 {
1325 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1326
1327 return 4; /* return error */
1328 }
1329
1330 if (a_sx1262_spi_write_register(handle, reg, buf, len) != 0) /* write register */
1331 {
1332 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
1333
1334 return 1; /* return error */
1335 }
1336
1337 return 0; /* success return 0 */
1338}
1339
1354uint8_t sx1262_read_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
1355{
1356 uint8_t res;
1357
1358 if (handle == NULL) /* check handle */
1359 {
1360 return 2; /* return error */
1361 }
1362 if (handle->inited != 1) /* check handle initialization */
1363 {
1364 return 3; /* return error */
1365 }
1366
1367 res = a_sx1262_check_busy(handle); /* check busy */
1368 if (res != 0) /* check result */
1369 {
1370 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1371
1372 return 4; /* return error */
1373 }
1374
1375 if (a_sx1262_spi_read_register(handle, reg, buf, len) != 0) /* read register */
1376 {
1377 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
1378
1379 return 1; /* return error */
1380 }
1381
1382 return 0; /* success return 0 */
1383}
1384
1399uint8_t sx1262_write_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
1400{
1401 uint8_t res;
1402
1403 if (handle == NULL) /* check handle */
1404 {
1405 return 2; /* return error */
1406 }
1407 if (handle->inited != 1) /* check handle initialization */
1408 {
1409 return 3; /* return error */
1410 }
1411
1412 res = a_sx1262_check_busy(handle); /* check busy */
1413 if (res != 0) /* check result */
1414 {
1415 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1416
1417 return 4; /* return error */
1418 }
1419
1420 if (a_sx1262_spi_write_buffer(handle, offset, buf, len) != 0) /* write buffer */
1421 {
1422 handle->debug_print("sx1262: write buffer failed.\n"); /* write buffer failed */
1423
1424 return 1; /* return error */
1425 }
1426
1427 return 0; /* success return 0 */
1428}
1429
1444uint8_t sx1262_read_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
1445{
1446 uint8_t res;
1447
1448 if (handle == NULL) /* check handle */
1449 {
1450 return 2; /* return error */
1451 }
1452 if (handle->inited != 1) /* check handle initialization */
1453 {
1454 return 3; /* return error */
1455 }
1456
1457 res = a_sx1262_check_busy(handle); /* check busy */
1458 if (res != 0) /* check result */
1459 {
1460 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1461
1462 return 4; /* return error */
1463 }
1464
1465 if (a_sx1262_spi_read_buffer(handle, offset, buf, len) != 0) /* read buffer */
1466 {
1467 handle->debug_print("sx1262: read buffer failed.\n"); /* read buffer failed */
1468
1469 return 1; /* return error */
1470 }
1471
1472 return 0; /* success return 0 */
1473}
1474
1488uint8_t sx1262_set_sleep(sx1262_handle_t *handle, sx1262_start_mode_t mode, sx1262_bool_t rtc_wake_up_enable)
1489{
1490 uint8_t res;
1491 uint8_t prev;
1492
1493 if (handle == NULL) /* check handle */
1494 {
1495 return 2; /* return error */
1496 }
1497 if (handle->inited != 1) /* check handle initialization */
1498 {
1499 return 3; /* return error */
1500 }
1501
1502 res = a_sx1262_check_busy(handle); /* check busy */
1503 if (res != 0) /* check result */
1504 {
1505 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1506
1507 return 4; /* return error */
1508 }
1509
1510 prev = (uint8_t)((mode << 2) | (rtc_wake_up_enable << 0)); /* set param */
1511 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_SLEEP, (uint8_t *)&prev, 1); /* write command */
1512 if (res != 0) /* check result */
1513 {
1514 handle->debug_print("sx1262: set sleep failed.\n"); /* set sleep failed */
1515
1516 return 1; /* return error */
1517 }
1518
1519 return 0; /* success return 0 */
1520}
1521
1535{
1536 uint8_t res;
1537 uint8_t prev;
1538
1539 if (handle == NULL) /* check handle */
1540 {
1541 return 2; /* return error */
1542 }
1543 if (handle->inited != 1) /* check handle initialization */
1544 {
1545 return 3; /* return error */
1546 }
1547
1548 res = a_sx1262_check_busy(handle); /* check busy */
1549 if (res != 0) /* check result */
1550 {
1551 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1552
1553 return 4; /* return error */
1554 }
1555
1556 prev = src; /* set param */
1557 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_STANDBY, (uint8_t *)&prev, 1); /* write command */
1558 if (res != 0) /* check result */
1559 {
1560 handle->debug_print("sx1262: set standby failed.\n"); /* set standby failed */
1561
1562 return 1; /* return error */
1563 }
1564
1565 return 0; /* success return 0 */
1566}
1567
1580{
1581 uint8_t res;
1582
1583 if (handle == NULL) /* check handle */
1584 {
1585 return 2; /* return error */
1586 }
1587 if (handle->inited != 1) /* check handle initialization */
1588 {
1589 return 3; /* return error */
1590 }
1591
1592 res = a_sx1262_check_busy(handle); /* check busy */
1593 if (res != 0) /* check result */
1594 {
1595 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1596
1597 return 4; /* return error */
1598 }
1599
1600 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_FS, NULL, 0); /* write command */
1601 if (res != 0) /* check result */
1602 {
1603 handle->debug_print("sx1262: set fs failed.\n"); /* set fs failed */
1604
1605 return 1; /* return error */
1606 }
1607
1608 return 0; /* success return 0 */
1609}
1610
1623uint8_t sx1262_set_tx(sx1262_handle_t *handle, uint32_t timeout)
1624{
1625 uint8_t res;
1626 uint8_t buf[3];
1627
1628 if (handle == NULL) /* check handle */
1629 {
1630 return 2; /* return error */
1631 }
1632 if (handle->inited != 1) /* check handle initialization */
1633 {
1634 return 3; /* return error */
1635 }
1636
1637 res = a_sx1262_check_busy(handle); /* check busy */
1638 if (res != 0) /* check result */
1639 {
1640 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1641
1642 return 4; /* return error */
1643 }
1644
1645 buf[0] = (timeout >> 16) & 0xFF; /* bit 23 : 16 */
1646 buf[1] = (timeout >> 8) & 0xFF; /* bit 15 : 8 */
1647 buf[2] = (timeout >> 0) & 0xFF; /* bit 7 : 0 */
1648 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_TX, (uint8_t *)buf, 3); /* write command */
1649 if (res != 0) /* check result */
1650 {
1651 handle->debug_print("sx1262: set tx failed.\n"); /* set tx failed */
1652
1653 return 1; /* return error */
1654 }
1655
1656 return 0; /* success return 0 */
1657}
1658
1672uint8_t sx1262_set_rx(sx1262_handle_t *handle, uint32_t timeout)
1673{
1674 uint8_t res;
1675 uint8_t buf[3];
1676
1677 if (handle == NULL) /* check handle */
1678 {
1679 return 2; /* return error */
1680 }
1681 if (handle->inited != 1) /* check handle initialization */
1682 {
1683 return 3; /* return error */
1684 }
1685
1686 res = a_sx1262_check_busy(handle); /* check busy */
1687 if (res != 0) /* check result */
1688 {
1689 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1690
1691 return 4; /* return error */
1692 }
1693
1694 buf[0] = (timeout >> 16) & 0xFF; /* bit 23 : 16 */
1695 buf[1] = (timeout >> 8) & 0xFF; /* bit 15 : 8 */
1696 buf[2] = (timeout >> 0) & 0xFF; /* bit 7 : 0 */
1697 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_RX, (uint8_t *)buf, 3); /* write command */
1698 if (res != 0) /* check result */
1699 {
1700 handle->debug_print("sx1262: set rx failed.\n"); /* set rx failed */
1701
1702 return 1; /* return error */
1703 }
1704
1705 return 0; /* success return 0 */
1706}
1707
1719uint8_t sx1262_timeout_convert_to_register(sx1262_handle_t *handle, double us, uint32_t *reg)
1720{
1721 if (handle == NULL) /* check handle */
1722 {
1723 return 2; /* return error */
1724 }
1725 if (handle->inited != 1) /* check handle initialization */
1726 {
1727 return 3; /* return error */
1728 }
1729
1730 *reg = (uint32_t)(us / 15.625); /* convert real data to register data */
1731
1732 return 0; /* success return 0 */
1733}
1734
1746uint8_t sx1262_timeout_convert_to_data(sx1262_handle_t *handle, uint32_t reg, double *us)
1747{
1748 if (handle == NULL) /* check handle */
1749 {
1750 return 2; /* return error */
1751 }
1752 if (handle->inited != 1) /* check handle initialization */
1753 {
1754 return 3; /* return error */
1755 }
1756
1757 *us = (double)(reg) * 15.625; /* convert raw data to real data */
1758
1759 return 0; /* success return 0 */
1760}
1761
1775{
1776 uint8_t res;
1777 uint8_t prev;
1778
1779 if (handle == NULL) /* check handle */
1780 {
1781 return 2; /* return error */
1782 }
1783 if (handle->inited != 1) /* check handle initialization */
1784 {
1785 return 3; /* return error */
1786 }
1787
1788 res = a_sx1262_check_busy(handle); /* check busy */
1789 if (res != 0) /* check result */
1790 {
1791 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1792
1793 return 4; /* return error */
1794 }
1795
1796 prev = enable; /* set param */
1797 res = a_sx1262_spi_write(handle, SX1262_COMMAND_STOP_TIMER_ON_PREAMBLE, (uint8_t *)&prev, 1); /* write command */
1798 if (res != 0) /* check result */
1799 {
1800 handle->debug_print("sx1262: set stop timer on preamble failed.\n"); /* set stop timer on preamble failed */
1801
1802 return 1; /* return error */
1803 }
1804
1805 return 0; /* success return 0 */
1806}
1807
1821uint8_t sx1262_set_rx_duty_cycle(sx1262_handle_t *handle, uint32_t rx_period, uint32_t sleep_period)
1822{
1823 uint8_t res;
1824 uint8_t buf[6];
1825
1826 if (handle == NULL) /* check handle */
1827 {
1828 return 2; /* return error */
1829 }
1830 if (handle->inited != 1) /* check handle initialization */
1831 {
1832 return 3; /* return error */
1833 }
1834
1835 res = a_sx1262_check_busy(handle); /* check busy */
1836 if (res != 0) /* check result */
1837 {
1838 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1839
1840 return 4; /* return error */
1841 }
1842
1843 buf[0] = (rx_period >> 16) & 0xFF; /* bit 23 : 16 */
1844 buf[1] = (rx_period >> 8) & 0xFF; /* bit 15 : 8 */
1845 buf[2] = (rx_period >> 0) & 0xFF; /* bit 7 : 0 */
1846 buf[3] = (sleep_period >> 16) & 0xFF; /* bit 23 : 16 */
1847 buf[4] = (sleep_period >> 8) & 0xFF; /* bit 15 : 8 */
1848 buf[5] = (sleep_period >> 0) & 0xFF; /* bit 7 : 0 */
1849 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_RX_DUTY_CYCLE, (uint8_t *)buf, 6); /* write command */
1850 if (res != 0) /* check result */
1851 {
1852 handle->debug_print("sx1262: set rx duty cycle failed.\n"); /* set rx duty cycle failed */
1853
1854 return 1; /* return error */
1855 }
1856
1857 return 0; /* success return 0 */
1858}
1859
1872{
1873 uint8_t res;
1874
1875 if (handle == NULL) /* check handle */
1876 {
1877 return 2; /* return error */
1878 }
1879 if (handle->inited != 1) /* check handle initialization */
1880 {
1881 return 3; /* return error */
1882 }
1883
1884 res = a_sx1262_check_busy(handle); /* check busy */
1885 if (res != 0) /* check result */
1886 {
1887 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1888
1889 return 4; /* return error */
1890 }
1891
1892 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_CAD, NULL, 0); /* write command */
1893 if (res != 0) /* check result */
1894 {
1895 handle->debug_print("sx1262: set cad failed.\n"); /* set cad failed */
1896
1897 return 1; /* return error */
1898 }
1899
1900 return 0; /* success return 0 */
1901}
1902
1915{
1916 uint8_t res;
1917
1918 if (handle == NULL) /* check handle */
1919 {
1920 return 2; /* return error */
1921 }
1922 if (handle->inited != 1) /* check handle initialization */
1923 {
1924 return 3; /* return error */
1925 }
1926
1927 res = a_sx1262_check_busy(handle); /* check busy */
1928 if (res != 0) /* check result */
1929 {
1930 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1931
1932 return 4; /* return error */
1933 }
1934
1935 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_TX_CONTINUOUS_WAVE, NULL, 0); /* write command */
1936 if (res != 0) /* check result */
1937 {
1938 handle->debug_print("sx1262: set tx continuous wave failed.\n"); /* set tx continuous wave failed */
1939
1940 return 1; /* return error */
1941 }
1942
1943 return 0; /* success return 0 */
1944}
1945
1958{
1959 uint8_t res;
1960
1961 if (handle == NULL) /* check handle */
1962 {
1963 return 2; /* return error */
1964 }
1965 if (handle->inited != 1) /* check handle initialization */
1966 {
1967 return 3; /* return error */
1968 }
1969
1970 res = a_sx1262_check_busy(handle); /* check busy */
1971 if (res != 0) /* check result */
1972 {
1973 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
1974
1975 return 4; /* return error */
1976 }
1977
1978 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_TX_INFINITE_PREAMBLE, NULL, 0); /* write command */
1979 if (res != 0) /* check result */
1980 {
1981 handle->debug_print("sx1262: set tx infinite preamble failed.\n"); /* set tx infinite preamble failed */
1982
1983 return 1; /* return error */
1984 }
1985
1986 return 0; /* success return 0 */
1987}
1988
2002{
2003 uint8_t res;
2004 uint8_t prev;
2005
2006 if (handle == NULL) /* check handle */
2007 {
2008 return 2; /* return error */
2009 }
2010 if (handle->inited != 1) /* check handle initialization */
2011 {
2012 return 3; /* return error */
2013 }
2014
2015 res = a_sx1262_check_busy(handle); /* check busy */
2016 if (res != 0) /* check result */
2017 {
2018 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2019
2020 return 4; /* return error */
2021 }
2022
2023 prev = mode; /* set param */
2024 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_REGULATOR_MODE, (uint8_t *)&prev, 1); /* write command */
2025 if (res != 0) /* check result */
2026 {
2027 handle->debug_print("sx1262: set regulator mode failed.\n"); /* set regulator mode failed */
2028
2029 return 1; /* return error */
2030 }
2031
2032 return 0; /* success return 0 */
2033}
2034
2047uint8_t sx1262_set_calibration(sx1262_handle_t *handle, uint8_t settings)
2048{
2049 uint8_t res;
2050 uint8_t prev;
2051
2052 if (handle == NULL) /* check handle */
2053 {
2054 return 2; /* return error */
2055 }
2056 if (handle->inited != 1) /* check handle initialization */
2057 {
2058 return 3; /* return error */
2059 }
2060
2061 res = a_sx1262_check_busy(handle); /* check busy */
2062 if (res != 0) /* check result */
2063 {
2064 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2065
2066 return 4; /* return error */
2067 }
2068
2069 prev = settings; /* set param */
2070 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_CALIBRATE, (uint8_t *)&prev, 1); /* write command */
2071 if (res != 0) /* check result */
2072 {
2073 handle->debug_print("sx1262: set calibration failed.\n"); /* set calibration failed */
2074
2075 return 1; /* return error */
2076 }
2077
2078 return 0; /* success return 0 */
2079}
2080
2094uint8_t sx1262_set_calibration_image(sx1262_handle_t *handle, uint8_t freq1, uint8_t freq2)
2095{
2096 uint8_t res;
2097 uint8_t buf[2];
2098
2099 if (handle == NULL) /* check handle */
2100 {
2101 return 2; /* return error */
2102 }
2103 if (handle->inited != 1) /* check handle initialization */
2104 {
2105 return 3; /* return error */
2106 }
2107
2108 res = a_sx1262_check_busy(handle); /* check busy */
2109 if (res != 0) /* check result */
2110 {
2111 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2112
2113 return 4; /* return error */
2114 }
2115
2116 buf[0] = freq1; /* set param */
2117 buf[1] = freq2; /* set param */
2118 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_CALIBRATE_IMAGE, (uint8_t *)buf, 2); /* write command */
2119 if (res != 0) /* check result */
2120 {
2121 handle->debug_print("sx1262: set calibration image failed.\n"); /* set calibration image failed */
2122
2123 return 1; /* return error */
2124 }
2125
2126 return 0; /* success return 0 */
2127}
2128
2142uint8_t sx1262_set_pa_config(sx1262_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max)
2143{
2144 uint8_t res;
2145 uint8_t buf[4];
2146
2147 if (handle == NULL) /* check handle */
2148 {
2149 return 2; /* return error */
2150 }
2151 if (handle->inited != 1) /* check handle initialization */
2152 {
2153 return 3; /* return error */
2154 }
2155
2156 res = a_sx1262_check_busy(handle); /* check busy */
2157 if (res != 0) /* check result */
2158 {
2159 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2160
2161 return 4; /* return error */
2162 }
2163
2164 buf[0] = pa_duty_cycle; /* set param */
2165 buf[1] = hp_max; /* set param */
2166 buf[2] = 0x00; /* set param */
2167 buf[3] = 0x01; /* set param */
2168 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_PA_CONFIG, (uint8_t *)buf, 4); /* write command */
2169 if (res != 0) /* check result */
2170 {
2171 handle->debug_print("sx1262: set pa config failed.\n"); /* set pa config failed */
2172
2173 return 1; /* return error */
2174 }
2175
2176 return 0; /* success return 0 */
2177}
2178
2192{
2193 uint8_t res;
2194 uint8_t prev;
2195
2196 if (handle == NULL) /* check handle */
2197 {
2198 return 2; /* return error */
2199 }
2200 if (handle->inited != 1) /* check handle initialization */
2201 {
2202 return 3; /* return error */
2203 }
2204
2205 res = a_sx1262_check_busy(handle); /* check busy */
2206 if (res != 0) /* check result */
2207 {
2208 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2209
2210 return 4; /* return error */
2211 }
2212
2213 prev = mode; /* set param */
2214 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_RX_TX_FALLBACK_MODE, (uint8_t *)&prev, 1); /* write command */
2215 if (res != 0) /* check result */
2216 {
2217 handle->debug_print("sx1262: set rx tx fallback mode failed.\n"); /* set rx tx fallback mode failed */
2218
2219 return 1; /* return error */
2220 }
2221
2222 return 0; /* success return 0 */
2223}
2224
2240uint8_t sx1262_set_dio_irq_params(sx1262_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask,
2241 uint16_t dio2_mask, uint16_t dio3_mask)
2242{
2243 uint8_t res;
2244 uint8_t buf[8];
2245
2246 if (handle == NULL) /* check handle */
2247 {
2248 return 2; /* return error */
2249 }
2250 if (handle->inited != 1) /* check handle initialization */
2251 {
2252 return 3; /* return error */
2253 }
2254
2255 res = a_sx1262_check_busy(handle); /* check busy */
2256 if (res != 0) /* check result */
2257 {
2258 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2259
2260 return 4; /* return error */
2261 }
2262
2263 buf[0] = (irq_mask >> 8) & 0xFF; /* set param */
2264 buf[1] = (irq_mask >> 0) & 0xFF; /* set param */
2265 buf[2] = (dio1_mask >> 8) & 0xFF; /* set param */
2266 buf[3] = (dio1_mask >> 0) & 0xFF; /* set param */
2267 buf[4] = (dio2_mask >> 8) & 0xFF; /* set param */
2268 buf[5] = (dio2_mask >> 0) & 0xFF; /* set param */
2269 buf[6] = (dio3_mask >> 8) & 0xFF; /* set param */
2270 buf[7] = (dio3_mask >> 0) & 0xFF; /* set param */
2271
2272 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_DIO_IRQ_PARAMS, (uint8_t *)buf, 8); /* write command */
2273 if (res != 0) /* check result */
2274 {
2275 handle->debug_print("sx1262: set dio irq params failed.\n"); /* set dio irq params failed */
2276
2277 return 1; /* return error */
2278 }
2279
2280 return 0; /* success return 0 */
2281}
2282
2295uint8_t sx1262_get_irq_status(sx1262_handle_t *handle, uint16_t *status)
2296{
2297 uint8_t res;
2298 uint8_t buf[3];
2299
2300 if (handle == NULL) /* check handle */
2301 {
2302 return 2; /* return error */
2303 }
2304 if (handle->inited != 1) /* check handle initialization */
2305 {
2306 return 3; /* return error */
2307 }
2308
2309 res = a_sx1262_check_busy(handle); /* check busy */
2310 if (res != 0) /* check result */
2311 {
2312 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2313
2314 return 4; /* return error */
2315 }
2316
2317 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_IRQ_STATUS, (uint8_t *)buf, 3); /* read command */
2318 if (res != 0) /* check result */
2319 {
2320 handle->debug_print("sx1262: get irq status failed.\n"); /* get irq status failed */
2321
2322 return 1; /* return error */
2323 }
2324 *status = ((uint16_t)buf[1] << 8) | buf[2]; /* set status */
2325
2326 return 0; /* success return 0 */
2327}
2328
2341uint8_t sx1262_clear_irq_status(sx1262_handle_t *handle, uint16_t clear_irq_param)
2342{
2343 uint8_t res;
2344 uint8_t buf[2];
2345
2346 if (handle == NULL) /* check handle */
2347 {
2348 return 2; /* return error */
2349 }
2350 if (handle->inited != 1) /* check handle initialization */
2351 {
2352 return 3; /* return error */
2353 }
2354
2355 res = a_sx1262_check_busy(handle); /* check busy */
2356 if (res != 0) /* check result */
2357 {
2358 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2359
2360 return 4; /* return error */
2361 }
2362
2363 buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
2364 buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
2365 res = a_sx1262_spi_write(handle, SX1262_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
2366 if (res != 0) /* check result */
2367 {
2368 handle->debug_print("sx1262: clear irq status failed.\n"); /* clear irq status failed */
2369
2370 return 1; /* return error */
2371 }
2372
2373 return 0; /* success return 0 */
2374}
2375
2389{
2390 uint8_t res;
2391 uint8_t prev;
2392
2393 if (handle == NULL) /* check handle */
2394 {
2395 return 2; /* return error */
2396 }
2397 if (handle->inited != 1) /* check handle initialization */
2398 {
2399 return 3; /* return error */
2400 }
2401
2402 res = a_sx1262_check_busy(handle); /* check busy */
2403 if (res != 0) /* check result */
2404 {
2405 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2406
2407 return 4; /* return error */
2408 }
2409
2410 prev = enable; /* set param */
2411 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_DIO2_AS_RF_SWITCH_CTRL, (uint8_t *)&prev, 1); /* write command */
2412 if (res != 0) /* check result */
2413 {
2414 handle->debug_print("sx1262: set dio2 as rf switch ctrl failed.\n"); /* set dio2 as rf switch ctrl failed */
2415
2416 return 1; /* return error */
2417 }
2418
2419 return 0; /* success return 0 */
2420}
2421
2436{
2437 uint8_t res;
2438 uint8_t buf[4];
2439
2440 if (handle == NULL) /* check handle */
2441 {
2442 return 2; /* return error */
2443 }
2444 if (handle->inited != 1) /* check handle initialization */
2445 {
2446 return 3; /* return error */
2447 }
2448
2449 res = a_sx1262_check_busy(handle); /* check busy */
2450 if (res != 0) /* check result */
2451 {
2452 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2453
2454 return 4; /* return error */
2455 }
2456
2457 buf[0] = voltage; /* set param */
2458 buf[1] = (delay >> 16) & 0xFF; /* set param */
2459 buf[2] = (delay >> 8) & 0xFF; /* set param */
2460 buf[3] = (delay >> 0) & 0xFF; /* set param */
2461 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_DIO3_AS_TCXO_CTRL, (uint8_t *)buf, 4); /* write command */
2462 if (res != 0) /* check result */
2463 {
2464 handle->debug_print("sx1262: set dio3 as tcxo ctrl status failed.\n"); /* set dio3 as tcxo ctrl status failed */
2465
2466 return 1; /* return error */
2467 }
2468
2469 return 0; /* success return 0 */
2470}
2471
2483uint8_t sx1262_frequency_convert_to_register(sx1262_handle_t *handle, uint32_t freq, uint32_t *reg)
2484{
2485 if (handle == NULL) /* check handle */
2486 {
2487 return 2; /* return error */
2488 }
2489 if (handle->inited != 1) /* check handle initialization */
2490 {
2491 return 3; /* return error */
2492 }
2493
2494 *reg = (uint32_t)(powf(2.0f, 25.0f) / (32 * powf(10.f, 6.0f)) * freq); /* convert real data to register data */
2495
2496 return 0; /* success return 0 */
2497}
2498
2510uint8_t sx1262_frequency_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *freq)
2511{
2512 if (handle == NULL) /* check handle */
2513 {
2514 return 2; /* return error */
2515 }
2516 if (handle->inited != 1) /* check handle initialization */
2517 {
2518 return 3; /* return error */
2519 }
2520
2521 *freq = (uint32_t)(32 * powf(10.f, 6.0f) / powf(2.0f, 25.0f) * reg); /* convert real data to register data */
2522
2523 return 0; /* success return 0 */
2524}
2525
2538uint8_t sx1262_set_rf_frequency(sx1262_handle_t *handle, uint32_t reg)
2539{
2540 uint8_t res;
2541 uint8_t buf[4];
2542
2543 if (handle == NULL) /* check handle */
2544 {
2545 return 2; /* return error */
2546 }
2547 if (handle->inited != 1) /* check handle initialization */
2548 {
2549 return 3; /* return error */
2550 }
2551
2552 res = a_sx1262_check_busy(handle); /* check busy */
2553 if (res != 0) /* check result */
2554 {
2555 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2556
2557 return 4; /* return error */
2558 }
2559
2560 buf[0] = (reg >> 24) & 0xFF; /* set param */
2561 buf[1] = (reg >> 16) & 0xFF; /* set param */
2562 buf[2] = (reg >> 8) & 0xFF; /* set param */
2563 buf[3] = (reg >> 0) & 0xFF; /* set param */
2564 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_RF_FREQUENCY, (uint8_t *)buf, 4); /* write command */
2565 if (res != 0) /* check result */
2566 {
2567 handle->debug_print("sx1262: set rf frequency failed.\n"); /* set rf frequency failed */
2568
2569 return 1; /* return error */
2570 }
2571
2572 return 0; /* success return 0 */
2573}
2574
2588{
2589 uint8_t res;
2590 uint8_t prev;
2591
2592 if (handle == NULL) /* check handle */
2593 {
2594 return 2; /* return error */
2595 }
2596 if (handle->inited != 1) /* check handle initialization */
2597 {
2598 return 3; /* return error */
2599 }
2600
2601 res = a_sx1262_check_busy(handle); /* check busy */
2602 if (res != 0) /* check result */
2603 {
2604 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2605
2606 return 4; /* return error */
2607 }
2608
2609 prev = type; /* set param */
2610 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_PACKET_TYPE, (uint8_t *)&prev, 1); /* write command */
2611 if (res != 0) /* check result */
2612 {
2613 handle->debug_print("sx1262: set packet type failed.\n"); /* set packet type failed */
2614
2615 return 1; /* return error */
2616 }
2617
2618 return 0; /* success return 0 */
2619}
2620
2634{
2635 uint8_t res;
2636 uint8_t buf[2];
2637
2638 if (handle == NULL) /* check handle */
2639 {
2640 return 2; /* return error */
2641 }
2642 if (handle->inited != 1) /* check handle initialization */
2643 {
2644 return 3; /* return error */
2645 }
2646
2647 res = a_sx1262_check_busy(handle); /* check busy */
2648 if (res != 0) /* check result */
2649 {
2650 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2651
2652 return 4; /* return error */
2653 }
2654
2655 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_PACKET_TYPE, (uint8_t *)buf, 2); /* write command */
2656 if (res != 0) /* check result */
2657 {
2658 handle->debug_print("sx1262: get packet type failed.\n"); /* get packet type failed */
2659
2660 return 1; /* return error */
2661 }
2662 *type = (sx1262_packet_type_t)(buf[1]); /* get type */
2663
2664 return 0; /* success return 0 */
2665}
2666
2681{
2682 uint8_t res;
2683 uint8_t buf[2];
2684
2685 if (handle == NULL) /* check handle */
2686 {
2687 return 2; /* return error */
2688 }
2689 if (handle->inited != 1) /* check handle initialization */
2690 {
2691 return 3; /* return error */
2692 }
2693
2694 res = a_sx1262_check_busy(handle); /* check busy */
2695 if (res != 0) /* check result */
2696 {
2697 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2698
2699 return 4; /* return error */
2700 }
2701
2702 buf[0] = dbm; /* set param */
2703 buf[1] = t; /* set param */
2704 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_TX_PARAMS, (uint8_t *)buf, 2); /* write command */
2705 if (res != 0) /* check result */
2706 {
2707 handle->debug_print("sx1262: set tx params failed.\n"); /* set tx params failed */
2708
2709 return 1; /* return error */
2710 }
2711
2712 return 0; /* success return 0 */
2713}
2714
2731 sx1262_gfsk_bandwidth_t bw, uint32_t fdev)
2732{
2733 uint8_t res;
2734 uint8_t buf[8];
2735
2736 if (handle == NULL) /* check handle */
2737 {
2738 return 2; /* return error */
2739 }
2740 if (handle->inited != 1) /* check handle initialization */
2741 {
2742 return 3; /* return error */
2743 }
2744
2745 res = a_sx1262_check_busy(handle); /* check busy */
2746 if (res != 0) /* check result */
2747 {
2748 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2749
2750 return 4; /* return error */
2751 }
2752
2753 buf[0] = (br >> 16) & 0xFF; /* set param */
2754 buf[1] = (br >> 8) & 0xFF; /* set param */
2755 buf[2] = (br >> 0) & 0xFF; /* set param */
2756 buf[3] = shape; /* set param */
2757 buf[4] = bw; /* set param */
2758 buf[5] = (fdev >> 16) & 0xFF; /* set param */
2759 buf[6] = (fdev >> 8) & 0xFF; /* set param */
2760 buf[7] = (fdev >> 0) & 0xFF; /* set param */
2761 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_MODULATION_PARAMS, (uint8_t *)buf, 8); /* write command */
2762 if (res != 0) /* check result */
2763 {
2764 handle->debug_print("sx1262: set gfsk modulation params failed.\n"); /* set gfsk modulation params failed */
2765
2766 return 1; /* return error */
2767 }
2768
2769 return 0; /* success return 0 */
2770}
2771
2783uint8_t sx1262_gfsk_bit_rate_convert_to_register(sx1262_handle_t *handle, uint32_t br, uint32_t *reg)
2784{
2785 if (handle == NULL) /* check handle */
2786 {
2787 return 2; /* return error */
2788 }
2789 if (handle->inited != 1) /* check handle initialization */
2790 {
2791 return 3; /* return error */
2792 }
2793
2794 *reg = (uint32_t)(32 * (32 * powf(10.f, 6.0f))) / br; /* convert real data to register data */
2795
2796 return 0; /* success return 0 */
2797}
2798
2810uint8_t sx1262_gfsk_bit_rate_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *br)
2811{
2812 if (handle == NULL) /* check handle */
2813 {
2814 return 2; /* return error */
2815 }
2816 if (handle->inited != 1) /* check handle initialization */
2817 {
2818 return 3; /* return error */
2819 }
2820
2821 *br = (uint32_t)(32 * 32 * powf(10.f, 6.0f) / reg); /* convert real data to register data */
2822
2823 return 0; /* success return 0 */
2824}
2825
2837uint8_t sx1262_gfsk_frequency_deviation_convert_to_register(sx1262_handle_t *handle, uint32_t freq, uint32_t *reg)
2838{
2839 if (handle == NULL) /* check handle */
2840 {
2841 return 2; /* return error */
2842 }
2843 if (handle->inited != 1) /* check handle initialization */
2844 {
2845 return 3; /* return error */
2846 }
2847
2848 *reg = (uint32_t)(powf(2.0f, 25.0f) * freq / (32 * powf(10.f, 6.0f))); /* convert real data to register data */
2849
2850 return 0; /* success return 0 */
2851}
2852
2864uint8_t sx1262_gfsk_frequency_deviation_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *freq)
2865{
2866 if (handle == NULL) /* check handle */
2867 {
2868 return 2; /* return error */
2869 }
2870 if (handle->inited != 1) /* check handle initialization */
2871 {
2872 return 3; /* return error */
2873 }
2874
2875 *freq = (uint32_t)(32 * powf(10.f, 6.0f) / powf(2.0f, 25.0f) * reg); /* convert real data to register data */
2876
2877 return 0; /* success return 0 */
2878}
2879
2896 sx1262_lora_cr_t cr, sx1262_bool_t low_data_rate_optimize_enable)
2897{
2898 uint8_t res;
2899 uint8_t buf[4];
2900
2901 if (handle == NULL) /* check handle */
2902 {
2903 return 2; /* return error */
2904 }
2905 if (handle->inited != 1) /* check handle initialization */
2906 {
2907 return 3; /* return error */
2908 }
2909
2910 res = a_sx1262_check_busy(handle); /* check busy */
2911 if (res != 0) /* check result */
2912 {
2913 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2914
2915 return 4; /* return error */
2916 }
2917
2918 buf[0] = sf; /* set param */
2919 buf[1] = bw; /* set param */
2920 buf[2] = cr; /* set param */
2921 buf[3] = low_data_rate_optimize_enable; /* set param */
2922 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_MODULATION_PARAMS, (uint8_t *)buf, 4); /* write command */
2923 if (res != 0) /* check result */
2924 {
2925 handle->debug_print("sx1262: set lora modulation params failed.\n"); /* set lora modulation params failed */
2926
2927 return 1; /* return error */
2928 }
2929
2930 return 0; /* success return 0 */
2931}
2932
2953uint8_t sx1262_set_gfsk_packet_params(sx1262_handle_t *handle, uint16_t preamble_length,
2955 uint8_t sync_word_length, sx1262_gfsk_addr_filter_t filter,
2956 sx1262_gfsk_packet_type_t packet_type, uint8_t payload_length,
2957 sx1262_gfsk_crc_type_t crc_type, sx1262_bool_t whitening_enable)
2958{
2959 uint8_t res;
2960 uint8_t buf[9];
2961
2962 if (handle == NULL) /* check handle */
2963 {
2964 return 2; /* return error */
2965 }
2966 if (handle->inited != 1) /* check handle initialization */
2967 {
2968 return 3; /* return error */
2969 }
2970 if (sync_word_length > 0x40) /* check sync word length */
2971 {
2972 handle->debug_print("sx1262: sync word length is over 0x40.\n"); /* chip is busy */
2973
2974 return 5; /* return error */
2975 }
2976
2977 res = a_sx1262_check_busy(handle); /* check busy */
2978 if (res != 0) /* check result */
2979 {
2980 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
2981
2982 return 4; /* return error */
2983 }
2984
2985 buf[0] = (preamble_length >> 8) & 0xFF; /* set param */
2986 buf[1] = (preamble_length >> 0) & 0xFF; /* set param */
2987 buf[2] = detector_length; /* set param */
2988 buf[3] = sync_word_length; /* set param */
2989 buf[4] = filter; /* set param */
2990 buf[5] = packet_type; /* set param */
2991 buf[6] = payload_length; /* set param */
2992 buf[7] = crc_type; /* set param */
2993 buf[8] = whitening_enable; /* set param */
2994 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_PACKET_PARAMS, (uint8_t *)buf, 9); /* write command */
2995 if (res != 0) /* check result */
2996 {
2997 handle->debug_print("sx1262: set gfsk modulation params failed.\n"); /* set gfsk modulation params failed */
2998
2999 return 1; /* return error */
3000 }
3001
3002 return 0; /* success return 0 */
3003}
3004
3021uint8_t sx1262_set_lora_packet_params(sx1262_handle_t *handle, uint16_t preamble_length,
3022 sx1262_lora_header_t header_type, uint8_t payload_length,
3023 sx1262_lora_crc_type_t crc_type, sx1262_bool_t invert_iq_enable)
3024{
3025 uint8_t res;
3026 uint8_t buf[6];
3027
3028 if (handle == NULL) /* check handle */
3029 {
3030 return 2; /* return error */
3031 }
3032 if (handle->inited != 1) /* check handle initialization */
3033 {
3034 return 3; /* return error */
3035 }
3036
3037 res = a_sx1262_check_busy(handle); /* check busy */
3038 if (res != 0) /* check result */
3039 {
3040 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3041
3042 return 4; /* return error */
3043 }
3044
3045 buf[0] = (preamble_length >> 8) & 0xFF; /* set param */
3046 buf[1] = (preamble_length >> 0) & 0xFF; /* set param */
3047 buf[2] = header_type; /* set param */
3048 buf[3] = payload_length; /* set param */
3049 buf[4] = crc_type; /* set param */
3050 buf[5] = invert_iq_enable; /* set param */
3051 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_PACKET_PARAMS, (uint8_t *)buf, 6); /* write command */
3052 if (res != 0) /* check result */
3053 {
3054 handle->debug_print("sx1262: set lora modulation params failed.\n"); /* set lora modulation params failed */
3055
3056 return 1; /* return error */
3057 }
3058
3059 return 0; /* success return 0 */
3060}
3061
3079 uint8_t cad_det_peak, uint8_t cad_det_min, sx1262_lora_cad_exit_mode_t mode,
3080 uint32_t timeout)
3081{
3082 uint8_t res;
3083 uint8_t buf[7];
3084
3085 if (handle == NULL) /* check handle */
3086 {
3087 return 2; /* return error */
3088 }
3089 if (handle->inited != 1) /* check handle initialization */
3090 {
3091 return 3; /* return error */
3092 }
3093
3094 res = a_sx1262_check_busy(handle); /* check busy */
3095 if (res != 0) /* check result */
3096 {
3097 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3098
3099 return 4; /* return error */
3100 }
3101
3102 buf[0] = num; /* set param */
3103 buf[1] = cad_det_peak; /* set param */
3104 buf[2] = cad_det_min; /* set param */
3105 buf[3] = mode; /* set param */
3106 buf[4] = (timeout >> 16) & 0xFF; /* set param */
3107 buf[5] = (timeout >> 8) & 0xFF; /* set param */
3108 buf[6] = (timeout >> 0) & 0xFF; /* set param */
3109 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_CAD_PARAMS, (uint8_t *)buf, 7); /* write command */
3110 if (res != 0) /* check result */
3111 {
3112 handle->debug_print("sx1262: set cad params failed.\n"); /* set cad params failed */
3113
3114 return 1; /* return error */
3115 }
3116
3117 return 0; /* success return 0 */
3118}
3119
3133uint8_t sx1262_set_buffer_base_address(sx1262_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr)
3134{
3135 uint8_t res;
3136 uint8_t buf[2];
3137
3138 if (handle == NULL) /* check handle */
3139 {
3140 return 2; /* return error */
3141 }
3142 if (handle->inited != 1) /* check handle initialization */
3143 {
3144 return 3; /* return error */
3145 }
3146
3147 res = a_sx1262_check_busy(handle); /* check busy */
3148 if (res != 0) /* check result */
3149 {
3150 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3151
3152 return 4; /* return error */
3153 }
3154
3155 buf[0] = tx_base_addr; /* set param */
3156 buf[1] = rx_base_addr; /* set param */
3157 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_BUFFER_BASE_ADDRESS, (uint8_t *)buf, 2); /* write command */
3158 if (res != 0) /* check result */
3159 {
3160 handle->debug_print("sx1262: set buffer base address failed.\n"); /* set buffer base address failed */
3161
3162 return 1; /* return error */
3163 }
3164
3165 return 0; /* success return 0 */
3166}
3167
3180uint8_t sx1262_set_lora_symb_num_timeout(sx1262_handle_t *handle, uint8_t symb_num)
3181{
3182 uint8_t res;
3183 uint8_t prev;
3184
3185 if (handle == NULL) /* check handle */
3186 {
3187 return 2; /* return error */
3188 }
3189 if (handle->inited != 1) /* check handle initialization */
3190 {
3191 return 3; /* return error */
3192 }
3193
3194 res = a_sx1262_check_busy(handle); /* check busy */
3195 if (res != 0) /* check result */
3196 {
3197 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3198
3199 return 4; /* return error */
3200 }
3201
3202 prev = symb_num; /* set param */
3203 res = a_sx1262_spi_write(handle, SX1262_COMMAND_SET_LORA_SYMB_NUM_TIMEOUT, (uint8_t *)&prev, 1); /* write command */
3204 if (res != 0) /* check result */
3205 {
3206 handle->debug_print("sx1262: set lora symb num timeout failed.\n"); /* set lora symb num timeout failed */
3207
3208 return 1; /* return error */
3209 }
3210
3211 return 0; /* success return 0 */
3212}
3213
3226uint8_t sx1262_get_status(sx1262_handle_t *handle, uint8_t *status)
3227{
3228 uint8_t res;
3229 uint8_t buf[1];
3230
3231 if (handle == NULL) /* check handle */
3232 {
3233 return 2; /* return error */
3234 }
3235 if (handle->inited != 1) /* check handle initialization */
3236 {
3237 return 3; /* return error */
3238 }
3239
3240 res = a_sx1262_check_busy(handle); /* check busy */
3241 if (res != 0) /* check result */
3242 {
3243 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3244
3245 return 4; /* return error */
3246 }
3247
3248 memset(buf, 0, sizeof(uint8_t) * 1); /* clear the buffer */
3249 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_STATUS, (uint8_t *)buf, 1); /* read command */
3250 if (res != 0) /* check result */
3251 {
3252 handle->debug_print("sx1262: get status failed.\n"); /* get status failed */
3253
3254 return 1; /* return error */
3255 }
3256 *status = buf[0]; /* set status */
3257
3258 return 0; /* success return 0 */
3259}
3260
3274uint8_t sx1262_get_rx_buffer_status(sx1262_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer)
3275{
3276 uint8_t res;
3277 uint8_t buf[3];
3278
3279 if (handle == NULL) /* check handle */
3280 {
3281 return 2; /* return error */
3282 }
3283 if (handle->inited != 1) /* check handle initialization */
3284 {
3285 return 3; /* return error */
3286 }
3287
3288 res = a_sx1262_check_busy(handle); /* check busy */
3289 if (res != 0) /* check result */
3290 {
3291 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3292
3293 return 4; /* return error */
3294 }
3295
3296 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_RX_BUFFER_STATUS, (uint8_t *)buf, 3); /* read command */
3297 if (res != 0) /* check result */
3298 {
3299 handle->debug_print("sx1262: get rx buffer status failed.\n"); /* get rx buffer status failed */
3300
3301 return 1; /* return error */
3302 }
3303 *payload_length_rx = buf[1]; /* set status */
3304 *rx_start_buffer_pointer = buf[2]; /* set status */
3305
3306 return 0; /* success return 0 */
3307}
3308
3325uint8_t sx1262_get_gfsk_packet_status(sx1262_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw,
3326 uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg)
3327{
3328 uint8_t res;
3329 uint8_t buf[4];
3330
3331 if (handle == NULL) /* check handle */
3332 {
3333 return 2; /* return error */
3334 }
3335 if (handle->inited != 1) /* check handle initialization */
3336 {
3337 return 3; /* return error */
3338 }
3339
3340 res = a_sx1262_check_busy(handle); /* check busy */
3341 if (res != 0) /* check result */
3342 {
3343 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3344
3345 return 4; /* return error */
3346 }
3347
3348 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_PACKET_STATUS, (uint8_t *)buf, 4); /* read command */
3349 if (res != 0) /* check result */
3350 {
3351 handle->debug_print("sx1262: get packet status failed.\n"); /* get packet status failed */
3352
3353 return 1; /* return error */
3354 }
3355 *rx_status= buf[1]; /* set status */
3356 *rssi_sync_raw = buf[2]; /* set status */
3357 *rssi_avg_raw = buf[3]; /* set status */
3358 *rssi_sync = -(float)(*rssi_sync_raw) / 2.0f; /* set status */
3359 *rssi_avg = -(float)(*rssi_avg_raw) / 2.0f; /* set status */
3360
3361 return 0; /* success return 0 */
3362}
3363
3381uint8_t sx1262_get_lora_packet_status(sx1262_handle_t *handle, uint8_t *rssi_pkt_raw, int8_t *snr_pkt_raw,
3382 uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt)
3383{
3384 uint8_t res;
3385 uint8_t buf[4];
3386
3387 if (handle == NULL) /* check handle */
3388 {
3389 return 2; /* return error */
3390 }
3391 if (handle->inited != 1) /* check handle initialization */
3392 {
3393 return 3; /* return error */
3394 }
3395
3396 res = a_sx1262_check_busy(handle); /* check busy */
3397 if (res != 0) /* check result */
3398 {
3399 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3400
3401 return 4; /* return error */
3402 }
3403
3404 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_PACKET_STATUS, (uint8_t *)buf, 4); /* read command */
3405 if (res != 0) /* check result */
3406 {
3407 handle->debug_print("sx1262: get packet status failed.\n"); /* get packet status failed */
3408
3409 return 1; /* return error */
3410 }
3411 *rssi_pkt_raw= buf[1]; /* set status */
3412 *snr_pkt_raw = (int8_t)buf[2]; /* set status */
3413 *signal_rssi_pkt_raw = buf[3]; /* set status */
3414 *rssi_pkt = -(float)(*rssi_pkt_raw) / 2.0f; /* set status */
3415 *snr_pkt = (float)(*snr_pkt_raw) / 4.0f; /* set status */
3416 *signal_rssi_pkt = -(float)(*signal_rssi_pkt_raw) / 2.0f; /* set status */
3417
3418 return 0; /* success return 0 */
3419}
3420
3434uint8_t sx1262_get_instantaneous_rssi(sx1262_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst)
3435{
3436 uint8_t res;
3437 uint8_t buf[2];
3438
3439 if (handle == NULL) /* check handle */
3440 {
3441 return 2; /* return error */
3442 }
3443 if (handle->inited != 1) /* check handle initialization */
3444 {
3445 return 3; /* return error */
3446 }
3447
3448 res = a_sx1262_check_busy(handle); /* check busy */
3449 if (res != 0) /* check result */
3450 {
3451 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3452
3453 return 4; /* return error */
3454 }
3455
3456 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_RSSI_LNST, (uint8_t *)buf, 2); /* read command */
3457 if (res != 0) /* check result */
3458 {
3459 handle->debug_print("sx1262: get instantaneous rssi failed.\n"); /* get instantaneous rssi failed */
3460
3461 return 1; /* return error */
3462 }
3463 *rssi_inst_raw = buf[1]; /* set status */
3464 *rssi_inst = -(float)(*rssi_inst_raw) / 2.0f; /* set status */
3465
3466 return 0; /* success return 0 */
3467}
3468
3483uint8_t sx1262_get_stats(sx1262_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error)
3484{
3485 uint8_t res;
3486 uint8_t buf[7];
3487
3488 if (handle == NULL) /* check handle */
3489 {
3490 return 2; /* return error */
3491 }
3492 if (handle->inited != 1) /* check handle initialization */
3493 {
3494 return 3; /* return error */
3495 }
3496
3497 res = a_sx1262_check_busy(handle); /* check busy */
3498 if (res != 0) /* check result */
3499 {
3500 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3501
3502 return 4; /* return error */
3503 }
3504
3505 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_STATS, (uint8_t *)buf, 7); /* read command */
3506 if (res != 0) /* check result */
3507 {
3508 handle->debug_print("sx1262: get stats failed.\n"); /* get stats failed */
3509
3510 return 1; /* return error */
3511 }
3512 *pkt_received = (uint16_t)(((uint16_t)buf[1] << 8) | buf[2]); /* set status */
3513 *pkt_crc_error = (uint16_t)(((uint16_t)buf[3] << 8) | buf[4]); /* set status */
3514 *pkt_length_header_error = (uint16_t)(((uint16_t)buf[5] << 8) | buf[6]); /* set status */
3515
3516 return 0; /* success return 0 */
3517}
3518
3533uint8_t sx1262_reset_stats(sx1262_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error)
3534{
3535 uint8_t res;
3536 uint8_t buf[6];
3537
3538 if (handle == NULL) /* check handle */
3539 {
3540 return 2; /* return error */
3541 }
3542 if (handle->inited != 1) /* check handle initialization */
3543 {
3544 return 3; /* return error */
3545 }
3546
3547 res = a_sx1262_check_busy(handle); /* check busy */
3548 if (res != 0) /* check result */
3549 {
3550 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3551
3552 return 4; /* return error */
3553 }
3554
3555 buf[0] = (pkt_received >> 8) & 0xFF; /* set status */
3556 buf[1] = (pkt_received >> 0) & 0xFF; /* set status */
3557 buf[2] = (pkt_crc_error >> 8) & 0xFF; /* set status */
3558 buf[3] = (pkt_crc_error >> 0) & 0xFF; /* set status */
3559 buf[4] = (pkt_length_header_error >> 8) & 0xFF; /* set status */
3560 buf[5] = (pkt_length_header_error >> 0) & 0xFF; /* set status */
3561 res = a_sx1262_spi_write(handle, SX1262_COMMAND_RESET_STATS, (uint8_t *)buf, 6); /* write command */
3562 if (res != 0) /* check result */
3563 {
3564 handle->debug_print("sx1262: reset stats failed.\n"); /* reset stats failed */
3565
3566 return 1; /* return error */
3567 }
3568
3569 return 0; /* success return 0 */
3570}
3571
3584uint8_t sx1262_get_device_errors(sx1262_handle_t *handle, uint16_t *op_error)
3585{
3586 uint8_t res;
3587 uint8_t buf[3];
3588
3589 if (handle == NULL) /* check handle */
3590 {
3591 return 2; /* return error */
3592 }
3593 if (handle->inited != 1) /* check handle initialization */
3594 {
3595 return 3; /* return error */
3596 }
3597
3598 res = a_sx1262_check_busy(handle); /* check busy */
3599 if (res != 0) /* check result */
3600 {
3601 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3602
3603 return 4; /* return error */
3604 }
3605
3606 res = a_sx1262_spi_read(handle, SX1262_COMMAND_GET_DEVICE_ERRORS, (uint8_t *)buf, 3); /* read command */
3607 if (res != 0) /* check result */
3608 {
3609 handle->debug_print("sx1262: get device errors failed.\n"); /* get device errors failed */
3610
3611 return 1; /* return error */
3612 }
3613 *op_error = (uint16_t)(((uint16_t)buf[1] << 8) | buf[2]); /* set status */
3614
3615 return 0; /* success return 0 */
3616}
3617
3630{
3631 uint8_t res;
3632 uint8_t buf[2];
3633
3634 if (handle == NULL) /* check handle */
3635 {
3636 return 2; /* return error */
3637 }
3638 if (handle->inited != 1) /* check handle initialization */
3639 {
3640 return 3; /* return error */
3641 }
3642
3643 res = a_sx1262_check_busy(handle); /* check busy */
3644 if (res != 0) /* check result */
3645 {
3646 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3647
3648 return 4; /* return error */
3649 }
3650
3651 buf[0] = 0x00; /* set status */
3652 buf[1] = 0x00; /* set status */
3653 res = a_sx1262_spi_write(handle, SX1262_COMMAND_CLEAR_DEVICE_ERRORS, (uint8_t *)buf, 2); /* write command */
3654 if (res != 0) /* check result */
3655 {
3656 handle->debug_print("sx1262: clear device errors failed.\n"); /* clear device errors failed */
3657
3658 return 1; /* return error */
3659 }
3660
3661 return 0; /* success return 0 */
3662}
3663
3677{
3678 uint8_t res;
3679 uint8_t buf[2];
3680
3681 if (handle == NULL) /* check handle */
3682 {
3683 return 2; /* return error */
3684 }
3685 if (handle->inited != 1) /* check handle initialization */
3686 {
3687 return 3; /* return error */
3688 }
3689
3690 res = a_sx1262_check_busy(handle); /* check busy */
3691 if (res != 0) /* check result */
3692 {
3693 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3694
3695 return 4; /* return error */
3696 }
3697
3698 buf[0] = (value >> 8) & 0xFF; /* set msb */
3699 buf[1] = (value >> 0) & 0xFF; /* set lsb */
3700 res = a_sx1262_spi_write_register(handle, SX1262_REG_WHITENING_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* write register */
3701 if (res != 0) /* check result */
3702 {
3703 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
3704
3705 return 1; /* return error */
3706 }
3707
3708 return 0; /* success return 0 */
3709}
3710
3724{
3725 uint8_t res;
3726 uint8_t buf[2];
3727
3728 if (handle == NULL) /* check handle */
3729 {
3730 return 2; /* return error */
3731 }
3732 if (handle->inited != 1) /* check handle initialization */
3733 {
3734 return 3; /* return error */
3735 }
3736
3737 res = a_sx1262_check_busy(handle); /* check busy */
3738 if (res != 0) /* check result */
3739 {
3740 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3741
3742 return 4; /* return error */
3743 }
3744
3745 res = a_sx1262_spi_read_register(handle, SX1262_REG_WHITENING_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* read register */
3746 if (res != 0) /* check result */
3747 {
3748 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
3749
3750 return 1; /* return error */
3751 }
3752 *value = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
3753
3754 return 0; /* success return 0 */
3755}
3756
3770{
3771 uint8_t res;
3772 uint8_t buf[2];
3773
3774 if (handle == NULL) /* check handle */
3775 {
3776 return 2; /* return error */
3777 }
3778 if (handle->inited != 1) /* check handle initialization */
3779 {
3780 return 3; /* return error */
3781 }
3782
3783 res = a_sx1262_check_busy(handle); /* check busy */
3784 if (res != 0) /* check result */
3785 {
3786 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3787
3788 return 4; /* return error */
3789 }
3790
3791 buf[0] = (value >> 8) & 0xFF; /* set msb */
3792 buf[1] = (value >> 0) & 0xFF; /* set lsb */
3793 res = a_sx1262_spi_write_register(handle, SX1262_REG_CRC_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* write register */
3794 if (res != 0) /* check result */
3795 {
3796 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
3797
3798 return 1; /* return error */
3799 }
3800
3801 return 0; /* success return 0 */
3802}
3803
3817{
3818 uint8_t res;
3819 uint8_t buf[2];
3820
3821 if (handle == NULL) /* check handle */
3822 {
3823 return 2; /* return error */
3824 }
3825 if (handle->inited != 1) /* check handle initialization */
3826 {
3827 return 3; /* return error */
3828 }
3829
3830 res = a_sx1262_check_busy(handle); /* check busy */
3831 if (res != 0) /* check result */
3832 {
3833 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3834
3835 return 4; /* return error */
3836 }
3837
3838 res = a_sx1262_spi_read_register(handle, SX1262_REG_CRC_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* read register */
3839 if (res != 0) /* check result */
3840 {
3841 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
3842
3843 return 1; /* return error */
3844 }
3845 *value = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
3846
3847 return 0; /* success return 0 */
3848}
3849
3863{
3864 uint8_t res;
3865 uint8_t buf[2];
3866
3867 if (handle == NULL) /* check handle */
3868 {
3869 return 2; /* return error */
3870 }
3871 if (handle->inited != 1) /* check handle initialization */
3872 {
3873 return 3; /* return error */
3874 }
3875
3876 res = a_sx1262_check_busy(handle); /* check busy */
3877 if (res != 0) /* check result */
3878 {
3879 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3880
3881 return 4; /* return error */
3882 }
3883
3884 buf[0] = (value >> 8) & 0xFF; /* set msb */
3885 buf[1] = (value >> 0) & 0xFF; /* set lsb */
3886 res = a_sx1262_spi_write_register(handle, SX1262_REG_CRC_POLYNOMIAL_VALUE_MSB, (uint8_t *)buf, 2); /* write register */
3887 if (res != 0) /* check result */
3888 {
3889 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
3890
3891 return 1; /* return error */
3892 }
3893
3894 return 0; /* success return 0 */
3895}
3896
3910{
3911 uint8_t res;
3912 uint8_t buf[2];
3913
3914 if (handle == NULL) /* check handle */
3915 {
3916 return 2; /* return error */
3917 }
3918 if (handle->inited != 1) /* check handle initialization */
3919 {
3920 return 3; /* return error */
3921 }
3922
3923 res = a_sx1262_check_busy(handle); /* check busy */
3924 if (res != 0) /* check result */
3925 {
3926 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3927
3928 return 4; /* return error */
3929 }
3930
3931 res = a_sx1262_spi_read_register(handle, SX1262_REG_CRC_POLYNOMIAL_VALUE_MSB, (uint8_t *)buf, 2); /* read register */
3932 if (res != 0) /* check result */
3933 {
3934 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
3935
3936 return 1; /* return error */
3937 }
3938 *value = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
3939
3940 return 0; /* success return 0 */
3941}
3942
3955uint8_t sx1262_set_fsk_sync_word(sx1262_handle_t *handle, uint8_t sync_word[8])
3956{
3957 uint8_t res;
3958
3959 if (handle == NULL) /* check handle */
3960 {
3961 return 2; /* return error */
3962 }
3963 if (handle->inited != 1) /* check handle initialization */
3964 {
3965 return 3; /* return error */
3966 }
3967
3968 res = a_sx1262_check_busy(handle); /* check busy */
3969 if (res != 0) /* check result */
3970 {
3971 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
3972
3973 return 4; /* return error */
3974 }
3975
3976 res = a_sx1262_spi_write_register(handle, SX1262_REG_SYNC_WORD_0, (uint8_t *)sync_word, 8); /* write register */
3977 if (res != 0) /* check result */
3978 {
3979 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
3980
3981 return 1; /* return error */
3982 }
3983
3984 return 0; /* success return 0 */
3985}
3986
3999uint8_t sx1262_get_fsk_sync_word(sx1262_handle_t *handle, uint8_t sync_word[8])
4000{
4001 uint8_t res;
4002
4003 if (handle == NULL) /* check handle */
4004 {
4005 return 2; /* return error */
4006 }
4007 if (handle->inited != 1) /* check handle initialization */
4008 {
4009 return 3; /* return error */
4010 }
4011
4012 res = a_sx1262_check_busy(handle); /* check busy */
4013 if (res != 0) /* check result */
4014 {
4015 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4016
4017 return 4; /* return error */
4018 }
4019
4020 res = a_sx1262_spi_read_register(handle, SX1262_REG_SYNC_WORD_0, (uint8_t *)sync_word, 8); /* read register */
4021 if (res != 0) /* check result */
4022 {
4023 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4024
4025 return 1; /* return error */
4026 }
4027
4028 return 0; /* success return 0 */
4029}
4030
4043uint8_t sx1262_set_fsk_node_address(sx1262_handle_t *handle, uint8_t addr)
4044{
4045 uint8_t res;
4046
4047 if (handle == NULL) /* check handle */
4048 {
4049 return 2; /* return error */
4050 }
4051 if (handle->inited != 1) /* check handle initialization */
4052 {
4053 return 3; /* return error */
4054 }
4055
4056 res = a_sx1262_check_busy(handle); /* check busy */
4057 if (res != 0) /* check result */
4058 {
4059 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4060
4061 return 4; /* return error */
4062 }
4063
4064 res = a_sx1262_spi_write_register(handle, SX1262_REG_NODE_ADDRESS, (uint8_t *)&addr, 1); /* write register */
4065 if (res != 0) /* check result */
4066 {
4067 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4068
4069 return 1; /* return error */
4070 }
4071
4072 return 0; /* success return 0 */
4073}
4074
4087uint8_t sx1262_get_fsk_node_address(sx1262_handle_t *handle, uint8_t *addr)
4088{
4089 uint8_t res;
4090
4091 if (handle == NULL) /* check handle */
4092 {
4093 return 2; /* return error */
4094 }
4095 if (handle->inited != 1) /* check handle initialization */
4096 {
4097 return 3; /* return error */
4098 }
4099
4100 res = a_sx1262_check_busy(handle); /* check busy */
4101 if (res != 0) /* check result */
4102 {
4103 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4104
4105 return 4; /* return error */
4106 }
4107
4108 res = a_sx1262_spi_read_register(handle, SX1262_REG_NODE_ADDRESS, (uint8_t *)addr, 1); /* read register */
4109 if (res != 0) /* check result */
4110 {
4111 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4112
4113 return 1; /* return error */
4114 }
4115
4116 return 0; /* success return 0 */
4117}
4118
4132{
4133 uint8_t res;
4134
4135 if (handle == NULL) /* check handle */
4136 {
4137 return 2; /* return error */
4138 }
4139 if (handle->inited != 1) /* check handle initialization */
4140 {
4141 return 3; /* return error */
4142 }
4143
4144 res = a_sx1262_check_busy(handle); /* check busy */
4145 if (res != 0) /* check result */
4146 {
4147 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4148
4149 return 4; /* return error */
4150 }
4151
4152 res = a_sx1262_spi_write_register(handle, SX1262_REG_BROADCAST_ADDRESS, (uint8_t *)&addr, 1); /* write register */
4153 if (res != 0) /* check result */
4154 {
4155 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4156
4157 return 1; /* return error */
4158 }
4159
4160 return 0; /* success return 0 */
4161}
4162
4176{
4177 uint8_t res;
4178
4179 if (handle == NULL) /* check handle */
4180 {
4181 return 2; /* return error */
4182 }
4183 if (handle->inited != 1) /* check handle initialization */
4184 {
4185 return 3; /* return error */
4186 }
4187
4188 res = a_sx1262_check_busy(handle); /* check busy */
4189 if (res != 0) /* check result */
4190 {
4191 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4192
4193 return 4; /* return error */
4194 }
4195
4196 res = a_sx1262_spi_read_register(handle, SX1262_REG_BROADCAST_ADDRESS, (uint8_t *)addr, 1); /* read register */
4197 if (res != 0) /* check result */
4198 {
4199 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4200
4201 return 1; /* return error */
4202 }
4203
4204 return 0; /* success return 0 */
4205}
4206
4219uint8_t sx1262_set_iq_polarity(sx1262_handle_t *handle, uint8_t setup)
4220{
4221 uint8_t res;
4222
4223 if (handle == NULL) /* check handle */
4224 {
4225 return 2; /* return error */
4226 }
4227 if (handle->inited != 1) /* check handle initialization */
4228 {
4229 return 3; /* return error */
4230 }
4231
4232 res = a_sx1262_check_busy(handle); /* check busy */
4233 if (res != 0) /* check result */
4234 {
4235 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4236
4237 return 4; /* return error */
4238 }
4239
4240 res = a_sx1262_spi_write_register(handle, SX1262_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* write register */
4241 if (res != 0) /* check result */
4242 {
4243 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4244
4245 return 1; /* return error */
4246 }
4247
4248 return 0; /* success return 0 */
4249}
4250
4263uint8_t sx1262_get_iq_polarity(sx1262_handle_t *handle, uint8_t *setup)
4264{
4265 uint8_t res;
4266
4267 if (handle == NULL) /* check handle */
4268 {
4269 return 2; /* return error */
4270 }
4271 if (handle->inited != 1) /* check handle initialization */
4272 {
4273 return 3; /* return error */
4274 }
4275
4276 res = a_sx1262_check_busy(handle); /* check busy */
4277 if (res != 0) /* check result */
4278 {
4279 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4280
4281 return 4; /* return error */
4282 }
4283
4284 res = a_sx1262_spi_read_register(handle, SX1262_REG_IQ_POLARITY_SETUP, (uint8_t *)setup, 1); /* read register */
4285 if (res != 0) /* check result */
4286 {
4287 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4288
4289 return 1; /* return error */
4290 }
4291
4292 return 0; /* success return 0 */
4293}
4294
4307uint8_t sx1262_set_lora_sync_word(sx1262_handle_t *handle, uint16_t sync_word)
4308{
4309 uint8_t res;
4310 uint8_t buf[2];
4311
4312 if (handle == NULL) /* check handle */
4313 {
4314 return 2; /* return error */
4315 }
4316 if (handle->inited != 1) /* check handle initialization */
4317 {
4318 return 3; /* return error */
4319 }
4320
4321 res = a_sx1262_check_busy(handle); /* check busy */
4322 if (res != 0) /* check result */
4323 {
4324 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4325
4326 return 4; /* return error */
4327 }
4328
4329 buf[0] = (sync_word >> 8) & 0xFF; /* set msb */
4330 buf[1] = (sync_word >> 0) & 0xFF; /* set lsb */
4331 res = a_sx1262_spi_write_register(handle, SX1262_REG_LORA_SYNC_WORD_MSB, (uint8_t *)buf, 2); /* write register */
4332 if (res != 0) /* check result */
4333 {
4334 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4335
4336 return 1; /* return error */
4337 }
4338
4339 return 0; /* success return 0 */
4340}
4341
4354uint8_t sx1262_get_lora_sync_word(sx1262_handle_t *handle, uint16_t *sync_word)
4355{
4356 uint8_t res;
4357 uint8_t buf[2];
4358
4359 if (handle == NULL) /* check handle */
4360 {
4361 return 2; /* return error */
4362 }
4363 if (handle->inited != 1) /* check handle initialization */
4364 {
4365 return 3; /* return error */
4366 }
4367
4368 res = a_sx1262_check_busy(handle); /* check busy */
4369 if (res != 0) /* check result */
4370 {
4371 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4372
4373 return 4; /* return error */
4374 }
4375
4376 res = a_sx1262_spi_read_register(handle, SX1262_REG_LORA_SYNC_WORD_MSB, (uint8_t *)buf, 2); /* read register */
4377 if (res != 0) /* check result */
4378 {
4379 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4380
4381 return 1; /* return error */
4382 }
4383 *sync_word = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
4384
4385 return 0; /* success return 0 */
4386}
4387
4400uint8_t sx1262_get_random_number(sx1262_handle_t *handle, uint32_t *r)
4401{
4402 uint8_t res;
4403 uint8_t buf[4];
4404
4405 if (handle == NULL) /* check handle */
4406 {
4407 return 2; /* return error */
4408 }
4409 if (handle->inited != 1) /* check handle initialization */
4410 {
4411 return 3; /* return error */
4412 }
4413
4414 res = a_sx1262_check_busy(handle); /* check busy */
4415 if (res != 0) /* check result */
4416 {
4417 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4418
4419 return 4; /* return error */
4420 }
4421
4422 res = a_sx1262_spi_read_register(handle, SX1262_REG_RANDOM_NUMBER_GEN_0, (uint8_t *)buf, 4); /* read register */
4423 if (res != 0) /* check result */
4424 {
4425 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4426
4427 return 1; /* return error */
4428 }
4429 *r = (uint32_t)((uint32_t)buf[0] << 24 | (uint32_t)buf[1] << 16 |
4430 (uint32_t)buf[2] << 8 | buf[3]); /* set rand */
4431
4432 return 0; /* success return 0 */
4433}
4434
4447uint8_t sx1262_set_tx_modulation(sx1262_handle_t *handle, uint8_t modulation)
4448{
4449 uint8_t res;
4450
4451 if (handle == NULL) /* check handle */
4452 {
4453 return 2; /* return error */
4454 }
4455 if (handle->inited != 1) /* check handle initialization */
4456 {
4457 return 3; /* return error */
4458 }
4459
4460 res = a_sx1262_check_busy(handle); /* check busy */
4461 if (res != 0) /* check result */
4462 {
4463 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4464
4465 return 4; /* return error */
4466 }
4467
4468 res = a_sx1262_spi_write_register(handle, SX1262_REG_TX_MODULATION, (uint8_t *)&modulation, 1); /* write register */
4469 if (res != 0) /* check result */
4470 {
4471 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4472
4473 return 1; /* return error */
4474 }
4475
4476 return 0; /* success return 0 */
4477}
4478
4491uint8_t sx1262_get_tx_modulation(sx1262_handle_t *handle, uint8_t *modulation)
4492{
4493 uint8_t res;
4494
4495 if (handle == NULL) /* check handle */
4496 {
4497 return 2; /* return error */
4498 }
4499 if (handle->inited != 1) /* check handle initialization */
4500 {
4501 return 3; /* return error */
4502 }
4503
4504 res = a_sx1262_check_busy(handle); /* check busy */
4505 if (res != 0) /* check result */
4506 {
4507 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4508
4509 return 4; /* return error */
4510 }
4511
4512 res = a_sx1262_spi_read_register(handle, SX1262_REG_TX_MODULATION, (uint8_t *)modulation, 1); /* read register */
4513 if (res != 0) /* check result */
4514 {
4515 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4516
4517 return 1; /* return error */
4518 }
4519
4520 return 0; /* success return 0 */
4521}
4522
4535uint8_t sx1262_set_rx_gain(sx1262_handle_t *handle, uint8_t gain)
4536{
4537 uint8_t res;
4538
4539 if (handle == NULL) /* check handle */
4540 {
4541 return 2; /* return error */
4542 }
4543 if (handle->inited != 1) /* check handle initialization */
4544 {
4545 return 3; /* return error */
4546 }
4547
4548 res = a_sx1262_check_busy(handle); /* check busy */
4549 if (res != 0) /* check result */
4550 {
4551 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4552
4553 return 4; /* return error */
4554 }
4555
4556 res = a_sx1262_spi_write_register(handle, SX1262_REG_RX_GAIN, (uint8_t *)&gain, 1); /* write register */
4557 if (res != 0) /* check result */
4558 {
4559 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4560
4561 return 1; /* return error */
4562 }
4563
4564 return 0; /* success return 0 */
4565}
4566
4579uint8_t sx1262_get_rx_gain(sx1262_handle_t *handle, uint8_t *gain)
4580{
4581 uint8_t res;
4582
4583 if (handle == NULL) /* check handle */
4584 {
4585 return 2; /* return error */
4586 }
4587 if (handle->inited != 1) /* check handle initialization */
4588 {
4589 return 3; /* return error */
4590 }
4591
4592 res = a_sx1262_check_busy(handle); /* check busy */
4593 if (res != 0) /* check result */
4594 {
4595 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4596
4597 return 4; /* return error */
4598 }
4599
4600 res = a_sx1262_spi_read_register(handle, SX1262_REG_RX_GAIN, (uint8_t *)gain, 1); /* read register */
4601 if (res != 0) /* check result */
4602 {
4603 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4604
4605 return 1; /* return error */
4606 }
4607
4608 return 0; /* success return 0 */
4609}
4610
4623uint8_t sx1262_set_tx_clamp_config(sx1262_handle_t *handle, uint8_t config)
4624{
4625 uint8_t res;
4626
4627 if (handle == NULL) /* check handle */
4628 {
4629 return 2; /* return error */
4630 }
4631 if (handle->inited != 1) /* check handle initialization */
4632 {
4633 return 3; /* return error */
4634 }
4635
4636 res = a_sx1262_check_busy(handle); /* check busy */
4637 if (res != 0) /* check result */
4638 {
4639 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4640
4641 return 4; /* return error */
4642 }
4643
4644 res = a_sx1262_spi_write_register(handle, SX1262_REG_TX_CLAMP_CONFIG, (uint8_t *)&config, 1); /* write register */
4645 if (res != 0) /* check result */
4646 {
4647 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4648
4649 return 1; /* return error */
4650 }
4651
4652 return 0; /* success return 0 */
4653}
4654
4667uint8_t sx1262_get_tx_clamp_config(sx1262_handle_t *handle, uint8_t *config)
4668{
4669 uint8_t res;
4670
4671 if (handle == NULL) /* check handle */
4672 {
4673 return 2; /* return error */
4674 }
4675 if (handle->inited != 1) /* check handle initialization */
4676 {
4677 return 3; /* return error */
4678 }
4679
4680 res = a_sx1262_check_busy(handle); /* check busy */
4681 if (res != 0) /* check result */
4682 {
4683 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4684
4685 return 4; /* return error */
4686 }
4687
4688 res = a_sx1262_spi_read_register(handle, SX1262_REG_TX_CLAMP_CONFIG, (uint8_t *)config, 1); /* read register */
4689 if (res != 0) /* check result */
4690 {
4691 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4692
4693 return 1; /* return error */
4694 }
4695
4696 return 0; /* success return 0 */
4697}
4698
4711uint8_t sx1262_set_ocp(sx1262_handle_t *handle, uint8_t ocp)
4712{
4713 uint8_t res;
4714
4715 if (handle == NULL) /* check handle */
4716 {
4717 return 2; /* return error */
4718 }
4719 if (handle->inited != 1) /* check handle initialization */
4720 {
4721 return 3; /* return error */
4722 }
4723
4724 res = a_sx1262_check_busy(handle); /* check busy */
4725 if (res != 0) /* check result */
4726 {
4727 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4728
4729 return 4; /* return error */
4730 }
4731
4732 res = a_sx1262_spi_write_register(handle, SX1262_REG_OCP_CONFIGURATION, (uint8_t *)&ocp, 1); /* write register */
4733 if (res != 0) /* check result */
4734 {
4735 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4736
4737 return 1; /* return error */
4738 }
4739
4740 return 0; /* success return 0 */
4741}
4742
4755uint8_t sx1262_get_ocp(sx1262_handle_t *handle, uint8_t *ocp)
4756{
4757 uint8_t res;
4758
4759 if (handle == NULL) /* check handle */
4760 {
4761 return 2; /* return error */
4762 }
4763 if (handle->inited != 1) /* check handle initialization */
4764 {
4765 return 3; /* return error */
4766 }
4767
4768 res = a_sx1262_check_busy(handle); /* check busy */
4769 if (res != 0) /* check result */
4770 {
4771 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4772
4773 return 4; /* return error */
4774 }
4775
4776 res = a_sx1262_spi_read_register(handle, SX1262_REG_OCP_CONFIGURATION, (uint8_t *)ocp, 1); /* read register */
4777 if (res != 0) /* check result */
4778 {
4779 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4780
4781 return 1; /* return error */
4782 }
4783
4784 return 0; /* success return 0 */
4785}
4786
4799uint8_t sx1262_set_rtc_control(sx1262_handle_t *handle, uint8_t control)
4800{
4801 uint8_t res;
4802
4803 if (handle == NULL) /* check handle */
4804 {
4805 return 2; /* return error */
4806 }
4807 if (handle->inited != 1) /* check handle initialization */
4808 {
4809 return 3; /* return error */
4810 }
4811
4812 res = a_sx1262_check_busy(handle); /* check busy */
4813 if (res != 0) /* check result */
4814 {
4815 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4816
4817 return 4; /* return error */
4818 }
4819
4820 res = a_sx1262_spi_write_register(handle, SX1262_REG_RTC_CONTROL, (uint8_t *)&control, 1); /* write register */
4821 if (res != 0) /* check result */
4822 {
4823 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4824
4825 return 1; /* return error */
4826 }
4827
4828 return 0; /* success return 0 */
4829}
4830
4843uint8_t sx1262_get_rtc_control(sx1262_handle_t *handle, uint8_t *control)
4844{
4845 uint8_t res;
4846
4847 if (handle == NULL) /* check handle */
4848 {
4849 return 2; /* return error */
4850 }
4851 if (handle->inited != 1) /* check handle initialization */
4852 {
4853 return 3; /* return error */
4854 }
4855
4856 res = a_sx1262_check_busy(handle); /* check busy */
4857 if (res != 0) /* check result */
4858 {
4859 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4860
4861 return 4; /* return error */
4862 }
4863
4864 res = a_sx1262_spi_read_register(handle, SX1262_REG_RTC_CONTROL, (uint8_t *)control, 1); /* read register */
4865 if (res != 0) /* check result */
4866 {
4867 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4868
4869 return 1; /* return error */
4870 }
4871
4872 return 0; /* success return 0 */
4873}
4874
4887uint8_t sx1262_set_xta_trim(sx1262_handle_t *handle, uint8_t trim)
4888{
4889 uint8_t res;
4890
4891 if (handle == NULL) /* check handle */
4892 {
4893 return 2; /* return error */
4894 }
4895 if (handle->inited != 1) /* check handle initialization */
4896 {
4897 return 3; /* return error */
4898 }
4899
4900 res = a_sx1262_check_busy(handle); /* check busy */
4901 if (res != 0) /* check result */
4902 {
4903 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4904
4905 return 4; /* return error */
4906 }
4907
4908 res = a_sx1262_spi_write_register(handle, SX1262_REG_XTA_TRIM, (uint8_t *)&trim, 1); /* write register */
4909 if (res != 0) /* check result */
4910 {
4911 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
4912
4913 return 1; /* return error */
4914 }
4915
4916 return 0; /* success return 0 */
4917}
4918
4931uint8_t sx1262_get_xta_trim(sx1262_handle_t *handle, uint8_t *trim)
4932{
4933 uint8_t res;
4934
4935 if (handle == NULL) /* check handle */
4936 {
4937 return 2; /* return error */
4938 }
4939 if (handle->inited != 1) /* check handle initialization */
4940 {
4941 return 3; /* return error */
4942 }
4943
4944 res = a_sx1262_check_busy(handle); /* check busy */
4945 if (res != 0) /* check result */
4946 {
4947 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4948
4949 return 4; /* return error */
4950 }
4951
4952 res = a_sx1262_spi_read_register(handle, SX1262_REG_XTA_TRIM, (uint8_t *)trim, 1); /* read register */
4953 if (res != 0) /* check result */
4954 {
4955 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
4956
4957 return 1; /* return error */
4958 }
4959
4960 return 0; /* success return 0 */
4961}
4962
4975uint8_t sx1262_set_xtb_trim(sx1262_handle_t *handle, uint8_t trim)
4976{
4977 uint8_t res;
4978
4979 if (handle == NULL) /* check handle */
4980 {
4981 return 2; /* return error */
4982 }
4983 if (handle->inited != 1) /* check handle initialization */
4984 {
4985 return 3; /* return error */
4986 }
4987
4988 res = a_sx1262_check_busy(handle); /* check busy */
4989 if (res != 0) /* check result */
4990 {
4991 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
4992
4993 return 4; /* return error */
4994 }
4995
4996 res = a_sx1262_spi_write_register(handle, SX1262_REG_XTB_TRIM, (uint8_t *)&trim, 1); /* write register */
4997 if (res != 0) /* check result */
4998 {
4999 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5000
5001 return 1; /* return error */
5002 }
5003
5004 return 0; /* success return 0 */
5005}
5006
5019uint8_t sx1262_get_xtb_trim(sx1262_handle_t *handle, uint8_t *trim)
5020{
5021 uint8_t res;
5022
5023 if (handle == NULL) /* check handle */
5024 {
5025 return 2; /* return error */
5026 }
5027 if (handle->inited != 1) /* check handle initialization */
5028 {
5029 return 3; /* return error */
5030 }
5031
5032 res = a_sx1262_check_busy(handle); /* check busy */
5033 if (res != 0) /* check result */
5034 {
5035 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5036
5037 return 4; /* return error */
5038 }
5039
5040 res = a_sx1262_spi_read_register(handle, SX1262_REG_XTB_TRIM, (uint8_t *)trim, 1); /* read register */
5041 if (res != 0) /* check result */
5042 {
5043 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5044
5045 return 1; /* return error */
5046 }
5047
5048 return 0; /* success return 0 */
5049}
5050
5063uint8_t sx1262_set_dio3_output_control(sx1262_handle_t *handle, uint8_t control)
5064{
5065 uint8_t res;
5066
5067 if (handle == NULL) /* check handle */
5068 {
5069 return 2; /* return error */
5070 }
5071 if (handle->inited != 1) /* check handle initialization */
5072 {
5073 return 3; /* return error */
5074 }
5075
5076 res = a_sx1262_check_busy(handle); /* check busy */
5077 if (res != 0) /* check result */
5078 {
5079 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5080
5081 return 4; /* return error */
5082 }
5083
5084 res = a_sx1262_spi_write_register(handle, SX1262_REG_DIO3_OUTPUT_CONTROL, (uint8_t *)&control, 1); /* write register */
5085 if (res != 0) /* check result */
5086 {
5087 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5088
5089 return 1; /* return error */
5090 }
5091
5092 return 0; /* success return 0 */
5093}
5094
5107uint8_t sx1262_get_dio3_output_control(sx1262_handle_t *handle, uint8_t *control)
5108{
5109 uint8_t res;
5110
5111 if (handle == NULL) /* check handle */
5112 {
5113 return 2; /* return error */
5114 }
5115 if (handle->inited != 1) /* check handle initialization */
5116 {
5117 return 3; /* return error */
5118 }
5119
5120 res = a_sx1262_check_busy(handle); /* check busy */
5121 if (res != 0) /* check result */
5122 {
5123 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5124
5125 return 4; /* return error */
5126 }
5127
5128 res = a_sx1262_spi_read_register(handle, SX1262_REG_DIO3_OUTPUT_CONTROL, (uint8_t *)control, 1); /* read register */
5129 if (res != 0) /* check result */
5130 {
5131 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5132
5133 return 1; /* return error */
5134 }
5135
5136 return 0; /* success return 0 */
5137}
5138
5151uint8_t sx1262_set_event_mask(sx1262_handle_t *handle, uint8_t mask)
5152{
5153 uint8_t res;
5154
5155 if (handle == NULL) /* check handle */
5156 {
5157 return 2; /* return error */
5158 }
5159 if (handle->inited != 1) /* check handle initialization */
5160 {
5161 return 3; /* return error */
5162 }
5163
5164 res = a_sx1262_check_busy(handle); /* check busy */
5165 if (res != 0) /* check result */
5166 {
5167 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5168
5169 return 4; /* return error */
5170 }
5171
5172 res = a_sx1262_spi_write_register(handle, SX1262_REG_EVENT_MASK, (uint8_t *)&mask, 1); /* write register */
5173 if (res != 0) /* check result */
5174 {
5175 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5176
5177 return 1; /* return error */
5178 }
5179
5180 return 0; /* success return 0 */
5181}
5182
5195uint8_t sx1262_get_event_mask(sx1262_handle_t *handle, uint8_t *mask)
5196{
5197 uint8_t res;
5198
5199 if (handle == NULL) /* check handle */
5200 {
5201 return 2; /* return error */
5202 }
5203 if (handle->inited != 1) /* check handle initialization */
5204 {
5205 return 3; /* return error */
5206 }
5207
5208 res = a_sx1262_check_busy(handle); /* check busy */
5209 if (res != 0) /* check result */
5210 {
5211 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5212
5213 return 4; /* return error */
5214 }
5215
5216 res = a_sx1262_spi_read_register(handle, SX1262_REG_EVENT_MASK, (uint8_t *)mask, 1); /* read register */
5217 if (res != 0) /* check result */
5218 {
5219 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5220
5221 return 1; /* return error */
5222 }
5223
5224 return 0; /* success return 0 */
5225}
5226
5239uint8_t sx1262_set_dio_output_enable(sx1262_handle_t *handle, uint8_t enable)
5240{
5241 uint8_t res;
5242
5243 if (handle == NULL) /* check handle */
5244 {
5245 return 2; /* return error */
5246 }
5247 if (handle->inited != 1) /* check handle initialization */
5248 {
5249 return 3; /* return error */
5250 }
5251
5252 res = a_sx1262_check_busy(handle); /* check busy */
5253 if (res != 0) /* check result */
5254 {
5255 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5256
5257 return 4; /* return error */
5258 }
5259
5260 res = a_sx1262_spi_write_register(handle, SX1262_REG_DIOX_OUTPUT_ENABLE, (uint8_t *)&enable, 1); /* write register */
5261 if (res != 0) /* check result */
5262 {
5263 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5264
5265 return 1; /* return error */
5266 }
5267
5268 return 0; /* success return 0 */
5269}
5270
5283uint8_t sx1262_get_dio_output_enable(sx1262_handle_t *handle, uint8_t *enable)
5284{
5285 uint8_t res;
5286
5287 if (handle == NULL) /* check handle */
5288 {
5289 return 2; /* return error */
5290 }
5291 if (handle->inited != 1) /* check handle initialization */
5292 {
5293 return 3; /* return error */
5294 }
5295
5296 res = a_sx1262_check_busy(handle); /* check busy */
5297 if (res != 0) /* check result */
5298 {
5299 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5300
5301 return 4; /* return error */
5302 }
5303
5304 res = a_sx1262_spi_read_register(handle, SX1262_REG_DIOX_OUTPUT_ENABLE, (uint8_t *)enable, 1); /* read register */
5305 if (res != 0) /* check result */
5306 {
5307 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5308
5309 return 1; /* return error */
5310 }
5311
5312 return 0; /* success return 0 */
5313}
5314
5327uint8_t sx1262_set_dio_input_enable(sx1262_handle_t *handle, uint8_t enable)
5328{
5329 uint8_t res;
5330
5331 if (handle == NULL) /* check handle */
5332 {
5333 return 2; /* return error */
5334 }
5335 if (handle->inited != 1) /* check handle initialization */
5336 {
5337 return 3; /* return error */
5338 }
5339
5340 res = a_sx1262_check_busy(handle); /* check busy */
5341 if (res != 0) /* check result */
5342 {
5343 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5344
5345 return 4; /* return error */
5346 }
5347
5348 res = a_sx1262_spi_write_register(handle, SX1262_REG_DIOX_INPUT_ENABLE, (uint8_t *)&enable, 1); /* write register */
5349 if (res != 0) /* check result */
5350 {
5351 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5352
5353 return 1; /* return error */
5354 }
5355
5356 return 0; /* success return 0 */
5357}
5358
5371uint8_t sx1262_get_dio_input_enable(sx1262_handle_t *handle, uint8_t *enable)
5372{
5373 uint8_t res;
5374
5375 if (handle == NULL) /* check handle */
5376 {
5377 return 2; /* return error */
5378 }
5379 if (handle->inited != 1) /* check handle initialization */
5380 {
5381 return 3; /* return error */
5382 }
5383
5384 res = a_sx1262_check_busy(handle); /* check busy */
5385 if (res != 0) /* check result */
5386 {
5387 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5388
5389 return 4; /* return error */
5390 }
5391
5392 res = a_sx1262_spi_read_register(handle, SX1262_REG_DIOX_INPUT_ENABLE, (uint8_t *)enable, 1); /* read register */
5393 if (res != 0) /* check result */
5394 {
5395 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5396
5397 return 1; /* return error */
5398 }
5399
5400 return 0; /* success return 0 */
5401}
5402
5415uint8_t sx1262_set_pull_up_control(sx1262_handle_t *handle, uint8_t control)
5416{
5417 uint8_t res;
5418
5419 if (handle == NULL) /* check handle */
5420 {
5421 return 2; /* return error */
5422 }
5423 if (handle->inited != 1) /* check handle initialization */
5424 {
5425 return 3; /* return error */
5426 }
5427
5428 res = a_sx1262_check_busy(handle); /* check busy */
5429 if (res != 0) /* check result */
5430 {
5431 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5432
5433 return 4; /* return error */
5434 }
5435
5436 res = a_sx1262_spi_write_register(handle, SX1262_REG_DIOX_PULL_UP_CONTROL, (uint8_t *)&control, 1); /* write register */
5437 if (res != 0) /* check result */
5438 {
5439 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5440
5441 return 1; /* return error */
5442 }
5443
5444 return 0; /* success return 0 */
5445}
5446
5459uint8_t sx1262_get_pull_up_control(sx1262_handle_t *handle, uint8_t *control)
5460{
5461 uint8_t res;
5462
5463 if (handle == NULL) /* check handle */
5464 {
5465 return 2; /* return error */
5466 }
5467 if (handle->inited != 1) /* check handle initialization */
5468 {
5469 return 3; /* return error */
5470 }
5471
5472 res = a_sx1262_check_busy(handle); /* check busy */
5473 if (res != 0) /* check result */
5474 {
5475 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5476
5477 return 4; /* return error */
5478 }
5479
5480 res = a_sx1262_spi_read_register(handle, SX1262_REG_DIOX_PULL_UP_CONTROL, (uint8_t *)control, 1); /* read register */
5481 if (res != 0) /* check result */
5482 {
5483 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5484
5485 return 1; /* return error */
5486 }
5487
5488 return 0; /* success return 0 */
5489}
5490
5503uint8_t sx1262_set_pull_down_control(sx1262_handle_t *handle, uint8_t control)
5504{
5505 uint8_t res;
5506
5507 if (handle == NULL) /* check handle */
5508 {
5509 return 2; /* return error */
5510 }
5511 if (handle->inited != 1) /* check handle initialization */
5512 {
5513 return 3; /* return error */
5514 }
5515
5516 res = a_sx1262_check_busy(handle); /* check busy */
5517 if (res != 0) /* check result */
5518 {
5519 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5520
5521 return 4; /* return error */
5522 }
5523
5524 res = a_sx1262_spi_write_register(handle, SX1262_REG_DIOX_PULL_DOWN_CONTROL, (uint8_t *)&control, 1); /* write register */
5525 if (res != 0) /* check result */
5526 {
5527 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5528
5529 return 1; /* return error */
5530 }
5531
5532 return 0; /* success return 0 */
5533}
5534
5547uint8_t sx1262_get_pull_down_control(sx1262_handle_t *handle, uint8_t *control)
5548{
5549 uint8_t res;
5550
5551 if (handle == NULL) /* check handle */
5552 {
5553 return 2; /* return error */
5554 }
5555 if (handle->inited != 1) /* check handle initialization */
5556 {
5557 return 3; /* return error */
5558 }
5559
5560 res = a_sx1262_check_busy(handle); /* check busy */
5561 if (res != 0) /* check result */
5562 {
5563 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5564
5565 return 4; /* return error */
5566 }
5567
5568 res = a_sx1262_spi_read_register(handle, SX1262_REG_DIOX_PULL_DOWN_CONTROL, (uint8_t *)control, 1); /* read register */
5569 if (res != 0) /* check result */
5570 {
5571 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5572
5573 return 1; /* return error */
5574 }
5575
5576 return 0; /* success return 0 */
5577}
5578
5591uint8_t sx1262_set_fhss_hopping_enable(sx1262_handle_t *handle, uint8_t enable)
5592{
5593 uint8_t res;
5594
5595 if (handle == NULL) /* check handle */
5596 {
5597 return 2; /* return error */
5598 }
5599 if (handle->inited != 1) /* check handle initialization */
5600 {
5601 return 3; /* return error */
5602 }
5603
5604 res = a_sx1262_check_busy(handle); /* check busy */
5605 if (res != 0) /* check result */
5606 {
5607 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5608
5609 return 4; /* return error */
5610 }
5611
5612 res = a_sx1262_spi_write_register(handle, SX1262_REG_HOPPING_ENABLE, (uint8_t *)&enable, 1); /* write register */
5613 if (res != 0) /* check result */
5614 {
5615 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5616
5617 return 1; /* return error */
5618 }
5619
5620 return 0; /* success return 0 */
5621}
5622
5635uint8_t sx1262_get_fhss_hopping_enable(sx1262_handle_t *handle, uint8_t *enable)
5636{
5637 uint8_t res;
5638
5639 if (handle == NULL) /* check handle */
5640 {
5641 return 2; /* return error */
5642 }
5643 if (handle->inited != 1) /* check handle initialization */
5644 {
5645 return 3; /* return error */
5646 }
5647
5648 res = a_sx1262_check_busy(handle); /* check busy */
5649 if (res != 0) /* check result */
5650 {
5651 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5652
5653 return 4; /* return error */
5654 }
5655
5656 res = a_sx1262_spi_read_register(handle, SX1262_REG_HOPPING_ENABLE, (uint8_t *)enable, 1); /* read register */
5657 if (res != 0) /* check result */
5658 {
5659 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5660
5661 return 1; /* return error */
5662 }
5663
5664 return 0; /* success return 0 */
5665}
5666
5680{
5681 uint8_t res;
5682
5683 if (handle == NULL) /* check handle */
5684 {
5685 return 2; /* return error */
5686 }
5687 if (handle->inited != 1) /* check handle initialization */
5688 {
5689 return 3; /* return error */
5690 }
5691
5692 res = a_sx1262_check_busy(handle); /* check busy */
5693 if (res != 0) /* check result */
5694 {
5695 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5696
5697 return 4; /* return error */
5698 }
5699
5700 res = a_sx1262_spi_write_register(handle, SX1262_REG_PACKET_LENGTH, (uint8_t *)&len, 1); /* write register */
5701 if (res != 0) /* check result */
5702 {
5703 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5704
5705 return 1; /* return error */
5706 }
5707
5708 return 0; /* success return 0 */
5709}
5710
5724{
5725 uint8_t res;
5726
5727 if (handle == NULL) /* check handle */
5728 {
5729 return 2; /* return error */
5730 }
5731 if (handle->inited != 1) /* check handle initialization */
5732 {
5733 return 3; /* return error */
5734 }
5735
5736 res = a_sx1262_check_busy(handle); /* check busy */
5737 if (res != 0) /* check result */
5738 {
5739 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5740
5741 return 4; /* return error */
5742 }
5743
5744 res = a_sx1262_spi_read_register(handle, SX1262_REG_PACKET_LENGTH, (uint8_t *)len, 1); /* read register */
5745 if (res != 0) /* check result */
5746 {
5747 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5748
5749 return 1; /* return error */
5750 }
5751
5752 return 0; /* success return 0 */
5753}
5754
5768{
5769 uint8_t res;
5770
5771 if (handle == NULL) /* check handle */
5772 {
5773 return 2; /* return error */
5774 }
5775 if (handle->inited != 1) /* check handle initialization */
5776 {
5777 return 3; /* return error */
5778 }
5779
5780 res = a_sx1262_check_busy(handle); /* check busy */
5781 if (res != 0) /* check result */
5782 {
5783 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5784
5785 return 4; /* return error */
5786 }
5787
5788 res = a_sx1262_spi_write_register(handle, SX1262_REG_NB_HOPPING_BLOCKS, (uint8_t *)&n, 1); /* write register */
5789 if (res != 0) /* check result */
5790 {
5791 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5792
5793 return 1; /* return error */
5794 }
5795
5796 return 0; /* success return 0 */
5797}
5798
5812{
5813 uint8_t res;
5814
5815 if (handle == NULL) /* check handle */
5816 {
5817 return 2; /* return error */
5818 }
5819 if (handle->inited != 1) /* check handle initialization */
5820 {
5821 return 3; /* return error */
5822 }
5823
5824 res = a_sx1262_check_busy(handle); /* check busy */
5825 if (res != 0) /* check result */
5826 {
5827 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5828
5829 return 4; /* return error */
5830 }
5831
5832 res = a_sx1262_spi_read_register(handle, SX1262_REG_NB_HOPPING_BLOCKS, (uint8_t *)n, 1); /* read register */
5833 if (res != 0) /* check result */
5834 {
5835 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5836
5837 return 1; /* return error */
5838 }
5839
5840 return 0; /* success return 0 */
5841}
5842
5856{
5857 uint8_t res;
5858 uint8_t buf[2];
5859
5860 if (handle == NULL) /* check handle */
5861 {
5862 return 2; /* return error */
5863 }
5864 if (handle->inited != 1) /* check handle initialization */
5865 {
5866 return 3; /* return error */
5867 }
5868
5869 res = a_sx1262_check_busy(handle); /* check busy */
5870 if (res != 0) /* check result */
5871 {
5872 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5873
5874 return 4; /* return error */
5875 }
5876
5877 buf[0] = (num >> 8) & 0xFF; /* set msb */
5878 buf[1] = (num >> 0) & 0xFF; /* set lsb */
5879 res = a_sx1262_spi_write_register(handle, SX1262_REG_NB_SYMBOLS_0, buf, 2); /* write register */
5880 if (res != 0) /* check result */
5881 {
5882 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5883
5884 return 1; /* return error */
5885 }
5886
5887 return 0; /* success return 0 */
5888}
5889
5902uint8_t sx1262_get_fhss_symbols_freq0(sx1262_handle_t *handle, uint16_t *num)
5903{
5904 uint8_t res;
5905 uint8_t buf[2];
5906
5907 if (handle == NULL) /* check handle */
5908 {
5909 return 2; /* return error */
5910 }
5911 if (handle->inited != 1) /* check handle initialization */
5912 {
5913 return 3; /* return error */
5914 }
5915
5916 res = a_sx1262_check_busy(handle); /* check busy */
5917 if (res != 0) /* check result */
5918 {
5919 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5920
5921 return 4; /* return error */
5922 }
5923
5924 res = a_sx1262_spi_read_register(handle, SX1262_REG_NB_SYMBOLS_0, buf, 2); /* read register */
5925 if (res != 0) /* check result */
5926 {
5927 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
5928
5929 return 1; /* return error */
5930 }
5931 *num = (uint16_t)(buf[0]) << 8 | buf[1]; /* get number */
5932
5933 return 0; /* success return 0 */
5934}
5935
5948uint8_t sx1262_set_fhss_freq0(sx1262_handle_t *handle, uint32_t freq)
5949{
5950 uint8_t res;
5951 uint8_t buf[4];
5952
5953 if (handle == NULL) /* check handle */
5954 {
5955 return 2; /* return error */
5956 }
5957 if (handle->inited != 1) /* check handle initialization */
5958 {
5959 return 3; /* return error */
5960 }
5961
5962 res = a_sx1262_check_busy(handle); /* check busy */
5963 if (res != 0) /* check result */
5964 {
5965 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
5966
5967 return 4; /* return error */
5968 }
5969
5970 buf[0] = (freq >> 24) & 0xFF; /* set part0 */
5971 buf[1] = (freq >> 16) & 0xFF; /* set part1 */
5972 buf[2] = (freq >> 8) & 0xFF; /* set part2 */
5973 buf[3] = (freq >> 0) & 0xFF; /* set part3 */
5974 res = a_sx1262_spi_write_register(handle, SX1262_REG_FREQ_0, buf, 4); /* write register */
5975 if (res != 0) /* check result */
5976 {
5977 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
5978
5979 return 1; /* return error */
5980 }
5981
5982 return 0; /* success return 0 */
5983}
5984
5997uint8_t sx1262_get_fhss_freq0(sx1262_handle_t *handle, uint32_t *freq)
5998{
5999 uint8_t res;
6000 uint8_t buf[4];
6001
6002 if (handle == NULL) /* check handle */
6003 {
6004 return 2; /* return error */
6005 }
6006 if (handle->inited != 1) /* check handle initialization */
6007 {
6008 return 3; /* return error */
6009 }
6010
6011 res = a_sx1262_check_busy(handle); /* check busy */
6012 if (res != 0) /* check result */
6013 {
6014 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
6015
6016 return 4; /* return error */
6017 }
6018
6019 res = a_sx1262_spi_read_register(handle, SX1262_REG_FREQ_0, buf, 4); /* read register */
6020 if (res != 0) /* check result */
6021 {
6022 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
6023
6024 return 1; /* return error */
6025 }
6026 *freq = (uint32_t)(buf[0]) << 24 | (uint32_t)(buf[1]) << 16 |
6027 (uint32_t)(buf[2]) << 8 | (uint32_t)(buf[3]) << 0; /* get freq */
6028
6029 return 0; /* success return 0 */
6030}
6031
6045{
6046 uint8_t res;
6047 uint8_t buf[2];
6048
6049 if (handle == NULL) /* check handle */
6050 {
6051 return 2; /* return error */
6052 }
6053 if (handle->inited != 1) /* check handle initialization */
6054 {
6055 return 3; /* return error */
6056 }
6057
6058 res = a_sx1262_check_busy(handle); /* check busy */
6059 if (res != 0) /* check result */
6060 {
6061 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
6062
6063 return 4; /* return error */
6064 }
6065
6066 buf[0] = (num >> 8) & 0xFF; /* set msb */
6067 buf[1] = (num >> 0) & 0xFF; /* set lsb */
6068 res = a_sx1262_spi_write_register(handle, SX1262_REG_NB_SYMBOLS_15, buf, 2); /* write register */
6069 if (res != 0) /* check result */
6070 {
6071 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
6072
6073 return 1; /* return error */
6074 }
6075
6076 return 0; /* success return 0 */
6077}
6078
6092{
6093 uint8_t res;
6094 uint8_t buf[2];
6095
6096 if (handle == NULL) /* check handle */
6097 {
6098 return 2; /* return error */
6099 }
6100 if (handle->inited != 1) /* check handle initialization */
6101 {
6102 return 3; /* return error */
6103 }
6104
6105 res = a_sx1262_check_busy(handle); /* check busy */
6106 if (res != 0) /* check result */
6107 {
6108 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
6109
6110 return 4; /* return error */
6111 }
6112
6113 res = a_sx1262_spi_read_register(handle, SX1262_REG_NB_SYMBOLS_15, buf, 2); /* read register */
6114 if (res != 0) /* check result */
6115 {
6116 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
6117
6118 return 1; /* return error */
6119 }
6120 *num = (uint16_t)(buf[0]) << 8 | buf[1]; /* get number */
6121
6122 return 0; /* success return 0 */
6123}
6124
6137uint8_t sx1262_set_fhss_freq15(sx1262_handle_t *handle, uint32_t freq)
6138{
6139 uint8_t res;
6140 uint8_t buf[4];
6141
6142 if (handle == NULL) /* check handle */
6143 {
6144 return 2; /* return error */
6145 }
6146 if (handle->inited != 1) /* check handle initialization */
6147 {
6148 return 3; /* return error */
6149 }
6150
6151 res = a_sx1262_check_busy(handle); /* check busy */
6152 if (res != 0) /* check result */
6153 {
6154 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
6155
6156 return 4; /* return error */
6157 }
6158
6159 buf[0] = (freq >> 24) & 0xFF; /* set part0 */
6160 buf[1] = (freq >> 16) & 0xFF; /* set part1 */
6161 buf[2] = (freq >> 8) & 0xFF; /* set part2 */
6162 buf[3] = (freq >> 0) & 0xFF; /* set part3 */
6163 res = a_sx1262_spi_write_register(handle, SX1262_REG_FREQ_15, buf, 4); /* write register */
6164 if (res != 0) /* check result */
6165 {
6166 handle->debug_print("sx1262: write register failed.\n"); /* write register failed */
6167
6168 return 1; /* return error */
6169 }
6170
6171 return 0; /* success return 0 */
6172}
6173
6186uint8_t sx1262_get_fhss_freq15(sx1262_handle_t *handle, uint32_t *freq)
6187{
6188 uint8_t res;
6189 uint8_t buf[4];
6190
6191 if (handle == NULL) /* check handle */
6192 {
6193 return 2; /* return error */
6194 }
6195 if (handle->inited != 1) /* check handle initialization */
6196 {
6197 return 3; /* return error */
6198 }
6199
6200 res = a_sx1262_check_busy(handle); /* check busy */
6201 if (res != 0) /* check result */
6202 {
6203 handle->debug_print("sx1262: chip is busy.\n"); /* chip is busy */
6204
6205 return 4; /* return error */
6206 }
6207
6208 res = a_sx1262_spi_read_register(handle, SX1262_REG_FREQ_15, buf, 4); /* read register */
6209 if (res != 0) /* check result */
6210 {
6211 handle->debug_print("sx1262: read register failed.\n"); /* read register failed */
6212
6213 return 1; /* return error */
6214 }
6215 *freq = (uint32_t)(buf[0]) << 24 | (uint32_t)(buf[1]) << 16 |
6216 (uint32_t)(buf[2]) << 8 | (uint32_t)(buf[3]) << 0; /* get freq */
6217
6218 return 0; /* success return 0 */
6219}
6220
6235uint8_t sx1262_write_read_reg(sx1262_handle_t *handle, uint8_t *in_buf, uint32_t in_len,
6236 uint8_t *out_buf, uint32_t out_len)
6237{
6238
6239 if (handle == NULL) /* check handle */
6240 {
6241 return 2; /* return error */
6242 }
6243 if (handle->inited != 1) /* check handle initialization */
6244 {
6245 return 3; /* return error */
6246 }
6247
6248 if (handle->spi_write_read(in_buf, in_len, out_buf, out_len) != 0) /* spi read */
6249 {
6250 return 1; /* return error */
6251 }
6252 else
6253 {
6254 return 0; /* success return 0 */
6255 }
6256}
6257
6267{
6268 if (info == NULL) /* check handle */
6269 {
6270 return 2; /* return error */
6271 }
6272
6273 memset(info, 0, sizeof(sx1262_info_t)); /* initialize sx1262 info structure */
6274 strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
6275 strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
6276 strncpy(info->interface, "SPI", 8); /* copy interface name */
6277 info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
6278 info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
6279 info->max_current_ma = MAX_CURRENT; /* set maximum current */
6280 info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
6281 info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
6282 info->driver_version = DRIVER_VERSION; /* set driver version */
6283
6284 return 0; /* success return 0 */
6285}
#define SX1262_REG_DIOX_PULL_UP_CONTROL
#define SX1262_COMMAND_SET_FS
#define SX1262_COMMAND_SET_CAD_PARAMS
#define SX1262_COMMAND_SET_CAD
#define SX1262_REG_CRC_POLYNOMIAL_VALUE_MSB
#define SX1262_COMMAND_WRITE_REGISTER
#define SX1262_REG_FREQ_0
#define MAX_CURRENT
#define SX1262_COMMAND_SET_BUFFER_BASE_ADDRESS
#define SX1262_REG_TX_MODULATION
#define SX1262_COMMAND_SET_STANDBY
#define SX1262_COMMAND_WRITE_BUFFER
#define SX1262_COMMAND_RESET_STATS
#define SX1262_COMMAND_SET_TX_INFINITE_PREAMBLE
#define SX1262_REG_NB_SYMBOLS_0
#define SX1262_REG_WHITENING_INIT_VALUE_MSB
#define SX1262_COMMAND_SET_PACKET_PARAMS
#define SX1262_REG_LORA_SYNC_WORD_MSB
#define SX1262_REG_NODE_ADDRESS
#define SX1262_REG_NB_HOPPING_BLOCKS
#define SX1262_COMMAND_SET_DIO_IRQ_PARAMS
#define SX1262_COMMAND_GET_STATS
#define SX1262_COMMAND_SET_TX
#define SX1262_REG_CRC_INIT_VALUE_MSB
#define SX1262_COMMAND_STOP_TIMER_ON_PREAMBLE
#define SX1262_COMMAND_SET_TX_PARAMS
#define SUPPLY_VOLTAGE_MAX
#define SX1262_REG_DIO3_OUTPUT_CONTROL
#define SX1262_COMMAND_GET_STATUS
#define SX1262_REG_SYNC_WORD_0
#define SX1262_REG_HOPPING_ENABLE
chip register definition
#define SX1262_REG_RX_GAIN
#define SX1262_COMMAND_SET_MODULATION_PARAMS
#define SX1262_COMMAND_SET_RX_DUTY_CYCLE
#define SX1262_COMMAND_GET_PACKET_TYPE
#define SX1262_COMMAND_SET_CALIBRATE_IMAGE
#define SX1262_REG_IQ_POLARITY_SETUP
#define SX1262_REG_DIOX_INPUT_ENABLE
#define SX1262_REG_XTB_TRIM
#define SX1262_COMMAND_SET_RF_FREQUENCY
#define TEMPERATURE_MAX
#define SX1262_COMMAND_SET_LORA_SYMB_NUM_TIMEOUT
#define SX1262_COMMAND_GET_DEVICE_ERRORS
#define SX1262_REG_PACKET_LENGTH
#define SX1262_COMMAND_GET_RSSI_LNST
#define SX1262_COMMAND_CLEAR_DEVICE_ERRORS
#define SX1262_REG_DIOX_PULL_DOWN_CONTROL
#define SX1262_REG_TX_CLAMP_CONFIG
#define SX1262_REG_FREQ_15
#define SX1262_COMMAND_SET_CALIBRATE
#define SX1262_REG_OCP_CONFIGURATION
#define SX1262_COMMAND_SET_RX
#define MANUFACTURER_NAME
#define TEMPERATURE_MIN
#define SX1262_REG_EVENT_MASK
#define SUPPLY_VOLTAGE_MIN
#define SX1262_REG_XTA_TRIM
#define SX1262_COMMAND_READ_REGISTER
#define SX1262_REG_RANDOM_NUMBER_GEN_0
#define SX1262_COMMAND_READ_BUFFER
#define SX1262_COMMAND_GET_IRQ_STATUS
#define SX1262_COMMAND_CLEAR_IRQ_STATUS
#define SX1262_REG_NB_SYMBOLS_15
#define SX1262_COMMAND_SET_REGULATOR_MODE
#define SX1262_COMMAND_SET_TX_CONTINUOUS_WAVE
#define SX1262_COMMAND_SET_DIO3_AS_TCXO_CTRL
#define CHIP_NAME
chip information definition
#define SX1262_COMMAND_GET_PACKET_STATUS
#define SX1262_COMMAND_SET_PACKET_TYPE
#define DRIVER_VERSION
#define SX1262_COMMAND_SET_PA_CONFIG
#define SX1262_REG_BROADCAST_ADDRESS
#define SX1262_COMMAND_SET_SLEEP
chip command definition
#define SX1262_REG_DIOX_OUTPUT_ENABLE
#define SX1262_COMMAND_SET_DIO2_AS_RF_SWITCH_CTRL
#define SX1262_REG_RTC_CONTROL
#define SX1262_COMMAND_SET_RX_TX_FALLBACK_MODE
#define SX1262_COMMAND_GET_RX_BUFFER_STATUS
driver sx1262 header file
sx1262_lora_bandwidth_t
sx1262 lora bandwidth enumeration definition
sx1262_gfsk_packet_type_t
sx1262 gfsk packet type enumeration definition
uint8_t sx1262_set_lora_modulation_params(sx1262_handle_t *handle, sx1262_lora_sf_t sf, sx1262_lora_bandwidth_t bw, sx1262_lora_cr_t cr, sx1262_bool_t low_data_rate_optimize_enable)
set the modulation params in LoRa mode
sx1262_bool_t
sx1262 bool enumeration definition
uint8_t sx1262_set_tx_continuous_wave(sx1262_handle_t *handle)
enter to the tx continuous wave mode
uint8_t sx1262_gfsk_frequency_deviation_convert_to_register(sx1262_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency deviation to the register raw data
uint8_t sx1262_set_buffer_base_address(sx1262_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr)
set the buffer base address
uint8_t sx1262_get_gfsk_packet_status(sx1262_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw, uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg)
get the packet status in GFSK mode
uint8_t sx1262_clear_irq_status(sx1262_handle_t *handle, uint16_t clear_irq_param)
clear the irq status
sx1262_tcxo_voltage_t
sx1262 tcxo voltage enumeration definition
sx1262_lora_cad_exit_mode_t
sx1262 lora cad exit mode enumeration definition
sx1262_gfsk_bandwidth_t
sx1262 gfsk bandwidth enumeration definition
uint8_t sx1262_set_calibration_image(sx1262_handle_t *handle, uint8_t freq1, uint8_t freq2)
set the calibration image frequency
uint8_t sx1262_set_gfsk_packet_params(sx1262_handle_t *handle, uint16_t preamble_length, sx1262_gfsk_preamble_detector_length_t detector_length, uint8_t sync_word_length, sx1262_gfsk_addr_filter_t filter, sx1262_gfsk_packet_type_t packet_type, uint8_t payload_length, sx1262_gfsk_crc_type_t crc_type, sx1262_bool_t whitening_enable)
set the packet params in GFSK mode
uint8_t sx1262_set_rx_tx_fallback_mode(sx1262_handle_t *handle, sx1262_rx_tx_fallback_mode_t mode)
set the rx tx fallback mode
uint8_t sx1262_gfsk_bit_rate_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *br)
convert the register raw data to the bit rate
uint8_t sx1262_set_tx(sx1262_handle_t *handle, uint32_t timeout)
enter to the tx mode
uint8_t sx1262_set_rx(sx1262_handle_t *handle, uint32_t timeout)
enter to the rx mode
uint8_t sx1262_reset_stats(sx1262_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error)
reset the stats
sx1262_lora_sf_t
sx1262 lora spreading factor enumeration definition
uint8_t sx1262_set_sleep(sx1262_handle_t *handle, sx1262_start_mode_t mode, sx1262_bool_t rtc_wake_up_enable)
enter to the sleep mode
uint8_t sx1262_lora_transmit(sx1262_handle_t *handle, sx1262_clock_source_t standby_src, uint16_t preamble_length, sx1262_lora_header_t header_type, sx1262_lora_crc_type_t crc_type, sx1262_bool_t invert_iq_enable, uint8_t *buf, uint16_t len, uint32_t us)
send the lora data
uint8_t sx1262_read_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
read the buffer
struct sx1262_info_s sx1262_info_t
sx1262 information structure definition
struct sx1262_handle_s sx1262_handle_t
sx1262 handle structure definition
uint8_t sx1262_set_standby(sx1262_handle_t *handle, sx1262_clock_source_t src)
enter to the standby mode
uint8_t sx1262_set_tx_params(sx1262_handle_t *handle, int8_t dbm, sx1262_ramp_time_t t)
set the tx params
uint8_t sx1262_timeout_convert_to_data(sx1262_handle_t *handle, uint32_t reg, double *us)
convert the register raw data to the timeout
uint8_t sx1262_write_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
write the buffer
sx1262_ramp_time_t
sx1262 ramp time enumeration definition
uint8_t sx1262_get_rx_buffer_status(sx1262_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer)
get the rx buffer status
sx1262_rx_tx_fallback_mode_t
sx1262 rx tx fallback mode enumeration definition
uint8_t sx1262_get_irq_status(sx1262_handle_t *handle, uint16_t *status)
get the irq status
uint8_t sx1262_set_dio2_as_rf_switch_ctrl(sx1262_handle_t *handle, sx1262_bool_t enable)
set dio2 as rf switch ctrl
uint8_t sx1262_set_regulator_mode(sx1262_handle_t *handle, sx1262_regulator_mode_t mode)
set the regulator_mode
uint8_t sx1262_set_lora_packet_params(sx1262_handle_t *handle, uint16_t preamble_length, sx1262_lora_header_t header_type, uint8_t payload_length, sx1262_lora_crc_type_t crc_type, sx1262_bool_t invert_iq_enable)
set the packet params in LoRa mode
uint8_t sx1262_frequency_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *freq)
convert the register raw data to the frequency
sx1262_gfsk_pulse_shape_t
sx1262 gfsk pulse shape enumeration definition
sx1262_start_mode_t
sx1262 start mode enumeration definition
uint8_t sx1262_set_lora_symb_num_timeout(sx1262_handle_t *handle, uint8_t symb_num)
set the lora symbol number timeout
uint8_t sx1262_read_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
read the register
sx1262_packet_type_t
sx1262 packet type enumeration definition
uint8_t sx1262_gfsk_bit_rate_convert_to_register(sx1262_handle_t *handle, uint32_t br, uint32_t *reg)
convert the bit rate to the register raw data
uint8_t sx1262_irq_handler(sx1262_handle_t *handle)
irq handler
sx1262_lora_crc_type_t
sx1262 lora crc type enumeration definition
uint8_t sx1262_continuous_receive(sx1262_handle_t *handle)
enter to the continuous receive mode
uint8_t sx1262_gfsk_frequency_deviation_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *freq)
convert the register raw data to the frequency deviation
uint8_t sx1262_set_rx_duty_cycle(sx1262_handle_t *handle, uint32_t rx_period, uint32_t sleep_period)
set the rx duty cycle
uint8_t sx1262_set_pa_config(sx1262_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max)
set the pa config
uint8_t sx1262_single_receive(sx1262_handle_t *handle, double us)
enter to the single receive mode
uint8_t sx1262_set_gfsk_modulation_params(sx1262_handle_t *handle, uint32_t br, sx1262_gfsk_pulse_shape_t shape, sx1262_gfsk_bandwidth_t bw, uint32_t fdev)
set the modulation params in GFSK mode
sx1262_gfsk_addr_filter_t
sx1262 gfsk addr filter enumeration definition
sx1262_gfsk_preamble_detector_length_t
sx1262 gfsk preamble detector length enumeration definition
uint8_t sx1262_set_tx_infinite_preamble(sx1262_handle_t *handle)
enter to the tx infinite preamble mode
uint8_t sx1262_set_rf_frequency(sx1262_handle_t *handle, uint32_t reg)
set the rf frequency
uint8_t sx1262_set_packet_type(sx1262_handle_t *handle, sx1262_packet_type_t type)
set the packet type
uint8_t sx1262_set_dio3_as_tcxo_ctrl(sx1262_handle_t *handle, sx1262_tcxo_voltage_t voltage, uint32_t delay)
set dio3 as tcxo ctrl
uint8_t sx1262_set_cad(sx1262_handle_t *handle)
run the cad
sx1262_lora_header_t
sx1262 lora header enumeration definition
uint8_t sx1262_set_frequency_synthesis(sx1262_handle_t *handle)
enter to the frequency synthesis mode
uint8_t sx1262_get_status(sx1262_handle_t *handle, uint8_t *status)
get the status
uint8_t sx1262_get_lora_packet_status(sx1262_handle_t *handle, uint8_t *rssi_pkt_raw, int8_t *snr_pkt_raw, uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt)
get the packet status in LoRa mode
uint8_t sx1262_timeout_convert_to_register(sx1262_handle_t *handle, double us, uint32_t *reg)
convert the timeout to the register raw data
uint8_t sx1262_set_calibration(sx1262_handle_t *handle, uint8_t settings)
set the calibration settings
uint8_t sx1262_get_packet_type(sx1262_handle_t *handle, sx1262_packet_type_t *type)
get the packet type
uint8_t sx1262_write_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
write the register
uint8_t sx1262_set_stop_timer_on_preamble(sx1262_handle_t *handle, sx1262_bool_t enable)
stop timer on preamble
uint8_t sx1262_get_instantaneous_rssi(sx1262_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst)
get the instantaneous rssi
uint8_t sx1262_deinit(sx1262_handle_t *handle)
close the chip
uint8_t sx1262_set_dio_irq_params(sx1262_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask, uint16_t dio2_mask, uint16_t dio3_mask)
set the dio irq params
sx1262_lora_cad_symbol_num_t
sx1262 lora cad symbol num enumeration definition
uint8_t sx1262_frequency_convert_to_register(sx1262_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency to the register raw data
sx1262_gfsk_crc_type_t
sx1262 gfsk crc type enumeration definition
uint8_t sx1262_get_device_errors(sx1262_handle_t *handle, uint16_t *op_error)
get the device errors
uint8_t sx1262_set_cad_params(sx1262_handle_t *handle, sx1262_lora_cad_symbol_num_t num, uint8_t cad_det_peak, uint8_t cad_det_min, sx1262_lora_cad_exit_mode_t mode, uint32_t timeout)
set the cad params
uint8_t sx1262_check_packet_error(sx1262_handle_t *handle, sx1262_bool_t *enable)
check the packet error
sx1262_clock_source_t
sx1262 clock source enumeration definition
uint8_t sx1262_get_stats(sx1262_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error)
get the stats
uint8_t sx1262_clear_device_errors(sx1262_handle_t *handle)
clear the device errors
sx1262_regulator_mode_t
sx1262 regulator mode enumeration definition
uint8_t sx1262_init(sx1262_handle_t *handle)
initialize the chip
uint8_t sx1262_lora_cad(sx1262_handle_t *handle, sx1262_bool_t *enable)
run the cad
uint8_t sx1262_info(sx1262_info_t *info)
get chip's information
sx1262_lora_cr_t
sx1262 lora coding rate enumeration definition
@ SX1262_BOOL_FALSE
@ SX1262_BOOL_TRUE
@ SX1262_IRQ_PREAMBLE_DETECTED
@ SX1262_IRQ_HEADER_ERR
@ SX1262_IRQ_CAD_DONE
@ SX1262_IRQ_RX_DONE
@ SX1262_IRQ_CAD_DETECTED
@ SX1262_IRQ_CRC_ERR
@ SX1262_IRQ_TX_DONE
@ SX1262_IRQ_TIMEOUT
@ SX1262_IRQ_SYNC_WORD_VALID
@ SX1262_IRQ_HEADER_VALID
uint8_t sx1262_write_read_reg(sx1262_handle_t *handle, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
write and read register
uint8_t sx1262_get_fhss_freq0(sx1262_handle_t *handle, uint32_t *freq)
get fhss freq0
uint8_t sx1262_set_dio_input_enable(sx1262_handle_t *handle, uint8_t enable)
set the dio input enable
uint8_t sx1262_set_tx_clamp_config(sx1262_handle_t *handle, uint8_t config)
set the tx clamp config
uint8_t sx1262_set_dio3_output_control(sx1262_handle_t *handle, uint8_t control)
set the dio3 output
uint8_t sx1262_set_lora_sync_word(sx1262_handle_t *handle, uint16_t sync_word)
set the lora sync word
uint8_t sx1262_set_pull_up_control(sx1262_handle_t *handle, uint8_t control)
set the pull up control
uint8_t sx1262_get_fhss_symbols_freq0(sx1262_handle_t *handle, uint16_t *num)
get fhss freq0 symbols
uint8_t sx1262_set_pull_down_control(sx1262_handle_t *handle, uint8_t control)
set the pull down control
uint8_t sx1262_get_iq_polarity(sx1262_handle_t *handle, uint8_t *setup)
get the iq polarity
uint8_t sx1262_set_iq_polarity(sx1262_handle_t *handle, uint8_t setup)
set the iq polarity
uint8_t sx1262_set_xta_trim(sx1262_handle_t *handle, uint8_t trim)
set the xta trim
uint8_t sx1262_get_fhss_nb_hopping_blocks(sx1262_handle_t *handle, uint8_t *n)
get fhss nb hopping blocks
uint8_t sx1262_set_rx_gain(sx1262_handle_t *handle, uint8_t gain)
set the rx gain
uint8_t sx1262_set_fsk_node_address(sx1262_handle_t *handle, uint8_t addr)
set the node address in FSK mode
uint8_t sx1262_get_lora_sync_word(sx1262_handle_t *handle, uint16_t *sync_word)
get the lora sync word
uint8_t sx1262_get_fsk_sync_word(sx1262_handle_t *handle, uint8_t sync_word[8])
get the sync word in FSK mode
uint8_t sx1262_get_fhss_packet_length(sx1262_handle_t *handle, uint8_t *len)
get fhss packet length
uint8_t sx1262_get_dio_output_enable(sx1262_handle_t *handle, uint8_t *enable)
get the dio output enable
uint8_t sx1262_set_rtc_control(sx1262_handle_t *handle, uint8_t control)
set the rtc control
uint8_t sx1262_set_ocp(sx1262_handle_t *handle, uint8_t ocp)
set the ocp
uint8_t sx1262_set_tx_modulation(sx1262_handle_t *handle, uint8_t modulation)
set the tx modulation
uint8_t sx1262_get_fhss_symbols_freq15(sx1262_handle_t *handle, uint16_t *num)
get fhss freq15 symbols
uint8_t sx1262_get_random_number(sx1262_handle_t *handle, uint32_t *r)
get the random number
uint8_t sx1262_set_fsk_crc_initical_value(sx1262_handle_t *handle, uint16_t value)
set the crc initial value in FSK mode
uint8_t sx1262_set_fsk_whitening_initial_value(sx1262_handle_t *handle, uint16_t value)
set the whitening initial value in FSK mode
uint8_t sx1262_get_rx_gain(sx1262_handle_t *handle, uint8_t *gain)
get the rx gain
uint8_t sx1262_set_fhss_nb_hopping_blocks(sx1262_handle_t *handle, uint8_t n)
set fhss nb hopping blocks
uint8_t sx1262_set_fhss_packet_length(sx1262_handle_t *handle, uint8_t len)
set fhss packet length
uint8_t sx1262_get_fsk_node_address(sx1262_handle_t *handle, uint8_t *addr)
get the node address in FSK mode
uint8_t sx1262_get_tx_clamp_config(sx1262_handle_t *handle, uint8_t *config)
get the tx clamp config
uint8_t sx1262_get_event_mask(sx1262_handle_t *handle, uint8_t *mask)
get the event mask
uint8_t sx1262_set_fhss_freq15(sx1262_handle_t *handle, uint32_t freq)
set fhss freq15
uint8_t sx1262_get_fsk_crc_polynomial_value(sx1262_handle_t *handle, uint16_t *value)
get the crc polynomial value in FSK mode
uint8_t sx1262_get_xta_trim(sx1262_handle_t *handle, uint8_t *trim)
get the xta trim
uint8_t sx1262_set_fhss_symbols_freq15(sx1262_handle_t *handle, uint16_t num)
set fhss freq15 symbols
uint8_t sx1262_get_dio_input_enable(sx1262_handle_t *handle, uint8_t *enable)
get the dio input enable
uint8_t sx1262_get_rtc_control(sx1262_handle_t *handle, uint8_t *control)
get the rtc control
uint8_t sx1262_get_tx_modulation(sx1262_handle_t *handle, uint8_t *modulation)
get the tx modulation
uint8_t sx1262_get_fhss_hopping_enable(sx1262_handle_t *handle, uint8_t *enable)
get fhss hopping enable
uint8_t sx1262_get_fsk_crc_initical_value(sx1262_handle_t *handle, uint16_t *value)
get the crc initical value in FSK mode
uint8_t sx1262_get_pull_down_control(sx1262_handle_t *handle, uint8_t *control)
get the pull down control
uint8_t sx1262_get_dio3_output_control(sx1262_handle_t *handle, uint8_t *control)
get the dio3 output
uint8_t sx1262_get_fsk_broadcast_address(sx1262_handle_t *handle, uint8_t *addr)
get the broadcast address in FSK mode
uint8_t sx1262_set_event_mask(sx1262_handle_t *handle, uint8_t mask)
set the event mask
uint8_t sx1262_get_pull_up_control(sx1262_handle_t *handle, uint8_t *control)
get the pull up control
uint8_t sx1262_get_fsk_whitening_initial_value(sx1262_handle_t *handle, uint16_t *value)
get the whitening initial value in FSK mode
uint8_t sx1262_set_fhss_symbols_freq0(sx1262_handle_t *handle, uint16_t num)
set fhss freq0 symbols
uint8_t sx1262_set_dio_output_enable(sx1262_handle_t *handle, uint8_t enable)
set the dio output enable
uint8_t sx1262_get_xtb_trim(sx1262_handle_t *handle, uint8_t *trim)
get the xtb trim
uint8_t sx1262_set_fsk_broadcast_address(sx1262_handle_t *handle, uint8_t addr)
set the broadcast address in FSK mode
uint8_t sx1262_set_fsk_sync_word(sx1262_handle_t *handle, uint8_t sync_word[8])
set the sync word in FSK mode
uint8_t sx1262_set_fhss_freq0(sx1262_handle_t *handle, uint32_t freq)
set fhss freq0
uint8_t sx1262_get_ocp(sx1262_handle_t *handle, uint8_t *ocp)
get the ocp
uint8_t sx1262_set_xtb_trim(sx1262_handle_t *handle, uint8_t trim)
set the xtb trim
uint8_t sx1262_set_fhss_hopping_enable(sx1262_handle_t *handle, uint8_t enable)
set fhss hopping enable
uint8_t sx1262_get_fhss_freq15(sx1262_handle_t *handle, uint32_t *freq)
get fhss freq15
uint8_t sx1262_set_fsk_crc_polynomial_value(sx1262_handle_t *handle, uint16_t value)
set the crc polynomial value in FSK mode
uint8_t(* spi_write_read)(uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
uint8_t(* spi_init)(void)
void(* delay_ms)(uint32_t ms)
uint8_t(* busy_gpio_init)(void)
void(* receive_callback)(uint16_t type, uint8_t *buf, uint16_t len)
uint8_t(* reset_gpio_deinit)(void)
void(* debug_print)(const char *const fmt,...)
uint8_t(* busy_gpio_deinit)(void)
uint8_t(* spi_deinit)(void)
uint8_t(* reset_gpio_init)(void)
uint8_t receive_buf[256]
uint8_t(* busy_gpio_read)(uint8_t *value)
uint8_t buf[384]
uint8_t(* reset_gpio_write)(uint8_t value)
float supply_voltage_max_v
uint32_t driver_version
char manufacturer_name[32]
float supply_voltage_min_v
char chip_name[32]