driver_sx1262.h

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#ifndef DRIVER_SX1262_H
#define DRIVER_SX1262_H
 
#include <stdio.h>
#include <stdint.h>
#include <string.h>
 
#ifdef __cplusplus
extern "C"{
#endif



typedef enum
{
    SX1262_BOOL_FALSE = 0x00,        
    SX1262_BOOL_TRUE  = 0x01,        
} sx1262_bool_t;

typedef enum
{
    SX1262_START_MODE_COLD = 0x00,        
    SX1262_START_MODE_WARM = 0x01,        
} sx1262_start_mode_t;

typedef enum
{
    SX1262_CLOCK_SOURCE_RC_13M     = 0x00,        
    SX1262_CLOCK_SOURCE_XTAL_32MHZ = 0x01,        
} sx1262_clock_source_t;

typedef enum
{
    SX1262_REGULATOR_MODE_ONLY_LDO  = 0x00,        
    SX1262_REGULATOR_MODE_DC_DC_LDO = 0x01,        
} sx1262_regulator_mode_t;

typedef enum
{
    SX1262_CALIBRATION_RC64K      = (1 << 0),        
    SX1262_CALIBRATION_RC13M      = (1 << 1),        
    SX1262_CALIBRATION_PLL        = (1 << 2),        
    SX1262_CALIBRATION_ADC_PULSE  = (1 << 3),        
    SX1262_CALIBRATION_ADC_BULK_N = (1 << 4),        
    SX1262_CALIBRATION_ADC_BULK_P = (1 << 5),        
    SX1262_CALIBRATION_IMAGE      = (1 << 6),        
} sx1262_calibration_t;

typedef enum
{
    SX1262_IRQ_TX_DONE           = (1 << 0),        
    SX1262_IRQ_RX_DONE           = (1 << 1),        
    SX1262_IRQ_PREAMBLE_DETECTED = (1 << 2),        
    SX1262_IRQ_SYNC_WORD_VALID   = (1 << 3),        
    SX1262_IRQ_HEADER_VALID      = (1 << 4),        
    SX1262_IRQ_HEADER_ERR        = (1 << 5),        
    SX1262_IRQ_CRC_ERR           = (1 << 6),        
    SX1262_IRQ_CAD_DONE          = (1 << 7),        
    SX1262_IRQ_CAD_DETECTED      = (1 << 8),        
    SX1262_IRQ_TIMEOUT           = (1 << 9),        
} sx1262_irq_t;

typedef enum
{
    SX1262_RX_TX_FALLBACK_MODE_FS         = 0x40,        
    SX1262_RX_TX_FALLBACK_MODE_STDBY_XOSC = 0x30,        
    SX1262_RX_TX_FALLBACK_MODE_STDBY_RC   = 0x20,        
} sx1262_rx_tx_fallback_mode_t;

typedef enum
{
    SX1262_TCXO_VOLTAGE_1P6V = 0x00,        
    SX1262_TCXO_VOLTAGE_1P7V = 0x01,        
    SX1262_TCXO_VOLTAGE_1P8V = 0x02,        
    SX1262_TCXO_VOLTAGE_2P2V = 0x03,        
    SX1262_TCXO_VOLTAGE_2P4V = 0x04,        
    SX1262_TCXO_VOLTAGE_2P7V = 0x05,        
    SX1262_TCXO_VOLTAGE_3P0V = 0x06,        
    SX1262_TCXO_VOLTAGE_3P3V = 0x07,        
} sx1262_tcxo_voltage_t;

typedef enum
{
    SX1262_PACKET_TYPE_GFSK = 0x00,        
    SX1262_PACKET_TYPE_LORA = 0x01,        
    SX1262_PACKET_TYPE_FHSS = 0x03,        
} sx1262_packet_type_t;

typedef enum
{
    SX1262_RAMP_TIME_10US   = 0x00,        
    SX1262_RAMP_TIME_20US   = 0x01,        
    SX1262_RAMP_TIME_40US   = 0x02,        
    SX1262_RAMP_TIME_80US   = 0x03,        
    SX1262_RAMP_TIME_200US  = 0x04,        
    SX1262_RAMP_TIME_800US  = 0x05,        
    SX1262_RAMP_TIME_1700US = 0x06,        
    SX1262_RAMP_TIME_3400US = 0x07,        
} sx1262_ramp_time_t;

typedef enum
{
    SX1262_GFSK_PULSE_SHAPE_NO_FILTER       = 0x00,        
    SX1262_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P3 = 0x08,        
    SX1262_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P5 = 0x09,        
    SX1262_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P7 = 0x0A,        
    SX1262_GFSK_PULSE_SHAPE_GAUSSIAN_BT_1   = 0x0B,        
} sx1262_gfsk_pulse_shape_t;

typedef enum
{
    SX1262_GFSK_BANDWIDTH_4P8_KHZ   = 0x1F,        
    SX1262_GFSK_BANDWIDTH_5P8_KHZ   = 0x17,        
    SX1262_GFSK_BANDWIDTH_7P3_KHZ   = 0x0F,        
    SX1262_GFSK_BANDWIDTH_9P7_KHZ   = 0x1E,        
    SX1262_GFSK_BANDWIDTH_11P7_KHZ  = 0x16,        
    SX1262_GFSK_BANDWIDTH_14P6_KHZ  = 0x0E,        
    SX1262_GFSK_BANDWIDTH_19P5_KHZ  = 0x1D,        
    SX1262_GFSK_BANDWIDTH_23P4_KHZ  = 0x15,        
    SX1262_GFSK_BANDWIDTH_29P3_KHZ  = 0x0D,        
    SX1262_GFSK_BANDWIDTH_39_KHZ    = 0x1C,        
    SX1262_GFSK_BANDWIDTH_46P9_KHZ  = 0x14,        
    SX1262_GFSK_BANDWIDTH_58P6_KHZ  = 0x0C,        
    SX1262_GFSK_BANDWIDTH_78P2_KHZ  = 0x1B,        
    SX1262_GFSK_BANDWIDTH_93P8_KHZ  = 0x13,        
    SX1262_GFSK_BANDWIDTH_117P3_KHZ = 0x0B,        
    SX1262_GFSK_BANDWIDTH_156P2_KHZ = 0x1A,        
    SX1262_GFSK_BANDWIDTH_187P2_KHZ = 0x12,        
    SX1262_GFSK_BANDWIDTH_232P3_KHZ = 0x0A,        
    SX1262_GFSK_BANDWIDTH_312_KHZ   = 0x19,        
    SX1262_GFSK_BANDWIDTH_373P6_KHZ = 0x11,        
    SX1262_GFSK_BANDWIDTH_467_KHZ   = 0x09,        
} sx1262_gfsk_bandwidth_t;

typedef enum
{
    SX1262_LORA_SF_5  = 0x05,        
    SX1262_LORA_SF_6  = 0x06,        
    SX1262_LORA_SF_7  = 0x07,        
    SX1262_LORA_SF_8  = 0x08,        
    SX1262_LORA_SF_9  = 0x09,        
    SX1262_LORA_SF_10 = 0x0A,        
    SX1262_LORA_SF_11 = 0x0B,        
    SX1262_LORA_SF_12 = 0x0C,        
} sx1262_lora_sf_t;

typedef enum
{
    SX1262_LORA_BANDWIDTH_7P81_KHZ  = 0x00,        
    SX1262_LORA_BANDWIDTH_10P42_KHZ = 0x08,        
    SX1262_LORA_BANDWIDTH_15P63_KHZ = 0x01,        
    SX1262_LORA_BANDWIDTH_20P83_KHZ = 0x09,        
    SX1262_LORA_BANDWIDTH_31P25_KHZ = 0x02,        
    SX1262_LORA_BANDWIDTH_41P67_KHZ = 0x0A,        
    SX1262_LORA_BANDWIDTH_62P50_KHZ = 0x03,        
    SX1262_LORA_BANDWIDTH_125_KHZ   = 0x04,        
    SX1262_LORA_BANDWIDTH_250_KHZ   = 0x05,        
    SX1262_LORA_BANDWIDTH_500_KHZ   = 0x06,        
} sx1262_lora_bandwidth_t;

typedef enum
{
    SX1262_LORA_CR_4_5 = 0x01,        
    SX1262_LORA_CR_4_6 = 0x02,        
    SX1262_LORA_CR_4_7 = 0x03,        
    SX1262_LORA_CR_4_8 = 0x04,        
} sx1262_lora_cr_t;

typedef enum
{
    SX1262_GFSK_PREAMBLE_DETECTOR_LENGTH_OFF     = 0x00,        
    SX1262_GFSK_PREAMBLE_DETECTOR_LENGTH_8_BITS  = 0x04,        
    SX1262_GFSK_PREAMBLE_DETECTOR_LENGTH_16_BITS = 0x05,        
    SX1262_GFSK_PREAMBLE_DETECTOR_LENGTH_24_BITS = 0x06,        
    SX1262_GFSK_PREAMBLE_DETECTOR_LENGTH_32_BITS = 0x07,        
} sx1262_gfsk_preamble_detector_length_t;

typedef enum
{
    SX1262_GFSK_ADDR_FILTER_DISABLE                       = 0x00,        
    SX1262_GFSK_ADDR_FILTER_ACTIVATED_NODE_ADDR           = 0x01,        
    SX1262_GFSK_ADDR_FILTER_ACTIVATED_NODE_BROADCAST_ADDR = 0x02,        
} sx1262_gfsk_addr_filter_t;

typedef enum
{
    SX1262_GFSK_PACKET_TYPE_KNOWN_LENGTH  = 0x00,        
    SX1262_GFSK_PACKET_TYPE_VARIABLE_SIZE = 0x01,        
} sx1262_gfsk_packet_type_t;

typedef enum
{
    SX1262_GFSK_CRC_TYPE_OFF        = 0x01,        
    SX1262_GFSK_CRC_TYPE_1_BYTE     = 0x00,        
    SX1262_GFSK_CRC_TYPE_2_BYTE     = 0x02,        
    SX1262_GFSK_CRC_TYPE_1_BYTE_INV = 0x04,        
    SX1262_GFSK_CRC_TYPE_2_BYTE_INV = 0x06,        
} sx1262_gfsk_crc_type_t;

typedef enum
{
    SX1262_LORA_HEADER_EXPLICIT = 0x00,        
    SX1262_LORA_HEADER_IMPLICIT = 0x01,        
} sx1262_lora_header_t;

typedef enum
{
    SX1262_LORA_CRC_TYPE_OFF = 0x00,        
    SX1262_LORA_CRC_TYPE_ON  = 0x01,        
} sx1262_lora_crc_type_t;

typedef enum
{
    SX1262_LORA_CAD_SYMBOL_NUM_1  = 0x00,        
    SX1262_LORA_CAD_SYMBOL_NUM_2  = 0x01,        
    SX1262_LORA_CAD_SYMBOL_NUM_4  = 0x02,        
    SX1262_LORA_CAD_SYMBOL_NUM_8  = 0x03,        
    SX1262_LORA_CAD_SYMBOL_NUM_16 = 0x04,        
} sx1262_lora_cad_symbol_num_t;

typedef enum
{
    SX1262_LORA_CAD_EXIT_MODE_ONLY = 0x00,        
    SX1262_LORA_CAD_EXIT_MODE_RX   = 0x01,        
} sx1262_lora_cad_exit_mode_t;

typedef enum
{
    SX1262_FSK_RX_STATUS_PREAMBLE_ERR = (1 << 7),        
    SX1262_FSK_RX_STATUS_SYNC_ERR     = (1 << 6),        
    SX1262_FSK_RX_STATUS_ADDR_ERR     = (1 << 5),        
    SX1262_FSK_RX_STATUS_CRC_ERR      = (1 << 4),        
    SX1262_FSK_RX_STATUS_LENGTH_ERR   = (1 << 3),        
    SX1262_FSK_RX_STATUS_ABORT_ERR    = (1 << 2),        
    SX1262_FSK_RX_STATUS_PKT_RECEIVED = (1 << 1),        
    SX1262_FSK_RX_STATUS_PKT_SEND     = (1 << 0),        
} sx1262_fsk_rx_status_t;

typedef enum
{
    SX1262_OP_ERROR_PA_RAMP_ERR     = (1 << 8),        
    SX1262_OP_ERROR_PLL_LOCK_ERR    = (1 << 6),        
    SX1262_OP_ERROR_XOSC_START_ERR  = (1 << 5),        
    SX1262_OP_ERROR_IMG_CALIB_ERR   = (1 << 4),        
    SX1262_OP_ERROR_ADC_CALIB_ERR   = (1 << 3),        
    SX1262_OP_ERROR_PLL_CALIB_ERR   = (1 << 2),        
    SX1262_OP_ERROR_RC13M_CALIB_ERR = (1 << 1),        
    SX1262_OP_ERROR_RC64K_CALIB_ERR = (1 << 0),        
} sx1262_op_error_t;

typedef struct sx1262_handle_s
{
    uint8_t (*reset_gpio_init)(void);                                     
    uint8_t (*reset_gpio_deinit)(void);                                   
    uint8_t (*reset_gpio_write)(uint8_t value);                           
    uint8_t (*busy_gpio_init)(void);                                      
    uint8_t (*busy_gpio_deinit)(void);                                    
    uint8_t (*busy_gpio_read)(uint8_t *value);                            
    uint8_t (*spi_init)(void);                                            
    uint8_t (*spi_deinit)(void);                                          
    uint8_t (*spi_write_read)(uint8_t *in_buf, uint32_t in_len,
                              uint8_t *out_buf, uint32_t out_len);        
    void (*delay_ms)(uint32_t ms);                                        
    void (*debug_print)(const char *const fmt, ...);                      
    void (*receive_callback)(uint16_t type,
                             uint8_t *buf, uint16_t len);                 
    uint8_t inited;                                                       
    uint8_t tx_done;                                                      
    uint8_t cad_done;                                                     
    uint8_t cad_detected;                                                 
    uint8_t crc_error;                                                    
    uint8_t timeout;                                                      
    uint8_t buf[384];                                                     
    uint8_t receive_buf[256];                                             
} sx1262_handle_t;

typedef struct sx1262_info_s
{
    char chip_name[32];                
    char manufacturer_name[32];        
    char interface[8];                 
    float supply_voltage_min_v;        
    float supply_voltage_max_v;        
    float max_current_ma;              
    float temperature_min;             
    float temperature_max;             
    uint32_t driver_version;           
} sx1262_info_t;



#define DRIVER_SX1262_LINK_INIT(HANDLE, STRUCTURE)                memset(HANDLE, 0, sizeof(STRUCTURE))

#define DRIVER_SX1262_LINK_SPI_INIT(HANDLE, FUC)                  (HANDLE)->spi_init = FUC

#define DRIVER_SX1262_LINK_SPI_DEINIT(HANDLE, FUC)                (HANDLE)->spi_deinit = FUC

#define DRIVER_SX1262_LINK_SPI_WRITE_READ(HANDLE, FUC)            (HANDLE)->spi_write_read = FUC

#define DRIVER_SX1262_LINK_RESET_GPIO_INIT(HANDLE, FUC)           (HANDLE)->reset_gpio_init = FUC

#define DRIVER_SX1262_LINK_RESET_GPIO_DEINIT(HANDLE, FUC)         (HANDLE)->reset_gpio_deinit = FUC

#define DRIVER_SX1262_LINK_RESET_GPIO_WRITE(HANDLE, FUC)          (HANDLE)->reset_gpio_write = FUC

#define DRIVER_SX1262_LINK_BUSY_GPIO_INIT(HANDLE, FUC)            (HANDLE)->busy_gpio_init = FUC

#define DRIVER_SX1262_LINK_BUSY_GPIO_DEINIT(HANDLE, FUC)          (HANDLE)->busy_gpio_deinit = FUC

#define DRIVER_SX1262_LINK_BUSY_GPIO_READ(HANDLE, FUC)            (HANDLE)->busy_gpio_read = FUC

#define DRIVER_SX1262_LINK_DELAY_MS(HANDLE, FUC)                  (HANDLE)->delay_ms = FUC

#define DRIVER_SX1262_LINK_DEBUG_PRINT(HANDLE, FUC)               (HANDLE)->debug_print = FUC

#define DRIVER_SX1262_LINK_RECEIVE_CALLBACK(HANDLE, FUC)          (HANDLE)->receive_callback = FUC



uint8_t sx1262_info(sx1262_info_t *info);

uint8_t sx1262_irq_handler(sx1262_handle_t *handle);

uint8_t sx1262_init(sx1262_handle_t *handle);

uint8_t sx1262_deinit(sx1262_handle_t *handle);

uint8_t sx1262_lora_transmit(sx1262_handle_t *handle, sx1262_clock_source_t standby_src,
                             uint16_t preamble_length, sx1262_lora_header_t header_type,
                             sx1262_lora_crc_type_t crc_type, sx1262_bool_t invert_iq_enable,
                             uint8_t *buf, uint16_t len, uint32_t us);

uint8_t sx1262_lora_cad(sx1262_handle_t *handle, sx1262_bool_t *enable);

uint8_t sx1262_single_receive(sx1262_handle_t *handle, double us);

uint8_t sx1262_continuous_receive(sx1262_handle_t *handle);

uint8_t sx1262_write_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len);

uint8_t sx1262_read_register(sx1262_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len);

uint8_t sx1262_write_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len);

uint8_t sx1262_read_buffer(sx1262_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len);

uint8_t sx1262_check_packet_error(sx1262_handle_t *handle, sx1262_bool_t *enable);

uint8_t sx1262_set_sleep(sx1262_handle_t *handle, sx1262_start_mode_t mode, sx1262_bool_t rtc_wake_up_enable);

uint8_t sx1262_set_standby(sx1262_handle_t *handle, sx1262_clock_source_t src);

uint8_t sx1262_set_frequency_synthesis(sx1262_handle_t *handle);

uint8_t sx1262_set_tx(sx1262_handle_t *handle, uint32_t timeout);

uint8_t sx1262_set_rx(sx1262_handle_t *handle, uint32_t timeout);

uint8_t sx1262_timeout_convert_to_register(sx1262_handle_t *handle, double us, uint32_t *reg);

uint8_t sx1262_timeout_convert_to_data(sx1262_handle_t *handle, uint32_t reg, double *us);

uint8_t sx1262_set_stop_timer_on_preamble(sx1262_handle_t *handle, sx1262_bool_t enable);

uint8_t sx1262_set_rx_duty_cycle(sx1262_handle_t *handle, uint32_t rx_period, uint32_t sleep_period);

uint8_t sx1262_set_cad(sx1262_handle_t *handle);

uint8_t sx1262_set_tx_continuous_wave(sx1262_handle_t *handle);

uint8_t sx1262_set_tx_infinite_preamble(sx1262_handle_t *handle);

uint8_t sx1262_set_regulator_mode(sx1262_handle_t *handle, sx1262_regulator_mode_t mode);

uint8_t sx1262_set_calibration(sx1262_handle_t *handle, uint8_t settings);

uint8_t sx1262_set_calibration_image(sx1262_handle_t *handle, uint8_t freq1, uint8_t freq2);

uint8_t sx1262_set_pa_config(sx1262_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max);

uint8_t sx1262_set_rx_tx_fallback_mode(sx1262_handle_t *handle, sx1262_rx_tx_fallback_mode_t mode);

uint8_t sx1262_set_dio_irq_params(sx1262_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask,
                                  uint16_t dio2_mask, uint16_t dio3_mask);

uint8_t sx1262_get_irq_status(sx1262_handle_t *handle, uint16_t *status);

uint8_t sx1262_clear_irq_status(sx1262_handle_t *handle, uint16_t clear_irq_param);

uint8_t sx1262_set_dio2_as_rf_switch_ctrl(sx1262_handle_t *handle, sx1262_bool_t enable);

uint8_t sx1262_set_dio3_as_tcxo_ctrl(sx1262_handle_t *handle, sx1262_tcxo_voltage_t voltage, uint32_t delay);

uint8_t sx1262_frequency_convert_to_register(sx1262_handle_t *handle, uint32_t freq, uint32_t *reg);

uint8_t sx1262_frequency_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *freq);

uint8_t sx1262_set_rf_frequency(sx1262_handle_t *handle, uint32_t reg);

uint8_t sx1262_set_packet_type(sx1262_handle_t *handle, sx1262_packet_type_t type);

uint8_t sx1262_get_packet_type(sx1262_handle_t *handle, sx1262_packet_type_t *type);

uint8_t sx1262_set_tx_params(sx1262_handle_t *handle, int8_t dbm, sx1262_ramp_time_t t);

uint8_t sx1262_set_gfsk_modulation_params(sx1262_handle_t *handle, uint32_t br, sx1262_gfsk_pulse_shape_t shape, 
                                          sx1262_gfsk_bandwidth_t bw, uint32_t fdev);

uint8_t sx1262_gfsk_bit_rate_convert_to_register(sx1262_handle_t *handle, uint32_t br, uint32_t *reg);

uint8_t sx1262_gfsk_bit_rate_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *br);

uint8_t sx1262_gfsk_frequency_deviation_convert_to_register(sx1262_handle_t *handle, uint32_t freq, uint32_t *reg);

uint8_t sx1262_gfsk_frequency_deviation_convert_to_data(sx1262_handle_t *handle, uint32_t reg, uint32_t *freq);

uint8_t sx1262_set_lora_modulation_params(sx1262_handle_t *handle, sx1262_lora_sf_t sf, sx1262_lora_bandwidth_t bw, 
                                          sx1262_lora_cr_t cr, sx1262_bool_t low_data_rate_optimize_enable);

uint8_t sx1262_set_gfsk_packet_params(sx1262_handle_t *handle, uint16_t preamble_length,
                                      sx1262_gfsk_preamble_detector_length_t detector_length,
                                      uint8_t sync_word_length, sx1262_gfsk_addr_filter_t filter,
                                      sx1262_gfsk_packet_type_t packet_type, uint8_t payload_length,
                                      sx1262_gfsk_crc_type_t crc_type, sx1262_bool_t whitening_enable);

uint8_t sx1262_set_lora_packet_params(sx1262_handle_t *handle, uint16_t preamble_length,
                                      sx1262_lora_header_t header_type, uint8_t payload_length,
                                      sx1262_lora_crc_type_t crc_type, sx1262_bool_t invert_iq_enable);

uint8_t sx1262_set_cad_params(sx1262_handle_t *handle, sx1262_lora_cad_symbol_num_t num,
                              uint8_t cad_det_peak, uint8_t cad_det_min, sx1262_lora_cad_exit_mode_t mode,
                              uint32_t timeout);

uint8_t sx1262_set_buffer_base_address(sx1262_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr);

uint8_t sx1262_set_lora_symb_num_timeout(sx1262_handle_t *handle, uint8_t symb_num);

uint8_t sx1262_get_status(sx1262_handle_t *handle, uint8_t *status);

uint8_t sx1262_get_rx_buffer_status(sx1262_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer);

uint8_t sx1262_get_gfsk_packet_status(sx1262_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw,
                                      uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg);

uint8_t sx1262_get_lora_packet_status(sx1262_handle_t *handle, uint8_t *rssi_pkt_raw, int8_t *snr_pkt_raw,
                                      uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt);

uint8_t sx1262_get_instantaneous_rssi(sx1262_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst);

uint8_t sx1262_get_stats(sx1262_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error);

uint8_t sx1262_reset_stats(sx1262_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error);

uint8_t sx1262_get_device_errors(sx1262_handle_t *handle, uint16_t *op_error);

uint8_t sx1262_clear_device_errors(sx1262_handle_t *handle);



uint8_t sx1262_set_fsk_whitening_initial_value(sx1262_handle_t *handle, uint16_t value);

uint8_t sx1262_get_fsk_whitening_initial_value(sx1262_handle_t *handle, uint16_t *value);

uint8_t sx1262_set_fsk_crc_initical_value(sx1262_handle_t *handle, uint16_t value);

uint8_t sx1262_get_fsk_crc_initical_value(sx1262_handle_t *handle, uint16_t *value);

uint8_t sx1262_set_fsk_crc_polynomial_value(sx1262_handle_t *handle, uint16_t value);

uint8_t sx1262_get_fsk_crc_polynomial_value(sx1262_handle_t *handle, uint16_t *value);

uint8_t sx1262_set_fsk_sync_word(sx1262_handle_t *handle, uint8_t sync_word[8]);

uint8_t sx1262_get_fsk_sync_word(sx1262_handle_t *handle, uint8_t sync_word[8]);

uint8_t sx1262_set_fsk_node_address(sx1262_handle_t *handle, uint8_t addr);

uint8_t sx1262_get_fsk_node_address(sx1262_handle_t *handle, uint8_t *addr);

uint8_t sx1262_set_fsk_broadcast_address(sx1262_handle_t *handle, uint8_t addr);

uint8_t sx1262_get_fsk_broadcast_address(sx1262_handle_t *handle, uint8_t *addr);

uint8_t sx1262_set_iq_polarity(sx1262_handle_t *handle, uint8_t setup);

uint8_t sx1262_get_iq_polarity(sx1262_handle_t *handle, uint8_t *setup);

uint8_t sx1262_set_lora_sync_word(sx1262_handle_t *handle, uint16_t sync_word);

uint8_t sx1262_get_lora_sync_word(sx1262_handle_t *handle, uint16_t *sync_word);

uint8_t sx1262_get_random_number(sx1262_handle_t *handle, uint32_t *r);

uint8_t sx1262_set_tx_modulation(sx1262_handle_t *handle, uint8_t modulation);

uint8_t sx1262_get_tx_modulation(sx1262_handle_t *handle, uint8_t *modulation);

uint8_t sx1262_set_rx_gain(sx1262_handle_t *handle, uint8_t gain);

uint8_t sx1262_get_rx_gain(sx1262_handle_t *handle, uint8_t *gain);

uint8_t sx1262_set_tx_clamp_config(sx1262_handle_t *handle, uint8_t config);

uint8_t sx1262_get_tx_clamp_config(sx1262_handle_t *handle, uint8_t *config);

uint8_t sx1262_set_ocp(sx1262_handle_t *handle, uint8_t ocp);

uint8_t sx1262_get_ocp(sx1262_handle_t *handle, uint8_t *ocp);

uint8_t sx1262_set_rtc_control(sx1262_handle_t *handle, uint8_t control);

uint8_t sx1262_get_rtc_control(sx1262_handle_t *handle, uint8_t *control);

uint8_t sx1262_set_xta_trim(sx1262_handle_t *handle, uint8_t trim);

uint8_t sx1262_get_xta_trim(sx1262_handle_t *handle, uint8_t *trim);

uint8_t sx1262_set_xtb_trim(sx1262_handle_t *handle, uint8_t trim);

uint8_t sx1262_get_xtb_trim(sx1262_handle_t *handle, uint8_t *trim);

uint8_t sx1262_set_dio3_output_control(sx1262_handle_t *handle, uint8_t control);

uint8_t sx1262_get_dio3_output_control(sx1262_handle_t *handle, uint8_t *control);

uint8_t sx1262_set_event_mask(sx1262_handle_t *handle, uint8_t mask);

uint8_t sx1262_get_event_mask(sx1262_handle_t *handle, uint8_t *mask);

uint8_t sx1262_set_dio_output_enable(sx1262_handle_t *handle, uint8_t enable);

uint8_t sx1262_get_dio_output_enable(sx1262_handle_t *handle, uint8_t *enable);

uint8_t sx1262_set_dio_input_enable(sx1262_handle_t *handle, uint8_t enable);

uint8_t sx1262_get_dio_input_enable(sx1262_handle_t *handle, uint8_t *enable);

uint8_t sx1262_set_pull_up_control(sx1262_handle_t *handle, uint8_t control);

uint8_t sx1262_get_pull_up_control(sx1262_handle_t *handle, uint8_t *control);

uint8_t sx1262_set_pull_down_control(sx1262_handle_t *handle, uint8_t control);

uint8_t sx1262_get_pull_down_control(sx1262_handle_t *handle, uint8_t *control);

uint8_t sx1262_set_fhss_hopping_enable(sx1262_handle_t *handle, uint8_t enable);

uint8_t sx1262_get_fhss_hopping_enable(sx1262_handle_t *handle, uint8_t *enable);

uint8_t sx1262_set_fhss_packet_length(sx1262_handle_t *handle, uint8_t len);

uint8_t sx1262_get_fhss_packet_length(sx1262_handle_t *handle, uint8_t *len);

uint8_t sx1262_set_fhss_nb_hopping_blocks(sx1262_handle_t *handle, uint8_t n);

uint8_t sx1262_get_fhss_nb_hopping_blocks(sx1262_handle_t *handle, uint8_t *n);

uint8_t sx1262_set_fhss_symbols_freq0(sx1262_handle_t *handle, uint16_t num);

uint8_t sx1262_get_fhss_symbols_freq0(sx1262_handle_t *handle, uint16_t *num);

uint8_t sx1262_set_fhss_freq0(sx1262_handle_t *handle, uint32_t freq);

uint8_t sx1262_get_fhss_freq0(sx1262_handle_t *handle, uint32_t *freq);

uint8_t sx1262_set_fhss_symbols_freq15(sx1262_handle_t *handle, uint16_t num);

uint8_t sx1262_get_fhss_symbols_freq15(sx1262_handle_t *handle, uint16_t *num);

uint8_t sx1262_set_fhss_freq15(sx1262_handle_t *handle, uint32_t freq);

uint8_t sx1262_get_fhss_freq15(sx1262_handle_t *handle, uint32_t *freq);



uint8_t sx1262_write_read_reg(sx1262_handle_t *handle, uint8_t *in_buf, uint32_t in_len,
                              uint8_t *out_buf, uint32_t out_len);


 
#ifdef __cplusplus
}
#endif
 
#endif