LibDriver W25QXX
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driver_w25qxx.h
Go to the documentation of this file.
1
36
37#ifndef DRIVER_W25QXX_H
38#define DRIVER_W25QXX_H
39
40#include <stdint.h>
41#include <stdio.h>
42#include <string.h>
43
44#ifdef __cplusplus
45extern "C"{
46#endif
47
53
58
62#ifndef W25QXX_WRITE_STATUS_TIMEOUT_MS
63 #define W25QXX_WRITE_STATUS_TIMEOUT_MS (1000U)
64#endif
65
69#ifndef W25QXX_ERASE_CHIP_TIMEOUT_MS
70 #define W25QXX_ERASE_CHIP_TIMEOUT_MS (1000U * 1000U)
71#endif
72
76#ifndef W25QXX_ERASE_SECURITY_TIMEOUT_MS
77 #define W25QXX_ERASE_SECURITY_TIMEOUT_MS (100U)
78#endif
79
83#ifndef W25QXX_PROGRAM_SECURITY_TIMEOUT_MS
84 #define W25QXX_PROGRAM_SECURITY_TIMEOUT_MS (3U)
85#endif
86
90#ifndef W25QXX_PAGE_PROGRAM_TIMEOUT_MS
91 #define W25QXX_PAGE_PROGRAM_TIMEOUT_MS (3U)
92#endif
93
97#ifndef W25QXX_ERASE_4K_TIMEOUT_MS
98 #define W25QXX_ERASE_4K_TIMEOUT_MS (400U)
99#endif
100
104#ifndef W25QXX_ERASE_32K_TIMEOUT_MS
105 #define W25QXX_ERASE_32K_TIMEOUT_MS (1600U)
106#endif
107
111#ifndef W25QXX_ERASE_64K_TIMEOUT_MS
112 #define W25QXX_ERASE_64K_TIMEOUT_MS (2000U)
113#endif
114
118typedef enum
119{
120 W25Q10 = 0XEF10U,
121 W25Q20 = 0XEF11U,
122 W25Q40 = 0XEF12U,
123 W25Q80 = 0XEF13U,
124 W25Q16 = 0XEF14U,
125 W25Q32 = 0XEF15U,
126 W25Q64 = 0XEF16U,
127 W25Q128 = 0XEF17U,
128 W25Q256 = 0XEF18U,
129 W25Q512 = 0XEF19U,
130 W25Q01 = 0XEF20U,
131 W25Q02 = 0XEF21U,
133
142
146typedef enum
147{
151
160
164
169
180
191
192
202
214
229
243
258
262
267
271typedef struct w25qxx_handle_s
272{
273 uint8_t (*spi_qspi_init)(void);
274 uint8_t (*spi_qspi_deinit)(void);
275 uint8_t (*spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line,
276 uint32_t address, uint8_t address_line, uint8_t address_len,
277 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
278 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
279 uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
280 void (*delay_ms)(uint32_t ms);
281 void (*delay_us)(uint32_t us);
282 void (*debug_print)(const char *const fmt, ...);
283 uint8_t inited;
284 uint16_t type;
285 uint8_t address_mode;
286 uint8_t param;
287 uint8_t dummy;
289 uint8_t spi_qspi;
290 uint8_t buf[256 + 6];
291 uint8_t buf_4k[4096 + 1];
293
309
313
320
327#define DRIVER_W25QXX_LINK_INIT(HANDLE, STRUCTURE) memset(HANDLE, 0, sizeof(STRUCTURE))
328
335#define DRIVER_W25QXX_LINK_SPI_QSPI_INIT(HANDLE, FUC) (HANDLE)->spi_qspi_init = FUC
336
343#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC) (HANDLE)->spi_qspi_deinit = FUC
344
351#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC) (HANDLE)->spi_qspi_write_read = FUC
352
359#define DRIVER_W25QXX_LINK_DELAY_MS(HANDLE, FUC) (HANDLE)->delay_ms = FUC
360
367#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC) (HANDLE)->delay_us = FUC
368
375#define DRIVER_W25QXX_LINK_DEBUG_PRINT(HANDLE, FUC) (HANDLE)->debug_print = FUC
376
380
387
396uint8_t w25qxx_info(w25qxx_info_t *info);
397
408
419
429uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type);
430
440uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type);
441
452
462uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface);
463
477
489
505uint8_t w25qxx_init(w25qxx_handle_t *handle);
506
518uint8_t w25qxx_deinit(w25qxx_handle_t *handle);
519
534uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
535
551uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
552
568uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
569
584uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
585
603uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len);
604
619uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr);
620
635uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr);
636
651uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr);
652
664uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle);
665
676uint8_t w25qxx_power_down(w25qxx_handle_t *handle);
677
689
702uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
703
707
714
731uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
732
749uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
750
767uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
768
784uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
785
802uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
803
820uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len);
821
840uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len);
841
852uint8_t w25qxx_enable_write(w25qxx_handle_t *handle);
853
865
877
889uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status);
890
902uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status);
903
915uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status);
916
929uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status);
930
943uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status);
944
957uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status);
958
970
982
998uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
999
1015uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id);
1016
1029uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2]);
1030
1042
1054
1069
1082
1094uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle);
1095
1106uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle);
1107
1118uint8_t w25qxx_reset_device(w25qxx_handle_t *handle);
1119
1133uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8]);
1134
1147uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256]);
1148
1164
1180uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]);
1181
1197uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256]);
1198
1211uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr);
1212
1225uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr);
1226
1240uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value);
1241
1255
1259
1266
1291uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line,
1292 uint32_t address, uint8_t address_line, uint8_t address_len,
1293 uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len,
1294 uint8_t dummy, uint8_t *in_buf, uint32_t in_len,
1295 uint8_t *out_buf, uint32_t out_len, uint8_t data_line);
1296
1300
1304
1305#ifdef __cplusplus
1306}
1307#endif
1308
1309#endif
uint8_t w25qxx_erase_program_resume(w25qxx_handle_t *handle)
resume erase or program
w25qxx_status2_t
w25qxx status 2 enumeration definition
uint8_t w25qxx_enable_volatile_sr_write(w25qxx_handle_t *handle)
enable volatile sr writing
uint8_t w25qxx_get_unique_id(w25qxx_handle_t *handle, uint8_t id[8])
get the unique id
uint8_t w25qxx_get_manufacturer_device_id_dual_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with dual io
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
uint8_t w25qxx_get_sfdp(w25qxx_handle_t *handle, uint8_t sfdp[256])
get the sfdp
uint8_t w25qxx_set_status1(w25qxx_handle_t *handle, uint8_t status)
set the status 1
uint8_t w25qxx_reset_device(w25qxx_handle_t *handle)
reset the device
w25qxx_qspi_read_wrap_length_t
w25qxx qspi read wrap length enumeration definition
uint8_t w25qxx_read_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
read the security register
uint8_t w25qxx_program_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num, uint8_t data[256])
program the security register
uint8_t w25qxx_individual_block_lock(w25qxx_handle_t *handle, uint32_t addr)
lock the individual block
uint8_t w25qxx_read_block_lock(w25qxx_handle_t *handle, uint32_t addr, uint8_t *value)
read the block lock
uint8_t w25qxx_get_manufacturer_device_id_quad_io(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information with quad io
uint8_t w25qxx_exit_qspi_mode(w25qxx_handle_t *handle)
exit the qspi mode
uint8_t w25qxx_global_block_unlock(w25qxx_handle_t *handle)
unlock the whole block
w25qxx_qspi_read_dummy_t
w25qxx qspi read dummy enumeration definition
uint8_t w25qxx_fast_read_dual_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual output in the fast mode
uint8_t w25qxx_individual_block_unlock(w25qxx_handle_t *handle, uint32_t addr)
unlock the individual block
w25qxx_security_register_t
w25qxx security register enumeration definition
uint8_t w25qxx_octal_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
octal word read with quad io
uint8_t w25qxx_get_jedec_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t device_id[2])
get the jedec id information
w25qxx_burst_wrap_t
w25qxx burst wrap enumeration definition
uint8_t w25qxx_get_status3(w25qxx_handle_t *handle, uint8_t *status)
get the status 3
uint8_t w25qxx_set_read_parameters(w25qxx_handle_t *handle, w25qxx_qspi_read_dummy_t dummy, w25qxx_qspi_read_wrap_length_t length)
set the read parameters
w25qxx_status1_t
w25qxx status 1 enumeration definition
uint8_t w25qxx_get_status2(w25qxx_handle_t *handle, uint8_t *status)
get the status 2
uint8_t w25qxx_enter_qspi_mode(w25qxx_handle_t *handle)
enter the qspi mode
uint8_t w25qxx_get_status1(w25qxx_handle_t *handle, uint8_t *status)
get the status 1
uint8_t w25qxx_set_status2(w25qxx_handle_t *handle, uint8_t status)
set the status 2
uint8_t w25qxx_global_block_lock(w25qxx_handle_t *handle)
lock the whole block
uint8_t w25qxx_enable_reset(w25qxx_handle_t *handle)
enable the reset
uint8_t w25qxx_fast_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad io in the fast mode
uint8_t w25qxx_disable_write(w25qxx_handle_t *handle)
disable writing
uint8_t w25qxx_set_burst_with_wrap(w25qxx_handle_t *handle, w25qxx_burst_wrap_t wrap)
set the burst with wrap
uint8_t w25qxx_erase_program_suspend(w25qxx_handle_t *handle)
suspend erase or program
uint8_t w25qxx_fast_read_dual_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with dual io in the fast mode
w25qxx_status3_t
w25qxx status 3 enumeration definition
uint8_t w25qxx_word_read_quad_io(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
word read with quad io
uint8_t w25qxx_set_status3(w25qxx_handle_t *handle, uint8_t status)
set the status 3
uint8_t w25qxx_enable_write(w25qxx_handle_t *handle)
enable writing
uint8_t w25qxx_erase_security_register(w25qxx_handle_t *handle, w25qxx_security_register_t num)
erase the security register
uint8_t w25qxx_fast_read_quad_output(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read with quad output in the fast mode
@ W25QXX_STATUS2_SECURITY_REGISTER_3_LOCK_BITS
@ W25QXX_STATUS2_SECURITY_REGISTER_2_LOCK_BITS
@ W25QXX_STATUS2_SUSPEND_STATUS
@ W25QXX_STATUS2_COMPLEMENT_PROTECT
@ W25QXX_STATUS2_STATUS_REGISTER_PROTECT_1
@ W25QXX_STATUS2_SECURITY_REGISTER_1_LOCK_BITS
@ W25QXX_STATUS2_QUAD_ENABLE
@ W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_64_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_32_BYTE
@ W25QXX_QSPI_READ_WRAP_LENGTH_16_BYTE
@ W25QXX_QSPI_READ_DUMMY_4_55MHZ
@ W25QXX_QSPI_READ_DUMMY_6_80MHZ
@ W25QXX_QSPI_READ_DUMMY_2_33MHZ
@ W25QXX_QSPI_READ_DUMMY_8_80MHZ
@ W25QXX_SECURITY_REGISTER_2
@ W25QXX_SECURITY_REGISTER_3
@ W25QXX_SECURITY_REGISTER_1
@ W25QXX_BURST_WRAP_64_BYTE
@ W25QXX_BURST_WRAP_8_BYTE
@ W25QXX_BURST_WRAP_32_BYTE
@ W25QXX_BURST_WRAP_NONE
@ W25QXX_BURST_WRAP_16_BYTE
@ W25QXX_STATUS1_STATUS_REGISTER_PROTECT_0
@ W25QXX_STATUS1_WRITE_ENABLE_LATCH
@ W25QXX_STATUS1_BLOCK_PROTECT_1
@ W25QXX_STATUS1_TOP_BOTTOM_PROTECT_OR_BLOCK_PROTECT_3
@ W25QXX_STATUS1_BLOCK_PROTECT_0
@ W25QXX_STATUS1_SECTOR_PROTECT_OR_TOP_BOTTOM_PROTECT
@ W25QXX_STATUS1_BLOCK_PROTECT_2
@ W25QXX_STATUS1_ERASE_WRITE_PROGRESS
@ W25QXX_STATUS3_CURRENT_ADDRESS_MODE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_75_PERCENTAGE
@ W25QXX_STATUS3_WRITE_PROTECT_SELECTION
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_50_PERCENTAGE
@ W25QXX_STATUS3_HOLD_RESET_FUNCTION
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_100_PERCENTAGE
@ W25QXX_STATUS3_POWER_UP_ADDRESS_MODE
@ W25QXX_STATUS3_OUTPUT_DRIVER_STRENGTH_25_PERCENTAGE
uint8_t w25qxx_chip_erase(w25qxx_handle_t *handle)
erase the chip
uint8_t w25qxx_release_power_down(w25qxx_handle_t *handle)
release power down
uint8_t w25qxx_only_spi_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read only in the spi interface
uint8_t w25qxx_block_erase_32k(w25qxx_handle_t *handle, uint32_t addr)
erase the 32k block
uint8_t w25qxx_get_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t *mode)
get the chip address mode
uint8_t w25qxx_set_interface(w25qxx_handle_t *handle, w25qxx_interface_t interface)
set the chip interface
struct w25qxx_handle_s w25qxx_handle_t
w25qxx handle structure definition
struct w25qxx_info_s w25qxx_info_t
w25qxx information structure definition
uint8_t w25qxx_page_program(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
page program
uint8_t w25qxx_set_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t enable)
enable or disable the dual quad spi
uint8_t w25qxx_get_type(w25qxx_handle_t *handle, w25qxx_type_t *type)
get the chip type
w25qxx_type_t
w25qxx type enumeration definition
uint8_t w25qxx_get_interface(w25qxx_handle_t *handle, w25qxx_interface_t *interface)
get the chip interface
uint8_t w25qxx_init(w25qxx_handle_t *handle)
initialize the chip
uint8_t w25qxx_get_manufacturer_device_id(w25qxx_handle_t *handle, uint8_t *manufacturer, uint8_t *device_id)
get the manufacturer && device id information
uint8_t w25qxx_info(w25qxx_info_t *info)
get chip's information
uint8_t w25qxx_sector_erase_4k(w25qxx_handle_t *handle, uint32_t addr)
erase the 4k sector
uint8_t w25qxx_deinit(w25qxx_handle_t *handle)
close the chip
w25qxx_address_mode_t
w25qxx address mode enumeration definition
uint8_t w25qxx_set_type(w25qxx_handle_t *handle, w25qxx_type_t type)
set the chip type
uint8_t w25qxx_write(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
write data
uint8_t w25qxx_fast_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read in the fast mode
w25qxx_interface_t
w25qxx interface enumeration definition
uint8_t w25qxx_set_address_mode(w25qxx_handle_t *handle, w25qxx_address_mode_t mode)
set the chip address mode
uint8_t w25qxx_get_dual_quad_spi(w25qxx_handle_t *handle, w25qxx_bool_t *enable)
get the dual quad spi status
uint8_t w25qxx_power_down(w25qxx_handle_t *handle)
power down
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
w25qxx_bool_t
w25qxx bool enumeration definition
@ W25Q80
@ W25Q01
@ W25Q64
@ W25Q10
@ W25Q32
@ W25Q02
@ W25Q512
@ W25Q20
@ W25Q16
@ W25Q128
@ W25Q40
@ W25Q256
@ W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_INTERFACE_QSPI
@ W25QXX_INTERFACE_SPI
@ W25QXX_BOOL_FALSE
@ W25QXX_BOOL_TRUE
uint8_t w25qxx_write_read_reg(w25qxx_handle_t *handle, uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
write and read register
w25qxx handle structure definition
uint8_t buf[256+6]
uint8_t(* spi_qspi_write_read)(uint8_t instruction, uint8_t instruction_line, uint32_t address, uint8_t address_line, uint8_t address_len, uint32_t alternate, uint8_t alternate_line, uint8_t alternate_len, uint8_t dummy, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len, uint8_t data_line)
void(* delay_ms)(uint32_t ms)
uint8_t(* spi_qspi_deinit)(void)
void(* debug_print)(const char *const fmt,...)
void(* delay_us)(uint32_t us)
uint8_t dual_quad_spi_enable
uint8_t buf_4k[4096+1]
uint8_t(* spi_qspi_init)(void)
w25qxx information structure definition
float supply_voltage_max_v
uint32_t driver_version
char interface[16]
char manufacturer_name[32]
float supply_voltage_min_v
char chip_name[32]