LibDriver ADXL362
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driver_adxl362.c
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1
36
37#include "driver_adxl362.h"
38
42#define CHIP_NAME "Analog Devices ADXL362"
43#define MANUFACTURER_NAME "Analog Devices"
44#define SUPPLY_VOLTAGE_MIN 1.6f
45#define SUPPLY_VOLTAGE_MAX 3.5f
46#define MAX_CURRENT 0.013f
47#define TEMPERATURE_MIN -40.0f
48#define TEMPERATURE_MAX 85.0f
49#define DRIVER_VERSION 1000
50
54#define ADXL362_REG_DEVID_AD 0x00
55#define ADXL362_REG_DEVID_MST 0x01
56#define ADXL362_REG_PARTID 0x02
57#define ADXL362_REG_REVID 0x03
58#define ADXL362_REG_XDATA 0x08
59#define ADXL362_REG_YDATA 0x09
60#define ADXL362_REG_ZDATA 0x0A
61#define ADXL362_REG_STATUS 0x0B
62#define ADXL362_REG_FIFO_ENTRIES_L 0x0C
63#define ADXL362_REG_FIFO_ENTRIES_H 0x0D
64#define ADXL362_REG_XDATA_L 0x0E
65#define ADXL362_REG_XDATA_H 0x0F
66#define ADXL362_REG_YDATA_L 0x10
67#define ADXL362_REG_YDATA_H 0x11
68#define ADXL362_REG_ZDATA_L 0x12
69#define ADXL362_REG_ZDATA_H 0x13
70#define ADXL362_REG_TEMP_L 0x14
71#define ADXL362_REG_TEMP_H 0x15
72#define ADXL362_REG_SOFT_RESET 0x1F
73#define ADXL362_REG_THRESH_ACT_L 0x20
74#define ADXL362_REG_THRESH_ACT_H 0x21
75#define ADXL362_REG_TIME_ACT 0x22
76#define ADXL362_REG_THRESH_INACT_L 0x23
77#define ADXL362_REG_THRESH_INACT_H 0x24
78#define ADXL362_REG_TIME_INACT_L 0x25
79#define ADXL362_REG_TIME_INACT_H 0x26
80#define ADXL362_REG_ACT_INACT_CTL 0x27
81#define ADXL362_REG_FIFO_CONTROL 0x28
82#define ADXL362_REG_FIFO_SAMPLES 0x29
83#define ADXL362_REG_INTMAP1 0x2A
84#define ADXL362_REG_INTMAP2 0x2B
85#define ADXL362_REG_FILTER_CTL 0x2C
86#define ADXL362_REG_POWER_CTL 0x2D
87#define ADXL362_REG_SELF_TEST 0x2E
88
100static uint8_t a_adxl362_read(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
101{
102 if (handle->spi_read_address16(((uint16_t)(0x0B) << 8) | reg, buf, len) != 0) /* read data */
103 {
104 return 1; /* return error */
105 }
106 else
107 {
108 return 0; /* success return 0 */
109 }
110}
111
123static uint8_t a_adxl362_write(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
124{
125 if (handle->spi_write_address16(((uint16_t)(0x0A) << 8) | reg, buf, len) != 0) /* write data */
126 {
127 return 1; /* return error */
128 }
129 else
130 {
131 return 0; /* success return 0 */
132 }
133}
134
145static uint8_t a_adxl362_read_fifo(adxl362_handle_t *handle, uint8_t *buf, uint16_t len)
146{
147 if (handle->spi_read(0x0D, buf, len) != 0) /* read data */
148 {
149 return 1; /* return error */
150 }
151 else
152 {
153 return 0; /* success return 0 */
154 }
155}
156
168uint8_t adxl362_get_revision(adxl362_handle_t *handle, uint8_t *id)
169{
170 uint8_t res;
171
172 if (handle == NULL) /* check handle */
173 {
174 return 2; /* return error */
175 }
176 if (handle->inited != 1) /* check handle initialization */
177 {
178 return 3; /* return error */
179 }
180
181 res = a_adxl362_read(handle, ADXL362_REG_REVID, id, 1); /* read revision id */
182 if (res != 0) /* check the result */
183 {
184 handle->debug_print("adxl362: read revision id failed.\n"); /* read revision id failed */
185
186 return 1; /* return error */
187 }
188
189 return 0; /* success return 0 */
190}
191
204uint8_t adxl362_init(adxl362_handle_t *handle)
205{
206 uint8_t id;
207 uint8_t cmd;
208
209 if (handle == NULL) /* check handle */
210 {
211 return 2; /* return error */
212 }
213 if (handle->debug_print == NULL) /* check debug_print */
214 {
215 return 3; /* return error */
216 }
217 if (handle->spi_init == NULL) /* check spi_init */
218 {
219 handle->debug_print("adxl362: spi_init is null.\n"); /* spi_init is null */
220
221 return 3; /* return error */
222 }
223 if (handle->spi_deinit == NULL) /* check spi_deinit */
224 {
225 handle->debug_print("adxl362: spi_deinit is null.\n"); /* spi_deinit is null */
226
227 return 3; /* return error */
228 }
229 if (handle->spi_read == NULL) /* check spi_read */
230 {
231 handle->debug_print("adxl362: spi_read is null.\n"); /* spi_read is null */
232
233 return 3; /* return error */
234 }
235 if (handle->spi_read_address16 == NULL) /* check spi_read_address16 */
236 {
237 handle->debug_print("adxl362: spi_read_address16 is null.\n"); /* spi_read_address16 is null */
238
239 return 3; /* return error */
240 }
241 if (handle->spi_write_address16 == NULL) /* check spi_write_address16 */
242 {
243 handle->debug_print("adxl362: spi_write_address16 is null.\n"); /* spi_write_address16 is null */
244
245 return 3; /* return error */
246 }
247 if (handle->delay_ms == NULL) /* check delay_ms */
248 {
249 handle->debug_print("adxl362: delay_ms is null.\n"); /* delay_ms is null */
250
251 return 3; /* return error */
252 }
253 if (handle->receive_callback == NULL) /* check receive_callback */
254 {
255 handle->debug_print("adxl362: receive_callback is null.\n"); /* receive_callback is null */
256
257 return 3; /* return error */
258 }
259
260 if (handle->spi_init() != 0) /* initialize spi bus */
261 {
262 handle->debug_print("adxl362: spi init failed.\n"); /* spi init failed */
263
264 return 1; /* return error */
265 }
266
267 if (a_adxl362_read(handle, ADXL362_REG_DEVID_AD, (uint8_t *)&id, 1) != 0) /* read id */
268 {
269 handle->debug_print("adxl362: read failed.\n"); /* read failed */
270 (void)handle->spi_deinit(); /* close */
271
272 return 4; /* return error */
273 }
274 if (id != 0xAD) /* check id */
275 {
276 handle->debug_print("adxl362: id is invalid.\n"); /* id is invalid */
277 (void)handle->spi_deinit(); /* close */
278
279 return 4; /* return error */
280 }
281 if (a_adxl362_read(handle, ADXL362_REG_DEVID_MST, (uint8_t *)&id, 1) != 0) /* read id */
282 {
283 handle->debug_print("adxl362: read failed.\n"); /* read failed */
284 (void)handle->spi_deinit(); /* close */
285
286 return 4; /* return error */
287 }
288 if (id != 0x1D) /* check id */
289 {
290 handle->debug_print("adxl362: id is invalid.\n"); /* id is invalid */
291 (void)handle->spi_deinit(); /* close */
292
293 return 4; /* return error */
294 }
295 if (a_adxl362_read(handle, ADXL362_REG_PARTID, (uint8_t *)&id, 1) != 0) /* read part id */
296 {
297 handle->debug_print("adxl362: read failed.\n"); /* read failed */
298 (void)handle->spi_deinit(); /* close */
299
300 return 4; /* return error */
301 }
302 if (id != 0xF2) /* check id */
303 {
304 handle->debug_print("adxl362: id is invalid.\n"); /* id is invalid */
305 (void)handle->spi_deinit(); /* close */
306
307 return 4; /* return error */
308 }
309
310 cmd = 0x52; /* set the reset command */
311 if (a_adxl362_write(handle, ADXL362_REG_SOFT_RESET, &cmd, 1) != 0) /* soft reset */
312 {
313 handle->debug_print("adxl362: soft reset failed.\n"); /* soft reset failed */
314 (void)handle->spi_deinit(); /* close */
315
316 return 5; /* return error */
317 }
318 handle->delay_ms(2); /* delay 2ms */
319 handle->inited = 1; /* flag finish initialization */
320
321 return 0; /* success return 0 */
322}
323
335uint8_t adxl362_deinit(adxl362_handle_t *handle)
336{
337 uint8_t res;
338 uint8_t prev;
339
340 if (handle == NULL) /* check handle */
341 {
342 return 2; /* return error */
343 }
344 if (handle->inited != 1) /* check handle initialization */
345 {
346 return 3; /* return error */
347 }
348
349 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, (uint8_t *)&prev, 1); /* read config */
350 if (res != 0) /* check the result */
351 {
352 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
353
354 return 4; /* return error */
355 }
356 prev &= ~(3 << 0); /* standby mode */
357 res = a_adxl362_write(handle, ADXL362_REG_POWER_CTL, (uint8_t *)&prev, 1); /* write config */
358 if (res != 0) /* check result */
359 {
360 handle->debug_print("adxl362: write power control failed.\n"); /* write power control failed */
361
362 return 4; /* return error */
363 }
364
365 res = handle->spi_deinit(); /* spi deinit */
366 if (res != 0) /* check result */
367 {
368 return 1; /* return error */
369 }
370 else
371 {
372 handle->inited = 0; /* flag close */
373
374 return 0; /* success return 0 */
375 }
376}
377
390uint8_t adxl362_read_8msb(adxl362_handle_t *handle, int8_t raw[3], float g[3])
391{
392 uint8_t res;
393 uint8_t prev;
394 uint8_t range;
395 uint8_t buf[3];
396
397 if (handle == NULL) /* check handle */
398 {
399 return 2; /* return error */
400 }
401 if (handle->inited != 1) /* check handle initialization */
402 {
403 return 3; /* return error */
404 }
405
406 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
407 if (res != 0) /* check the result */
408 {
409 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
410
411 return 1; /* return error */
412 }
413 res = a_adxl362_read(handle, ADXL362_REG_XDATA, buf, 3); /* read data */
414 if (res != 0) /* check the result */
415 {
416 handle->debug_print("adxl362: read data failed.\n"); /* read data failed */
417
418 return 1; /* return error */
419 }
420 raw[0] = (int8_t)buf[0]; /* copy x */
421 raw[1] = (int8_t)buf[1]; /* copy y */
422 raw[2] = (int8_t)buf[2]; /* copy z */
423 range = (prev >> 6) & 0x3; /* get the range */
424 if (range == 0) /* 2g */
425 {
426 g[0] = (float)raw[0] * 16.0f / 1000.0f; /* convert x */
427 g[1] = (float)raw[1] * 16.0f / 1000.0f; /* convert y */
428 g[2] = (float)raw[2] * 16.0f / 1000.0f; /* convert z */
429 }
430 else if (range == 1) /* 4g */
431 {
432 g[0] = (float)raw[0] * 16.0f / 500.0f; /* convert x */
433 g[1] = (float)raw[1] * 16.0f / 500.0f; /* convert y */
434 g[2] = (float)raw[2] * 16.0f / 500.0f; /* convert z */
435 }
436 else /* 8g */
437 {
438 g[0] = (float)raw[0] * 16.0f / 235.0f; /* convert x */
439 g[1] = (float)raw[1] * 16.0f / 235.0f; /* convert y */
440 g[2] = (float)raw[2] * 16.0f / 235.0f; /* convert z */
441 }
442
443 return 0; /* success return 0 */
444}
445
458uint8_t adxl362_read_temperature(adxl362_handle_t *handle, int16_t *raw, float *temp)
459{
460 uint8_t res;
461 uint8_t buf[2];
462
463 if (handle == NULL) /* check handle */
464 {
465 return 2; /* return error */
466 }
467 if (handle->inited != 1) /* check handle initialization */
468 {
469 return 3; /* return error */
470 }
471
472 res = a_adxl362_read(handle, ADXL362_REG_TEMP_L, buf, 2); /* read temperature */
473 if (res != 0) /* check the result */
474 {
475 handle->debug_print("adxl362: read temperature failed.\n"); /* read temperature failed */
476
477 return 1; /* return error */
478 }
479 *raw = (int16_t)((uint16_t)((((uint16_t)buf[1]) << 8) | buf[0])); /* get the raw data */
480 *temp = (float)(*raw) * 0.065f; /* convert the temperature */
481
482 return 0; /* success return 0 */
483}
484
496uint8_t adxl362_get_status(adxl362_handle_t *handle, uint8_t *status)
497{
498 uint8_t res;
499
500 if (handle == NULL) /* check handle */
501 {
502 return 2; /* return error */
503 }
504 if (handle->inited != 1) /* check handle initialization */
505 {
506 return 3; /* return error */
507 }
508
509 res = a_adxl362_read(handle, ADXL362_REG_STATUS, status, 1); /* read status */
510 if (res != 0) /* check the result */
511 {
512 handle->debug_print("adxl362: read status failed.\n"); /* read status failed */
513
514 return 1; /* return error */
515 }
516
517 return 0; /* success return 0 */
518}
519
531uint8_t adxl362_get_fifo_counter(adxl362_handle_t *handle, uint16_t *counter)
532{
533 uint8_t res;
534 uint8_t buf[2];
535
536 if (handle == NULL) /* check handle */
537 {
538 return 2; /* return error */
539 }
540 if (handle->inited != 1) /* check handle initialization */
541 {
542 return 3; /* return error */
543 }
544
545 res = a_adxl362_read(handle, ADXL362_REG_FIFO_ENTRIES_L, buf, 2); /* read fifo entries */
546 if (res != 0) /* check the result */
547 {
548 handle->debug_print("adxl362: read fifo entries failed.\n"); /* read fifo entries failed */
549
550 return 1; /* return error */
551 }
552 *counter = (uint16_t)(((uint16_t)buf[1]) << 8) | buf[0]; /* set the counter */
553 *counter = (*counter) & 0x200; /* get the valid part */
554
555 return 0; /* success return 0 */
556}
557
568uint8_t adxl362_soft_reset(adxl362_handle_t *handle)
569{
570 uint8_t res;
571 uint8_t prev;
572
573 if (handle == NULL) /* check handle */
574 {
575 return 2; /* return error */
576 }
577 if (handle->inited != 1) /* check handle initialization */
578 {
579 return 3; /* return error */
580 }
581
582 prev = 0x52; /* soft reset command */
583 res = a_adxl362_write(handle, ADXL362_REG_SOFT_RESET, &prev, 1); /* write soft reset */
584 if (res != 0) /* check the result */
585 {
586 handle->debug_print("adxl362: write soft reset failed.\n"); /* write soft reset failed */
587
588 return 1; /* return error */
589 }
590 handle->delay_ms(2); /* delay 2ms */
591
592 return 0; /* success return 0 */
593}
594
606uint8_t adxl362_set_fifo_temperature(adxl362_handle_t *handle, adxl362_bool_t enable)
607{
608 uint8_t res;
609 uint8_t prev;
610
611 if (handle == NULL) /* check handle */
612 {
613 return 2; /* return error */
614 }
615 if (handle->inited != 1) /* check handle initialization */
616 {
617 return 3; /* return error */
618 }
619
620 res = a_adxl362_read(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* read fifo control */
621 if (res != 0) /* check the result */
622 {
623 handle->debug_print("adxl362: read fifo control failed.\n"); /* read fifo control failed */
624
625 return 1; /* return error */
626 }
627 prev &= ~(1 << 2); /* clear settings */
628 prev |= (enable << 2); /* set the bool */
629 res = a_adxl362_write(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* write fifo control */
630 if (res != 0) /* check the result */
631 {
632 handle->debug_print("adxl362: write fifo control failed.\n"); /* write fifo control failed */
633
634 return 1; /* return error */
635 }
636
637 return 0; /* success return 0 */
638}
639
651uint8_t adxl362_get_fifo_temperature(adxl362_handle_t *handle, adxl362_bool_t *enable)
652{
653 uint8_t res;
654 uint8_t prev;
655
656 if (handle == NULL) /* check handle */
657 {
658 return 2; /* return error */
659 }
660 if (handle->inited != 1) /* check handle initialization */
661 {
662 return 3; /* return error */
663 }
664
665 res = a_adxl362_read(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* read fifo control */
666 if (res != 0) /* check the result */
667 {
668 handle->debug_print("adxl362: read fifo control failed.\n"); /* read fifo control failed */
669
670 return 1; /* return error */
671 }
672 *enable = (adxl362_bool_t)((prev >> 2) & 0x01); /* get the bool */
673
674 return 0; /* success return 0 */
675}
676
688uint8_t adxl362_set_fifo_mode(adxl362_handle_t *handle, adxl362_fifo_mode_t mode)
689{
690 uint8_t res;
691 uint8_t prev;
692
693 if (handle == NULL) /* check handle */
694 {
695 return 2; /* return error */
696 }
697 if (handle->inited != 1) /* check handle initialization */
698 {
699 return 3; /* return error */
700 }
701
702 res = a_adxl362_read(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* read fifo control */
703 if (res != 0) /* check the result */
704 {
705 handle->debug_print("adxl362: read fifo control failed.\n"); /* read fifo control failed */
706
707 return 1; /* return error */
708 }
709 prev &= ~(3 << 0); /* clear settings */
710 prev |= (mode << 0); /* set the mode */
711 res = a_adxl362_write(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* write fifo control */
712 if (res != 0) /* check the result */
713 {
714 handle->debug_print("adxl362: write fifo control failed.\n"); /* write fifo control failed */
715
716 return 1; /* return error */
717 }
718
719 return 0; /* success return 0 */
720}
721
733uint8_t adxl362_get_fifo_mode(adxl362_handle_t *handle, adxl362_fifo_mode_t *mode)
734{
735 uint8_t res;
736 uint8_t prev;
737
738 if (handle == NULL) /* check handle */
739 {
740 return 2; /* return error */
741 }
742 if (handle->inited != 1) /* check handle initialization */
743 {
744 return 3; /* return error */
745 }
746
747 res = a_adxl362_read(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* read fifo control */
748 if (res != 0) /* check the result */
749 {
750 handle->debug_print("adxl362: read fifo control failed.\n"); /* read fifo control failed */
751
752 return 1; /* return error */
753 }
754 *mode = (adxl362_fifo_mode_t)(prev & 0x03); /* get the mode */
755
756 return 0; /* success return 0 */
757}
758
771uint8_t adxl362_set_fifo_sample(adxl362_handle_t *handle, uint16_t sample)
772{
773 uint8_t res;
774 uint8_t prev;
775
776 if (handle == NULL) /* check handle */
777 {
778 return 2; /* return error */
779 }
780 if (handle->inited != 1) /* check handle initialization */
781 {
782 return 3; /* return error */
783 }
784 if (sample > 511) /* check sample */
785 {
786 handle->debug_print("adxl362: sample > 511.\n"); /* sample > 511 */
787
788 return 4; /* return error */
789 }
790
791 res = a_adxl362_read(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* read fifo control */
792 if (res != 0) /* check the result */
793 {
794 handle->debug_print("adxl362: read fifo control failed.\n"); /* read fifo control failed */
795
796 return 1; /* return error */
797 }
798 prev &= ~(1 << 3); /* clear settings */
799 prev |= (((sample >> 8) & 0x01) << 3); /* set the bit 8 */
800 res = a_adxl362_write(handle, ADXL362_REG_FIFO_SAMPLES, &prev, 1); /* write fifo control */
801 if (res != 0) /* check the result */
802 {
803 handle->debug_print("adxl362: write fifo samples failed.\n"); /* write fifo samples failed */
804
805 return 1; /* return error */
806 }
807
808 prev = sample & 0xFF; /* get the bit7 - bit0 */
809 res = a_adxl362_write(handle, ADXL362_REG_FIFO_SAMPLES, &prev, 1); /* write fifo control */
810 if (res != 0) /* check the result */
811 {
812 handle->debug_print("adxl362: write fifo samples failed.\n"); /* write fifo samples failed */
813
814 return 1; /* return error */
815 }
816
817 return 0; /* success return 0 */
818}
819
831uint8_t adxl362_get_fifo_sample(adxl362_handle_t *handle, uint16_t *sample)
832{
833 uint8_t res;
834 uint8_t prev;
835 uint8_t prev2;
836
837 if (handle == NULL) /* check handle */
838 {
839 return 2; /* return error */
840 }
841 if (handle->inited != 1) /* check handle initialization */
842 {
843 return 3; /* return error */
844 }
845
846 res = a_adxl362_read(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* read fifo control */
847 if (res != 0) /* check the result */
848 {
849 handle->debug_print("adxl362: read fifo control failed.\n"); /* read fifo control failed */
850
851 return 1; /* return error */
852 }
853 res = a_adxl362_read(handle, ADXL362_REG_FIFO_SAMPLES, &prev2, 1); /* read fifo control */
854 if (res != 0) /* check the result */
855 {
856 handle->debug_print("adxl362: read fifo samples failed.\n"); /* read fifo samples failed */
857
858 return 1; /* return error */
859 }
860 *sample = (uint16_t)((uint16_t)((prev >> 3) & 0x01) << 8) | prev2; /* get the sample */
861
862 return 0; /* success return 0 */
863}
864
876uint8_t adxl362_set_interrupt_pin1_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t level)
877{
878 uint8_t res;
879 uint8_t prev;
880
881 if (handle == NULL) /* check handle */
882 {
883 return 2; /* return error */
884 }
885 if (handle->inited != 1) /* check handle initialization */
886 {
887 return 3; /* return error */
888 }
889
890 res = a_adxl362_read(handle, ADXL362_REG_INTMAP1, &prev, 1); /* read int1 map */
891 if (res != 0) /* check the result */
892 {
893 handle->debug_print("adxl362: read int1 map failed.\n"); /* read int1 map failed */
894
895 return 1; /* return error */
896 }
897 prev &= ~(1 << 7); /* clear settings */
898 prev |= (level << 7); /* set the level */
899 res = a_adxl362_write(handle, ADXL362_REG_INTMAP1, &prev, 1); /* write int1 map */
900 if (res != 0) /* check the result */
901 {
902 handle->debug_print("adxl362: write int1 map failed.\n"); /* write int1 map failed */
903
904 return 1; /* return error */
905 }
906
907 return 0; /* success return 0 */
908}
909
921uint8_t adxl362_get_interrupt_pin1_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t *level)
922{
923 uint8_t res;
924 uint8_t prev;
925
926 if (handle == NULL) /* check handle */
927 {
928 return 2; /* return error */
929 }
930 if (handle->inited != 1) /* check handle initialization */
931 {
932 return 3; /* return error */
933 }
934
935 res = a_adxl362_read(handle, ADXL362_REG_INTMAP1, &prev, 1); /* read int1 map */
936 if (res != 0) /* check the result */
937 {
938 handle->debug_print("adxl362: read int1 map failed.\n"); /* read int1 map failed */
939
940 return 1; /* return error */
941 }
942 *level = (adxl362_interrupt_pin_level_t)((prev >> 7) & 0x01); /* get the level */
943
944 return 0; /* success return 0 */
945}
946
959uint8_t adxl362_set_interrupt_pin1_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t enable)
960{
961 uint8_t res;
962 uint8_t prev;
963
964 if (handle == NULL) /* check handle */
965 {
966 return 2; /* return error */
967 }
968 if (handle->inited != 1) /* check handle initialization */
969 {
970 return 3; /* return error */
971 }
972
973 res = a_adxl362_read(handle, ADXL362_REG_INTMAP1, &prev, 1); /* read int1 map */
974 if (res != 0) /* check the result */
975 {
976 handle->debug_print("adxl362: read int1 map failed.\n"); /* read int1 map failed */
977
978 return 1; /* return error */
979 }
980 prev &= ~(1 << map); /* clear settings */
981 prev |= (enable << map); /* set the bool */
982 res = a_adxl362_write(handle, ADXL362_REG_INTMAP1, &prev, 1); /* write int1 map */
983 if (res != 0) /* check the result */
984 {
985 handle->debug_print("adxl362: write int1 map failed.\n"); /* write int1 map failed */
986
987 return 1; /* return error */
988 }
989
990 return 0; /* success return 0 */
991}
992
1005uint8_t adxl362_get_interrupt_pin1_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t *enable)
1006{
1007 uint8_t res;
1008 uint8_t prev;
1009
1010 if (handle == NULL) /* check handle */
1011 {
1012 return 2; /* return error */
1013 }
1014 if (handle->inited != 1) /* check handle initialization */
1015 {
1016 return 3; /* return error */
1017 }
1018
1019 res = a_adxl362_read(handle, ADXL362_REG_INTMAP1, &prev, 1); /* read int1 map */
1020 if (res != 0) /* check the result */
1021 {
1022 handle->debug_print("adxl362: read int1 map failed.\n"); /* read int1 map failed */
1023
1024 return 1; /* return error */
1025 }
1026 *enable = (adxl362_bool_t)((prev >> map) & 0x01); /* get the bool */
1027
1028 return 0; /* success return 0 */
1029}
1030
1042uint8_t adxl362_set_interrupt_pin2_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t level)
1043{
1044 uint8_t res;
1045 uint8_t prev;
1046
1047 if (handle == NULL) /* check handle */
1048 {
1049 return 2; /* return error */
1050 }
1051 if (handle->inited != 1) /* check handle initialization */
1052 {
1053 return 3; /* return error */
1054 }
1055
1056 res = a_adxl362_read(handle, ADXL362_REG_INTMAP2, &prev, 1); /* read int2 map */
1057 if (res != 0) /* check the result */
1058 {
1059 handle->debug_print("adxl362: read int2 map failed.\n"); /* read int2 map failed */
1060
1061 return 1; /* return error */
1062 }
1063 prev &= ~(1 << 7); /* clear settings */
1064 prev |= (level << 7); /* set the level */
1065 res = a_adxl362_write(handle, ADXL362_REG_INTMAP2, &prev, 1); /* write int2 map */
1066 if (res != 0) /* check the result */
1067 {
1068 handle->debug_print("adxl362: write int2 map failed.\n"); /* write int2 map failed */
1069
1070 return 1; /* return error */
1071 }
1072
1073 return 0; /* success return 0 */
1074}
1075
1087uint8_t adxl362_get_interrupt_pin2_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t *level)
1088{
1089 uint8_t res;
1090 uint8_t prev;
1091
1092 if (handle == NULL) /* check handle */
1093 {
1094 return 2; /* return error */
1095 }
1096 if (handle->inited != 1) /* check handle initialization */
1097 {
1098 return 3; /* return error */
1099 }
1100
1101 res = a_adxl362_read(handle, ADXL362_REG_INTMAP2, &prev, 1); /* read int2 map */
1102 if (res != 0) /* check the result */
1103 {
1104 handle->debug_print("adxl362: read int2 map failed.\n"); /* read int2 map failed */
1105
1106 return 1; /* return error */
1107 }
1108 *level = (adxl362_interrupt_pin_level_t)((prev >> 7) & 0x01); /* get the level */
1109
1110 return 0; /* success return 0 */
1111}
1112
1125uint8_t adxl362_set_interrupt_pin2_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t enable)
1126{
1127 uint8_t res;
1128 uint8_t prev;
1129
1130 if (handle == NULL) /* check handle */
1131 {
1132 return 2; /* return error */
1133 }
1134 if (handle->inited != 1) /* check handle initialization */
1135 {
1136 return 3; /* return error */
1137 }
1138
1139 res = a_adxl362_read(handle, ADXL362_REG_INTMAP2, &prev, 1); /* read int2 map */
1140 if (res != 0) /* check the result */
1141 {
1142 handle->debug_print("adxl362: read int2 map failed.\n"); /* read int2 map failed */
1143
1144 return 1; /* return error */
1145 }
1146 prev &= ~(1 << map); /* clear settings */
1147 prev |= (enable << map); /* set the bool */
1148 res = a_adxl362_write(handle, ADXL362_REG_INTMAP2, &prev, 1); /* write int2 map */
1149 if (res != 0) /* check the result */
1150 {
1151 handle->debug_print("adxl362: write int2 map failed.\n"); /* write int2 map failed */
1152
1153 return 1; /* return error */
1154 }
1155
1156 return 0; /* success return 0 */
1157}
1158
1171uint8_t adxl362_get_interrupt_pin2_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t *enable)
1172{
1173 uint8_t res;
1174 uint8_t prev;
1175
1176 if (handle == NULL) /* check handle */
1177 {
1178 return 2; /* return error */
1179 }
1180 if (handle->inited != 1) /* check handle initialization */
1181 {
1182 return 3; /* return error */
1183 }
1184
1185 res = a_adxl362_read(handle, ADXL362_REG_INTMAP2, &prev, 1); /* read int2 map */
1186 if (res != 0) /* check the result */
1187 {
1188 handle->debug_print("adxl362: read int2 map failed.\n"); /* read int2 map failed */
1189
1190 return 1; /* return error */
1191 }
1192 *enable = (adxl362_bool_t)((prev >> map) & 0x01); /* get the bool */
1193
1194 return 0; /* success return 0 */
1195}
1196
1208uint8_t adxl362_set_range(adxl362_handle_t *handle, adxl362_range_t range)
1209{
1210 uint8_t res;
1211 uint8_t prev;
1212
1213 if (handle == NULL) /* check handle */
1214 {
1215 return 2; /* return error */
1216 }
1217 if (handle->inited != 1) /* check handle initialization */
1218 {
1219 return 3; /* return error */
1220 }
1221
1222 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1223 if (res != 0) /* check the result */
1224 {
1225 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1226
1227 return 1; /* return error */
1228 }
1229 prev &= ~(3 << 6); /* clear settings */
1230 prev |= (range << 6); /* set the range */
1231 res = a_adxl362_write(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* write filter control */
1232 if (res != 0) /* check the result */
1233 {
1234 handle->debug_print("adxl362: write filter control failed.\n"); /* write filter control failed */
1235
1236 return 1; /* return error */
1237 }
1238
1239 return 0; /* success return 0 */
1240}
1241
1253uint8_t adxl362_get_range(adxl362_handle_t *handle, adxl362_range_t *range)
1254{
1255 uint8_t res;
1256 uint8_t prev;
1257
1258 if (handle == NULL) /* check handle */
1259 {
1260 return 2; /* return error */
1261 }
1262 if (handle->inited != 1) /* check handle initialization */
1263 {
1264 return 3; /* return error */
1265 }
1266
1267 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1268 if (res != 0) /* check the result */
1269 {
1270 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1271
1272 return 1; /* return error */
1273 }
1274 *range = (adxl362_range_t)((prev >> 6) & 0x03); /* set the range */
1275
1276 return 0; /* success return 0 */
1277}
1278
1290uint8_t adxl362_set_bandwidth(adxl362_handle_t *handle, adxl362_bandwidth_t bandwidth)
1291{
1292 uint8_t res;
1293 uint8_t prev;
1294
1295 if (handle == NULL) /* check handle */
1296 {
1297 return 2; /* return error */
1298 }
1299 if (handle->inited != 1) /* check handle initialization */
1300 {
1301 return 3; /* return error */
1302 }
1303
1304 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1305 if (res != 0) /* check the result */
1306 {
1307 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1308
1309 return 1; /* return error */
1310 }
1311 prev &= ~(1 << 4); /* clear settings */
1312 prev |= (bandwidth << 4); /* set the bandwidth */
1313 res = a_adxl362_write(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* write filter control */
1314 if (res != 0) /* check the result */
1315 {
1316 handle->debug_print("adxl362: write filter control failed.\n"); /* write filter control failed */
1317
1318 return 1; /* return error */
1319 }
1320
1321 return 0; /* success return 0 */
1322}
1323
1335uint8_t adxl362_get_bandwidth(adxl362_handle_t *handle, adxl362_bandwidth_t *bandwidth)
1336{
1337 uint8_t res;
1338 uint8_t prev;
1339
1340 if (handle == NULL) /* check handle */
1341 {
1342 return 2; /* return error */
1343 }
1344 if (handle->inited != 1) /* check handle initialization */
1345 {
1346 return 3; /* return error */
1347 }
1348
1349 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1350 if (res != 0) /* check the result */
1351 {
1352 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1353
1354 return 1; /* return error */
1355 }
1356 *bandwidth = (adxl362_bandwidth_t)((prev >> 4) & 0x01); /* get the bandwidth */
1357
1358 return 0; /* success return 0 */
1359}
1360
1372uint8_t adxl362_set_interrupt_pin2_as_external_sampling_trigger(adxl362_handle_t *handle, adxl362_bool_t enable)
1373{
1374 uint8_t res;
1375 uint8_t prev;
1376
1377 if (handle == NULL) /* check handle */
1378 {
1379 return 2; /* return error */
1380 }
1381 if (handle->inited != 1) /* check handle initialization */
1382 {
1383 return 3; /* return error */
1384 }
1385
1386 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1387 if (res != 0) /* check the result */
1388 {
1389 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1390
1391 return 1; /* return error */
1392 }
1393 prev &= ~(1 << 3); /* clear settings */
1394 prev |= (enable << 3); /* set the bool */
1395 res = a_adxl362_write(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* write filter control */
1396 if (res != 0) /* check the result */
1397 {
1398 handle->debug_print("adxl362: write filter control failed.\n"); /* write filter control failed */
1399
1400 return 1; /* return error */
1401 }
1402
1403 return 0; /* success return 0 */
1404}
1405
1417uint8_t adxl362_get_interrupt_pin2_as_external_sampling_trigger(adxl362_handle_t *handle, adxl362_bool_t *enable)
1418{
1419 uint8_t res;
1420 uint8_t prev;
1421
1422 if (handle == NULL) /* check handle */
1423 {
1424 return 2; /* return error */
1425 }
1426 if (handle->inited != 1) /* check handle initialization */
1427 {
1428 return 3; /* return error */
1429 }
1430
1431 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1432 if (res != 0) /* check the result */
1433 {
1434 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1435
1436 return 1; /* return error */
1437 }
1438 *enable = (adxl362_bool_t)((prev >> 3) & 0x01); /* get the bool */
1439
1440 return 0; /* success return 0 */
1441}
1442
1454uint8_t adxl362_set_odr(adxl362_handle_t *handle, adxl362_odr_t odr)
1455{
1456 uint8_t res;
1457 uint8_t prev;
1458
1459 if (handle == NULL) /* check handle */
1460 {
1461 return 2; /* return error */
1462 }
1463 if (handle->inited != 1) /* check handle initialization */
1464 {
1465 return 3; /* return error */
1466 }
1467
1468 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1469 if (res != 0) /* check the result */
1470 {
1471 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1472
1473 return 1; /* return error */
1474 }
1475 prev &= ~(7 << 0); /* clear settings */
1476 prev |= (odr << 0); /* set the odr */
1477 res = a_adxl362_write(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* write filter control */
1478 if (res != 0) /* check the result */
1479 {
1480 handle->debug_print("adxl362: write filter control failed.\n"); /* write filter control failed */
1481
1482 return 1; /* return error */
1483 }
1484
1485 return 0; /* success return 0 */
1486}
1487
1499uint8_t adxl362_get_odr(adxl362_handle_t *handle, adxl362_odr_t *odr)
1500{
1501 uint8_t res;
1502 uint8_t prev;
1503
1504 if (handle == NULL) /* check handle */
1505 {
1506 return 2; /* return error */
1507 }
1508 if (handle->inited != 1) /* check handle initialization */
1509 {
1510 return 3; /* return error */
1511 }
1512
1513 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter control */
1514 if (res != 0) /* check the result */
1515 {
1516 handle->debug_print("adxl362: read filter control failed.\n"); /* read filter control failed */
1517
1518 return 1; /* return error */
1519 }
1520 *odr = (adxl362_odr_t)(prev & 0x7); /* set the odr */
1521
1522 return 0; /* success return 0 */
1523}
1524
1536uint8_t adxl362_set_interrupt_pin1_as_external_clock(adxl362_handle_t *handle, adxl362_bool_t enable)
1537{
1538 uint8_t res;
1539 uint8_t prev;
1540
1541 if (handle == NULL) /* check handle */
1542 {
1543 return 2; /* return error */
1544 }
1545 if (handle->inited != 1) /* check handle initialization */
1546 {
1547 return 3; /* return error */
1548 }
1549
1550 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1551 if (res != 0) /* check the result */
1552 {
1553 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1554
1555 return 1; /* return error */
1556 }
1557 prev &= ~(1 << 6); /* clear settings */
1558 prev |= (enable << 6); /* set the bool */
1559 res = a_adxl362_write(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* write power control */
1560 if (res != 0) /* check the result */
1561 {
1562 handle->debug_print("adxl362: write power control failed.\n"); /* write power control failed */
1563
1564 return 1; /* return error */
1565 }
1566
1567 return 0; /* success return 0 */
1568}
1569
1581uint8_t adxl362_get_interrupt_pin1_as_external_clock(adxl362_handle_t *handle, adxl362_bool_t *enable)
1582{
1583 uint8_t res;
1584 uint8_t prev;
1585
1586 if (handle == NULL) /* check handle */
1587 {
1588 return 2; /* return error */
1589 }
1590 if (handle->inited != 1) /* check handle initialization */
1591 {
1592 return 3; /* return error */
1593 }
1594
1595 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1596 if (res != 0) /* check the result */
1597 {
1598 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1599
1600 return 1; /* return error */
1601 }
1602 *enable = (adxl362_bool_t)((prev >> 6) & 0x01); /* get the bool */
1603
1604 return 0; /* success return 0 */
1605}
1606
1618uint8_t adxl362_set_noise_mode(adxl362_handle_t *handle, adxl362_noise_mode_t mode)
1619{
1620 uint8_t res;
1621 uint8_t prev;
1622
1623 if (handle == NULL) /* check handle */
1624 {
1625 return 2; /* return error */
1626 }
1627 if (handle->inited != 1) /* check handle initialization */
1628 {
1629 return 3; /* return error */
1630 }
1631
1632 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1633 if (res != 0) /* check the result */
1634 {
1635 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1636
1637 return 1; /* return error */
1638 }
1639 prev &= ~(3 << 4); /* clear settings */
1640 prev |= (mode << 4); /* set the mode */
1641 res = a_adxl362_write(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* write power control */
1642 if (res != 0) /* check the result */
1643 {
1644 handle->debug_print("adxl362: write power control failed.\n"); /* write power control failed */
1645
1646 return 1; /* return error */
1647 }
1648
1649 return 0; /* success return 0 */
1650}
1651
1663uint8_t adxl362_get_noise_mode(adxl362_handle_t *handle, adxl362_noise_mode_t *mode)
1664{
1665 uint8_t res;
1666 uint8_t prev;
1667
1668 if (handle == NULL) /* check handle */
1669 {
1670 return 2; /* return error */
1671 }
1672 if (handle->inited != 1) /* check handle initialization */
1673 {
1674 return 3; /* return error */
1675 }
1676
1677 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1678 if (res != 0) /* check the result */
1679 {
1680 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1681
1682 return 1; /* return error */
1683 }
1684 *mode = (adxl362_noise_mode_t)((prev >> 4) & 0x03); /* get the mode */
1685
1686 return 0; /* success return 0 */
1687}
1688
1700uint8_t adxl362_set_wake_up(adxl362_handle_t *handle, adxl362_bool_t enable)
1701{
1702 uint8_t res;
1703 uint8_t prev;
1704
1705 if (handle == NULL) /* check handle */
1706 {
1707 return 2; /* return error */
1708 }
1709 if (handle->inited != 1) /* check handle initialization */
1710 {
1711 return 3; /* return error */
1712 }
1713
1714 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1715 if (res != 0) /* check the result */
1716 {
1717 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1718
1719 return 1; /* return error */
1720 }
1721 prev &= ~(1 << 3); /* clear settings */
1722 prev |= (enable << 3); /* set the bool */
1723 res = a_adxl362_write(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* write power control */
1724 if (res != 0) /* check the result */
1725 {
1726 handle->debug_print("adxl362: write power control failed.\n"); /* write power control failed */
1727
1728 return 1; /* return error */
1729 }
1730
1731 return 0; /* success return 0 */
1732}
1733
1745uint8_t adxl362_get_wake_up(adxl362_handle_t *handle, adxl362_bool_t *enable)
1746{
1747 uint8_t res;
1748 uint8_t prev;
1749
1750 if (handle == NULL) /* check handle */
1751 {
1752 return 2; /* return error */
1753 }
1754 if (handle->inited != 1) /* check handle initialization */
1755 {
1756 return 3; /* return error */
1757 }
1758
1759 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1760 if (res != 0) /* check the result */
1761 {
1762 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1763
1764 return 1; /* return error */
1765 }
1766 *enable = (adxl362_bool_t)((prev >> 3) & 0x01); /* set the bool */
1767
1768 return 0; /* success return 0 */
1769}
1770
1782uint8_t adxl362_set_auto_sleep(adxl362_handle_t *handle, adxl362_bool_t enable)
1783{
1784 uint8_t res;
1785 uint8_t prev;
1786
1787 if (handle == NULL) /* check handle */
1788 {
1789 return 2; /* return error */
1790 }
1791 if (handle->inited != 1) /* check handle initialization */
1792 {
1793 return 3; /* return error */
1794 }
1795
1796 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1797 if (res != 0) /* check the result */
1798 {
1799 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1800
1801 return 1; /* return error */
1802 }
1803 prev &= ~(1 << 2); /* clear settings */
1804 prev |= (enable << 2); /* set the bool */
1805 res = a_adxl362_write(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* write power control */
1806 if (res != 0) /* check the result */
1807 {
1808 handle->debug_print("adxl362: write power control failed.\n"); /* write power control failed */
1809
1810 return 1; /* return error */
1811 }
1812
1813 return 0; /* success return 0 */
1814}
1815
1827uint8_t adxl362_get_auto_sleep(adxl362_handle_t *handle, adxl362_bool_t *enable)
1828{
1829 uint8_t res;
1830 uint8_t prev;
1831
1832 if (handle == NULL) /* check handle */
1833 {
1834 return 2; /* return error */
1835 }
1836 if (handle->inited != 1) /* check handle initialization */
1837 {
1838 return 3; /* return error */
1839 }
1840
1841 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1842 if (res != 0) /* check the result */
1843 {
1844 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1845
1846 return 1; /* return error */
1847 }
1848 *enable = (adxl362_bool_t)((prev >> 2) & 0x01); /* get the bool */
1849
1850 return 0; /* success return 0 */
1851}
1852
1864uint8_t adxl362_set_mode(adxl362_handle_t *handle, adxl362_mode_t mode)
1865{
1866 uint8_t res;
1867 uint8_t prev;
1868
1869 if (handle == NULL) /* check handle */
1870 {
1871 return 2; /* return error */
1872 }
1873 if (handle->inited != 1) /* check handle initialization */
1874 {
1875 return 3; /* return error */
1876 }
1877
1878 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1879 if (res != 0) /* check the result */
1880 {
1881 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1882
1883 return 1; /* return error */
1884 }
1885 prev &= ~(3 << 0); /* clear settings */
1886 prev |= (mode << 0); /* set the mode */
1887 res = a_adxl362_write(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* write power control */
1888 if (res != 0) /* check the result */
1889 {
1890 handle->debug_print("adxl362: write power control failed.\n"); /* write power control failed */
1891
1892 return 1; /* return error */
1893 }
1894
1895 return 0; /* success return 0 */
1896}
1897
1909uint8_t adxl362_get_mode(adxl362_handle_t *handle, adxl362_mode_t *mode)
1910{
1911 uint8_t res;
1912 uint8_t prev;
1913
1914 if (handle == NULL) /* check handle */
1915 {
1916 return 2; /* return error */
1917 }
1918 if (handle->inited != 1) /* check handle initialization */
1919 {
1920 return 3; /* return error */
1921 }
1922
1923 res = a_adxl362_read(handle, ADXL362_REG_POWER_CTL, &prev, 1); /* read power control */
1924 if (res != 0) /* check the result */
1925 {
1926 handle->debug_print("adxl362: read power control failed.\n"); /* read power control failed */
1927
1928 return 1; /* return error */
1929 }
1930 *mode = (adxl362_mode_t)((prev >> 0) & 0x03); /* set the mode */
1931
1932 return 0; /* success return 0 */
1933}
1934
1946uint8_t adxl362_set_self_test(adxl362_handle_t *handle, adxl362_bool_t enable)
1947{
1948 uint8_t res;
1949 uint8_t prev;
1950
1951 if (handle == NULL) /* check handle */
1952 {
1953 return 2; /* return error */
1954 }
1955 if (handle->inited != 1) /* check handle initialization */
1956 {
1957 return 3; /* return error */
1958 }
1959
1960 res = a_adxl362_read(handle, ADXL362_REG_SELF_TEST, &prev, 1); /* read self test */
1961 if (res != 0) /* check the result */
1962 {
1963 handle->debug_print("adxl362: read self test failed.\n"); /* read self test failed */
1964
1965 return 1; /* return error */
1966 }
1967 prev &= ~(1 << 0); /* clear settings */
1968 prev |= (enable << 0); /* set the bool */
1969 res = a_adxl362_write(handle, ADXL362_REG_SELF_TEST, &prev, 1); /* write self test */
1970 if (res != 0) /* check the result */
1971 {
1972 handle->debug_print("adxl362: write self test failed.\n"); /* write self test failed */
1973
1974 return 1; /* return error */
1975 }
1976
1977 return 0; /* success return 0 */
1978}
1979
1991uint8_t adxl362_get_self_test(adxl362_handle_t *handle, adxl362_bool_t *enable)
1992{
1993 uint8_t res;
1994 uint8_t prev;
1995
1996 if (handle == NULL) /* check handle */
1997 {
1998 return 2; /* return error */
1999 }
2000 if (handle->inited != 1) /* check handle initialization */
2001 {
2002 return 3; /* return error */
2003 }
2004
2005 res = a_adxl362_read(handle, ADXL362_REG_SELF_TEST, &prev, 1); /* read self test */
2006 if (res != 0) /* check the result */
2007 {
2008 handle->debug_print("adxl362: read self test failed.\n"); /* read self test failed */
2009
2010 return 1; /* return error */
2011 }
2012 *enable = (adxl362_bool_t)((prev >> 0) & 0x01); /* get the bool */
2013
2014 return 0; /* success return 0 */
2015}
2016
2029uint8_t adxl362_set_activity_threshold(adxl362_handle_t *handle, uint16_t threshold)
2030{
2031 uint8_t res;
2032 uint8_t buf[2];
2033
2034 if (handle == NULL) /* check handle */
2035 {
2036 return 2; /* return error */
2037 }
2038 if (handle->inited != 1) /* check handle initialization */
2039 {
2040 return 3; /* return error */
2041 }
2042 if (threshold > 0x07FF) /* check the threshold */
2043 {
2044 handle->debug_print("adxl362: threshold is invalid.\n"); /* threshold is invalid */
2045
2046 return 4; /* return error */
2047 }
2048
2049 buf[0] = threshold & 0xFF; /* set lsb */
2050 buf[1] = (threshold >> 8) & 0xFF; /* set msb */
2051 res = a_adxl362_write(handle, ADXL362_REG_THRESH_ACT_L, buf, 2); /* write activity threshold */
2052 if (res != 0) /* check the result */
2053 {
2054 handle->debug_print("adxl362: write activity threshold failed.\n"); /* write activity threshold failed */
2055
2056 return 1; /* return error */
2057 }
2058
2059 return 0; /* success return 0 */
2060}
2061
2073uint8_t adxl362_get_activity_threshold(adxl362_handle_t *handle, uint16_t *threshold)
2074{
2075 uint8_t res;
2076 uint8_t buf[2];
2077
2078 if (handle == NULL) /* check handle */
2079 {
2080 return 2; /* return error */
2081 }
2082 if (handle->inited != 1) /* check handle initialization */
2083 {
2084 return 3; /* return error */
2085 }
2086
2087 res = a_adxl362_read(handle, ADXL362_REG_THRESH_ACT_L, buf, 2); /* read activity threshold */
2088 if (res != 0) /* check the result */
2089 {
2090 handle->debug_print("adxl362: read activity threshold failed.\n"); /* read activity threshold failed */
2091
2092 return 1; /* return error */
2093 }
2094 *threshold = (uint16_t)((uint16_t)buf[1] << 8) | buf[0]; /* get the threshold */
2095 *threshold &= 0x07FF; /* get the valid part */
2096
2097 return 0; /* success return 0 */
2098}
2099
2112uint8_t adxl362_activity_threshold_convert_to_register(adxl362_handle_t *handle, float g, uint16_t *reg)
2113{
2114 uint8_t res;
2115 uint8_t prev;
2116 uint8_t range;
2117
2118 if (handle == NULL) /* check handle */
2119 {
2120 return 2; /* return error */
2121 }
2122 if (handle->inited != 1) /* check handle initialization */
2123 {
2124 return 3; /* return error */
2125 }
2126 if (g - 0.0f < 1e-6) /* check g > 0 */
2127 {
2128 handle->debug_print("adxl362: g is invalid.\n"); /* g is invalid */
2129
2130 return 4; /* return error */
2131 }
2132
2133 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2134 if (res != 0) /* check the result */
2135 {
2136 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2137
2138 return 1; /* return error */
2139 }
2140 range = (prev >> 6) & 0x3; /* get the range */
2141 if (range == 0) /* 2g */
2142 {
2143 *reg = (uint16_t)(g * 1000.0f); /* convert data */
2144 }
2145 else if (range == 1) /* 4g */
2146 {
2147 *reg = (uint16_t)(g * 500.0f); /* convert data */
2148 }
2149 else /* 8g */
2150 {
2151 *reg = (uint16_t)(g * 235.0f); /* convert data */
2152 }
2153
2154 return 0; /* success return 0 */
2155}
2156
2168uint8_t adxl362_activity_threshold_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *g)
2169{
2170 uint8_t res;
2171 uint8_t prev;
2172 uint8_t range;
2173
2174 if (handle == NULL) /* check handle */
2175 {
2176 return 2; /* return error */
2177 }
2178 if (handle->inited != 1) /* check handle initialization */
2179 {
2180 return 3; /* return error */
2181 }
2182
2183 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2184 if (res != 0) /* check the result */
2185 {
2186 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2187
2188 return 1; /* return error */
2189 }
2190 range = (prev >> 6) & 0x3; /* get the range */
2191 if (range == 0) /* 2g */
2192 {
2193 *g = (float)((float)reg / 1000.0f); /* convert data */
2194 }
2195 else if (range == 1) /* 4g */
2196 {
2197 *g = (float)((float)reg / 500.0f); /* convert data */
2198 }
2199 else /* 8g */
2200 {
2201 *g = (float)((float)reg / 235.0f); /* convert data */
2202 }
2203
2204 return 0; /* success return 0 */
2205}
2206
2218uint8_t adxl362_set_activity_time(adxl362_handle_t *handle, uint8_t tim)
2219{
2220 uint8_t res;
2221 uint8_t prev;
2222
2223 if (handle == NULL) /* check handle */
2224 {
2225 return 2; /* return error */
2226 }
2227 if (handle->inited != 1) /* check handle initialization */
2228 {
2229 return 3; /* return error */
2230 }
2231
2232 prev = tim; /* set the activity time */
2233 res = a_adxl362_write(handle, ADXL362_REG_TIME_ACT, &prev, 1); /* write activity time */
2234 if (res != 0) /* check the result */
2235 {
2236 handle->debug_print("adxl362: write activity time failed.\n"); /* write activity time failed */
2237
2238 return 1; /* return error */
2239 }
2240
2241 return 0; /* success return 0 */
2242}
2243
2255uint8_t adxl362_get_activity_time(adxl362_handle_t *handle, uint8_t *tim)
2256{
2257 uint8_t res;
2258 uint8_t prev;
2259
2260 if (handle == NULL) /* check handle */
2261 {
2262 return 2; /* return error */
2263 }
2264 if (handle->inited != 1) /* check handle initialization */
2265 {
2266 return 3; /* return error */
2267 }
2268
2269 res = a_adxl362_read(handle, ADXL362_REG_TIME_ACT, &prev, 1); /* read activity time */
2270 if (res != 0) /* check the result */
2271 {
2272 handle->debug_print("adxl362: read activity time failed.\n"); /* read activity time failed */
2273
2274 return 1; /* return error */
2275 }
2276 *tim = prev; /* get the activity time */
2277
2278 return 0; /* success return 0 */
2279}
2280
2293uint8_t adxl362_activity_time_convert_to_register(adxl362_handle_t *handle, float ms, uint8_t *reg)
2294{
2295 uint8_t res;
2296 uint8_t prev;
2297 uint8_t range;
2298
2299 if (handle == NULL) /* check handle */
2300 {
2301 return 2; /* return error */
2302 }
2303 if (handle->inited != 1) /* check handle initialization */
2304 {
2305 return 3; /* return error */
2306 }
2307 if (ms - 0.0f < 1e-6) /* check ms > 0 */
2308 {
2309 handle->debug_print("adxl362: ms is invalid.\n"); /* ms is invalid */
2310
2311 return 4; /* return error */
2312 }
2313
2314 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2315 if (res != 0) /* check the result */
2316 {
2317 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2318
2319 return 1; /* return error */
2320 }
2321 range = (prev >> 0) & 0x7; /* get the range */
2322 if (range == 0) /* 12.5Hz */
2323 {
2324 *reg = (uint8_t)(ms / 1000.0f * 12.5f); /* convert data */
2325 }
2326 else if (range == 1) /* 25Hz */
2327 {
2328 *reg = (uint8_t)(ms / 1000.0f * 25.0f); /* convert data */
2329 }
2330 else if (range == 2) /* 50Hz */
2331 {
2332 *reg = (uint8_t)(ms / 1000.0f * 50.0f); /* convert data */
2333 }
2334 else if (range == 3) /* 100Hz */
2335 {
2336 *reg = (uint8_t)(ms / 1000.0f * 100.0f); /* convert data */
2337 }
2338 else if (range == 4) /* 200Hz */
2339 {
2340 *reg = (uint8_t)(ms / 1000.0f * 200.0f); /* convert data */
2341 }
2342 else /* 400Hz */
2343 {
2344 *reg = (uint8_t)(ms / 1000.0f * 400.0f); /* convert data */
2345 }
2346
2347 return 0; /* success return 0 */
2348}
2349
2361uint8_t adxl362_activity_time_convert_to_data(adxl362_handle_t *handle, uint8_t reg, float *ms)
2362{
2363 uint8_t res;
2364 uint8_t prev;
2365 uint8_t range;
2366
2367 if (handle == NULL) /* check handle */
2368 {
2369 return 2; /* return error */
2370 }
2371 if (handle->inited != 1) /* check handle initialization */
2372 {
2373 return 3; /* return error */
2374 }
2375
2376 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2377 if (res != 0) /* check the result */
2378 {
2379 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2380
2381 return 1; /* return error */
2382 }
2383 range = (prev >> 0) & 0x7; /* get the range */
2384 if (range == 0) /* 12.5Hz */
2385 {
2386 *ms = (float)((float)reg / 12.5f * 1000.0f); /* convert data */
2387 }
2388 else if (range == 1) /* 25Hz */
2389 {
2390 *ms = (float)((float)reg / 25.0f * 1000.0f); /* convert data */
2391 }
2392 else if (range == 2) /* 50Hz */
2393 {
2394 *ms = (float)((float)reg / 50.0f * 1000.0f); /* convert data */
2395 }
2396 else if (range == 3) /* 100Hz */
2397 {
2398 *ms = (float)((float)reg / 100.0f * 1000.0f); /* convert data */
2399 }
2400 else if (range == 4) /* 200Hz */
2401 {
2402 *ms = (float)((float)reg / 200.0f * 1000.0f); /* convert data */
2403 }
2404 else /* 400Hz */
2405 {
2406 *ms = (float)((float)reg / 400.0f * 1000.0f); /* convert data */
2407 }
2408
2409 return 0; /* success return 0 */
2410}
2411
2424uint8_t adxl362_set_inactivity_threshold(adxl362_handle_t *handle, uint16_t threshold)
2425{
2426 uint8_t res;
2427 uint8_t buf[2];
2428
2429 if (handle == NULL) /* check handle */
2430 {
2431 return 2; /* return error */
2432 }
2433 if (handle->inited != 1) /* check handle initialization */
2434 {
2435 return 3; /* return error */
2436 }
2437 if (threshold > 0x07FF) /* check the threshold */
2438 {
2439 handle->debug_print("adxl362: threshold is invalid.\n"); /* threshold is invalid */
2440
2441 return 4; /* return error */
2442 }
2443
2444 buf[0] = threshold & 0xFF; /* set lsb */
2445 buf[1] = (threshold >> 8) & 0xFF; /* set msb */
2446 res = a_adxl362_write(handle, ADXL362_REG_THRESH_INACT_L, buf, 2); /* write inactivity threshold */
2447 if (res != 0) /* check the result */
2448 {
2449 handle->debug_print("adxl362: write inactivity threshold failed.\n"); /* write inactivity threshold failed */
2450
2451 return 1; /* return error */
2452 }
2453
2454 return 0; /* success return 0 */
2455}
2456
2468uint8_t adxl362_get_inactivity_threshold(adxl362_handle_t *handle, uint16_t *threshold)
2469{
2470 uint8_t res;
2471 uint8_t buf[2];
2472
2473 if (handle == NULL) /* check handle */
2474 {
2475 return 2; /* return error */
2476 }
2477 if (handle->inited != 1) /* check handle initialization */
2478 {
2479 return 3; /* return error */
2480 }
2481
2482 res = a_adxl362_read(handle, ADXL362_REG_THRESH_INACT_L, buf, 2); /* read inactivity threshold */
2483 if (res != 0) /* check the result */
2484 {
2485 handle->debug_print("adxl362: read inactivity threshold failed.\n"); /* read inactivity threshold failed */
2486
2487 return 1; /* return error */
2488 }
2489 *threshold = (uint16_t)((uint16_t)buf[1] << 8) | buf[0]; /* get the threshold */
2490 *threshold &= 0x07FF; /* get the valid part */
2491
2492 return 0; /* success return 0 */
2493}
2494
2507uint8_t adxl362_inactivity_threshold_convert_to_register(adxl362_handle_t *handle, float g, uint16_t *reg)
2508{
2509 uint8_t res;
2510 uint8_t prev;
2511 uint8_t range;
2512
2513 if (handle == NULL) /* check handle */
2514 {
2515 return 2; /* return error */
2516 }
2517 if (handle->inited != 1) /* check handle initialization */
2518 {
2519 return 3; /* return error */
2520 }
2521 if (g - 0.0f < 1e-6) /* check g > 0 */
2522 {
2523 handle->debug_print("adxl362: g is invalid.\n"); /* g is invalid */
2524
2525 return 4; /* return error */
2526 }
2527
2528 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2529 if (res != 0) /* check the result */
2530 {
2531 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2532
2533 return 1; /* return error */
2534 }
2535 range = (prev >> 6) & 0x3; /* get the range */
2536 if (range == 0) /* 2g */
2537 {
2538 *reg = (uint16_t)(g * 1000.0f); /* convert data */
2539 }
2540 else if (range == 1) /* 4g */
2541 {
2542 *reg = (uint16_t)(g * 500.0f); /* convert data */
2543 }
2544 else /* 8g */
2545 {
2546 *reg = (uint16_t)(g * 235.0f); /* convert data */
2547 }
2548
2549 return 0; /* success return 0 */
2550}
2551
2563uint8_t adxl362_inactivity_threshold_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *g)
2564{
2565 uint8_t res;
2566 uint8_t prev;
2567 uint8_t range;
2568
2569 if (handle == NULL) /* check handle */
2570 {
2571 return 2; /* return error */
2572 }
2573 if (handle->inited != 1) /* check handle initialization */
2574 {
2575 return 3; /* return error */
2576 }
2577
2578 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2579 if (res != 0) /* check the result */
2580 {
2581 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2582
2583 return 1; /* return error */
2584 }
2585 range = (prev >> 6) & 0x3; /* get the range */
2586 if (range == 0) /* 2g */
2587 {
2588 *g = (float)((float)reg / 1000.0f); /* convert data */
2589 }
2590 else if (range == 1) /* 4g */
2591 {
2592 *g = (float)((float)reg / 500.0f); /* convert data */
2593 }
2594 else /* 8g */
2595 {
2596 *g = (float)((float)reg / 235.0f); /* convert data */
2597 }
2598
2599 return 0; /* success return 0 */
2600}
2601
2613uint8_t adxl362_set_inactivity_time(adxl362_handle_t *handle, uint16_t tim)
2614{
2615 uint8_t res;
2616 uint8_t buf[2];
2617
2618 if (handle == NULL) /* check handle */
2619 {
2620 return 2; /* return error */
2621 }
2622 if (handle->inited != 1) /* check handle initialization */
2623 {
2624 return 3; /* return error */
2625 }
2626
2627 buf[0] = tim & 0xFF; /* set lsb */
2628 buf[1] = (tim >> 8) & 0xFF; /* set msb */
2629 res = a_adxl362_write(handle, ADXL362_REG_TIME_INACT_L, buf, 2); /* write inactivity time */
2630 if (res != 0) /* check the result */
2631 {
2632 handle->debug_print("adxl362: write inactivity time failed.\n"); /* write inactivity time failed */
2633
2634 return 1; /* return error */
2635 }
2636
2637 return 0; /* success return 0 */
2638}
2639
2651uint8_t adxl362_get_inactivity_time(adxl362_handle_t *handle, uint16_t *tim)
2652{
2653 uint8_t res;
2654 uint8_t buf[2];
2655
2656 if (handle == NULL) /* check handle */
2657 {
2658 return 2; /* return error */
2659 }
2660 if (handle->inited != 1) /* check handle initialization */
2661 {
2662 return 3; /* return error */
2663 }
2664
2665 res = a_adxl362_read(handle, ADXL362_REG_TIME_INACT_L, buf, 2); /* read inactivity time */
2666 if (res != 0) /* check the result */
2667 {
2668 handle->debug_print("adxl362: read inactivity time failed.\n"); /* read inactivity time failed */
2669
2670 return 1; /* return error */
2671 }
2672 *tim = (uint16_t)((uint16_t)buf[1] << 8) | buf[0]; /* get the threshold */
2673
2674 return 0; /* success return 0 */
2675}
2676
2689uint8_t adxl362_inactivity_time_convert_to_register(adxl362_handle_t *handle, float ms, uint16_t *reg)
2690{
2691 uint8_t res;
2692 uint8_t prev;
2693 uint8_t range;
2694
2695 if (handle == NULL) /* check handle */
2696 {
2697 return 2; /* return error */
2698 }
2699 if (handle->inited != 1) /* check handle initialization */
2700 {
2701 return 3; /* return error */
2702 }
2703 if (ms - 0.0f < 1e-6) /* check ms > 0 */
2704 {
2705 handle->debug_print("adxl362: ms is invalid.\n"); /* ms is invalid */
2706
2707 return 4; /* return error */
2708 }
2709
2710 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2711 if (res != 0) /* check the result */
2712 {
2713 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2714
2715 return 1; /* return error */
2716 }
2717 range = (prev >> 0) & 0x7; /* get the range */
2718 if (range == 0) /* 12.5Hz */
2719 {
2720 *reg = (uint16_t)(ms / 1000.0f * 12.5f); /* convert data */
2721 }
2722 else if (range == 1) /* 25Hz */
2723 {
2724 *reg = (uint16_t)(ms / 1000.0f * 25.0f); /* convert data */
2725 }
2726 else if (range == 2) /* 50Hz */
2727 {
2728 *reg = (uint16_t)(ms / 1000.0f * 50.0f); /* convert data */
2729 }
2730 else if (range == 3) /* 100Hz */
2731 {
2732 *reg = (uint16_t)(ms / 1000.0f * 100.0f); /* convert data */
2733 }
2734 else if (range == 4) /* 200Hz */
2735 {
2736 *reg = (uint16_t)(ms / 1000.0f * 200.0f); /* convert data */
2737 }
2738 else /* 400Hz */
2739 {
2740 *reg = (uint16_t)(ms / 1000.0f * 400.0f); /* convert data */
2741 }
2742
2743 return 0; /* success return 0 */
2744}
2745
2757uint8_t adxl362_inactivity_time_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *ms)
2758{
2759 uint8_t res;
2760 uint8_t prev;
2761 uint8_t range;
2762
2763 if (handle == NULL) /* check handle */
2764 {
2765 return 2; /* return error */
2766 }
2767 if (handle->inited != 1) /* check handle initialization */
2768 {
2769 return 3; /* return error */
2770 }
2771
2772 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
2773 if (res != 0) /* check the result */
2774 {
2775 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
2776
2777 return 1; /* return error */
2778 }
2779 range = (prev >> 0) & 0x7; /* get the range */
2780 if (range == 0) /* 12.5Hz */
2781 {
2782 *ms = (float)((float)reg / 12.5f * 1000.0f); /* convert data */
2783 }
2784 else if (range == 1) /* 25Hz */
2785 {
2786 *ms = (float)((float)reg / 25.0f * 1000.0f); /* convert data */
2787 }
2788 else if (range == 2) /* 50Hz */
2789 {
2790 *ms = (float)((float)reg / 50.0f * 1000.0f); /* convert data */
2791 }
2792 else if (range == 3) /* 100Hz */
2793 {
2794 *ms = (float)((float)reg / 100.0f * 1000.0f); /* convert data */
2795 }
2796 else if (range == 4) /* 200Hz */
2797 {
2798 *ms = (float)((float)reg / 200.0f * 1000.0f); /* convert data */
2799 }
2800 else /* 400Hz */
2801 {
2802 *ms = (float)((float)reg / 400.0f * 1000.0f); /* convert data */
2803 }
2804
2805 return 0; /* success return 0 */
2806}
2807
2819uint8_t adxl362_set_detect_mode(adxl362_handle_t *handle, adxl362_detect_mode_t mode)
2820{
2821 uint8_t res;
2822 uint8_t prev;
2823
2824 if (handle == NULL) /* check handle */
2825 {
2826 return 2; /* return error */
2827 }
2828 if (handle->inited != 1) /* check handle initialization */
2829 {
2830 return 3; /* return error */
2831 }
2832
2833 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
2834 if (res != 0) /* check the result */
2835 {
2836 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
2837
2838 return 1; /* return error */
2839 }
2840 prev &= ~(3 << 4); /* clear settings */
2841 prev |= (mode << 4); /* set the mode */
2842 res = a_adxl362_write(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* write action inaction control */
2843 if (res != 0) /* check the result */
2844 {
2845 handle->debug_print("adxl362: write action inaction control failed.\n"); /* write action inaction control failed */
2846
2847 return 1; /* return error */
2848 }
2849
2850 return 0; /* success return 0 */
2851}
2852
2864uint8_t adxl362_get_detect_mode(adxl362_handle_t *handle, adxl362_detect_mode_t *mode)
2865{
2866 uint8_t res;
2867 uint8_t prev;
2868
2869 if (handle == NULL) /* check handle */
2870 {
2871 return 2; /* return error */
2872 }
2873 if (handle->inited != 1) /* check handle initialization */
2874 {
2875 return 3; /* return error */
2876 }
2877
2878 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
2879 if (res != 0) /* check the result */
2880 {
2881 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
2882
2883 return 1; /* return error */
2884 }
2885 *mode = (adxl362_detect_mode_t)((prev >> 4) & 0x03); /* get the detect mode */
2886
2887 return 0; /* success return 0 */
2888}
2889
2901uint8_t adxl362_set_inactivity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t trigger)
2902{
2903 uint8_t res;
2904 uint8_t prev;
2905
2906 if (handle == NULL) /* check handle */
2907 {
2908 return 2; /* return error */
2909 }
2910 if (handle->inited != 1) /* check handle initialization */
2911 {
2912 return 3; /* return error */
2913 }
2914
2915 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
2916 if (res != 0) /* check the result */
2917 {
2918 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
2919
2920 return 1; /* return error */
2921 }
2922 prev &= ~(1 << 3); /* clear settings */
2923 prev |= (trigger << 3); /* set the trigger */
2924 res = a_adxl362_write(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* write action inaction control */
2925 if (res != 0) /* check the result */
2926 {
2927 handle->debug_print("adxl362: write action inaction control failed.\n"); /* write action inaction control failed */
2928
2929 return 1; /* return error */
2930 }
2931
2932 return 0; /* success return 0 */
2933}
2934
2946uint8_t adxl362_get_inactivity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t *trigger)
2947{
2948 uint8_t res;
2949 uint8_t prev;
2950
2951 if (handle == NULL) /* check handle */
2952 {
2953 return 2; /* return error */
2954 }
2955 if (handle->inited != 1) /* check handle initialization */
2956 {
2957 return 3; /* return error */
2958 }
2959
2960 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
2961 if (res != 0) /* check the result */
2962 {
2963 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
2964
2965 return 1; /* return error */
2966 }
2967 *trigger = (adxl362_detect_trigger_t)((prev >> 3) & 0x01); /* get the trigger */
2968
2969 return 0; /* success return 0 */
2970}
2971
2983uint8_t adxl362_set_activity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t trigger)
2984{
2985 uint8_t res;
2986 uint8_t prev;
2987
2988 if (handle == NULL) /* check handle */
2989 {
2990 return 2; /* return error */
2991 }
2992 if (handle->inited != 1) /* check handle initialization */
2993 {
2994 return 3; /* return error */
2995 }
2996
2997 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
2998 if (res != 0) /* check the result */
2999 {
3000 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
3001
3002 return 1; /* return error */
3003 }
3004 prev &= ~(1 << 1); /* clear settings */
3005 prev |= (trigger << 1); /* set the trigger */
3006 res = a_adxl362_write(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* write action inaction control */
3007 if (res != 0) /* check the result */
3008 {
3009 handle->debug_print("adxl362: write action inaction control failed.\n"); /* write action inaction control failed */
3010
3011 return 1; /* return error */
3012 }
3013
3014 return 0; /* success return 0 */
3015}
3016
3028uint8_t adxl362_get_activity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t *trigger)
3029{
3030 uint8_t res;
3031 uint8_t prev;
3032
3033 if (handle == NULL) /* check handle */
3034 {
3035 return 2; /* return error */
3036 }
3037 if (handle->inited != 1) /* check handle initialization */
3038 {
3039 return 3; /* return error */
3040 }
3041
3042 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
3043 if (res != 0) /* check the result */
3044 {
3045 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
3046
3047 return 1; /* return error */
3048 }
3049 *trigger = (adxl362_detect_trigger_t)((prev >> 1) & 0x01); /* get the trigger */
3050
3051 return 0; /* success return 0 */
3052}
3053
3065uint8_t adxl362_set_inactivity(adxl362_handle_t *handle, adxl362_bool_t enable)
3066{
3067 uint8_t res;
3068 uint8_t prev;
3069
3070 if (handle == NULL) /* check handle */
3071 {
3072 return 2; /* return error */
3073 }
3074 if (handle->inited != 1) /* check handle initialization */
3075 {
3076 return 3; /* return error */
3077 }
3078
3079 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
3080 if (res != 0) /* check the result */
3081 {
3082 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
3083
3084 return 1; /* return error */
3085 }
3086 prev &= ~(1 << 2); /* clear settings */
3087 prev |= (enable << 2); /* set the bool */
3088 res = a_adxl362_write(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* write action inaction control */
3089 if (res != 0) /* check the result */
3090 {
3091 handle->debug_print("adxl362: write action inaction control failed.\n"); /* write action inaction control failed */
3092
3093 return 1; /* return error */
3094 }
3095
3096 return 0; /* success return 0 */
3097}
3098
3110uint8_t adxl362_get_inactivity(adxl362_handle_t *handle, adxl362_bool_t *enable)
3111{
3112 uint8_t res;
3113 uint8_t prev;
3114
3115 if (handle == NULL) /* check handle */
3116 {
3117 return 2; /* return error */
3118 }
3119 if (handle->inited != 1) /* check handle initialization */
3120 {
3121 return 3; /* return error */
3122 }
3123
3124 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
3125 if (res != 0) /* check the result */
3126 {
3127 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
3128
3129 return 1; /* return error */
3130 }
3131 *enable = (adxl362_bool_t)((prev >> 2) & 0x01); /* get the bool */
3132
3133 return 0; /* success return 0 */
3134}
3135
3147uint8_t adxl362_set_activity(adxl362_handle_t *handle, adxl362_bool_t enable)
3148{
3149 uint8_t res;
3150 uint8_t prev;
3151
3152 if (handle == NULL) /* check handle */
3153 {
3154 return 2; /* return error */
3155 }
3156 if (handle->inited != 1) /* check handle initialization */
3157 {
3158 return 3; /* return error */
3159 }
3160
3161 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
3162 if (res != 0) /* check the result */
3163 {
3164 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
3165
3166 return 1; /* return error */
3167 }
3168 prev &= ~(1 << 0); /* clear settings */
3169 prev |= (enable << 0); /* set the bool */
3170 res = a_adxl362_write(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* write action inaction control */
3171 if (res != 0) /* check the result */
3172 {
3173 handle->debug_print("adxl362: write action inaction control failed.\n"); /* write action inaction control failed */
3174
3175 return 1; /* return error */
3176 }
3177
3178 return 0; /* success return 0 */
3179}
3180
3192uint8_t adxl362_get_activity(adxl362_handle_t *handle, adxl362_bool_t *enable)
3193{
3194 uint8_t res;
3195 uint8_t prev;
3196
3197 if (handle == NULL) /* check handle */
3198 {
3199 return 2; /* return error */
3200 }
3201 if (handle->inited != 1) /* check handle initialization */
3202 {
3203 return 3; /* return error */
3204 }
3205
3206 res = a_adxl362_read(handle, ADXL362_REG_ACT_INACT_CTL, &prev, 1); /* read action inaction control */
3207 if (res != 0) /* check the result */
3208 {
3209 handle->debug_print("adxl362: read action inaction control failed.\n"); /* read action inaction control failed */
3210
3211 return 1; /* return error */
3212 }
3213 *enable = (adxl362_bool_t)((prev >> 0) & 0x01); /* get the bool */
3214
3215 return 0; /* success return 0 */
3216}
3217
3230uint8_t adxl362_read(adxl362_handle_t *handle, int16_t raw[3], float g[3])
3231{
3232 uint8_t res;
3233 uint8_t prev;
3234 uint8_t range;
3235 uint8_t buf[6];
3236
3237 if (handle == NULL) /* check handle */
3238 {
3239 return 2; /* return error */
3240 }
3241 if (handle->inited != 1) /* check handle initialization */
3242 {
3243 return 3; /* return error */
3244 }
3245
3246 res = a_adxl362_read(handle, ADXL362_REG_XDATA_L, buf, 6); /* read x, y and z */
3247 if (res != 0) /* check the result */
3248 {
3249 handle->debug_print("adxl362: read x, y and z failed.\n"); /* read x, y and z failed */
3250
3251 return 1; /* return error */
3252 }
3253 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
3254 if (res != 0) /* check the result */
3255 {
3256 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
3257
3258 return 1; /* return error */
3259 }
3260 range = (prev >> 6) & 0x3; /* get the range */
3261 if (range == 0) /* 2g */
3262 {
3263 raw[0] = (int16_t)((uint16_t)(buf[1]) << 8 | buf[0]); /* set x */
3264 raw[1] = (int16_t)((uint16_t)(buf[3]) << 8 | buf[2]); /* set y */
3265 raw[2] = (int16_t)((uint16_t)(buf[5]) << 8 | buf[4]); /* set z */
3266 g[0] = (float)raw[0] / 1000.0f; /* convert x */
3267 g[1] = (float)raw[1] / 1000.0f; /* convert y */
3268 g[2] = (float)raw[2] / 1000.0f; /* convert z */
3269 }
3270 else if (range == 1) /* 4g */
3271 {
3272 raw[0] = (int16_t)((uint16_t)(buf[1]) << 8 | buf[0]); /* set x */
3273 raw[1] = (int16_t)((uint16_t)(buf[3]) << 8 | buf[2]); /* set y */
3274 raw[2] = (int16_t)((uint16_t)(buf[5]) << 8 | buf[4]); /* set z */
3275 g[0] = (float)raw[0] / 500.0f; /* convert x */
3276 g[1] = (float)raw[1] / 500.0f; /* convert y */
3277 g[2] = (float)raw[2] / 500.0f; /* convert z */
3278 }
3279 else /* 8g */
3280 {
3281 raw[0] = (int16_t)((uint16_t)(buf[1]) << 8 | buf[0]); /* set x */
3282 raw[1] = (int16_t)((uint16_t)(buf[3]) << 8 | buf[2]); /* set y */
3283 raw[2] = (int16_t)((uint16_t)(buf[5]) << 8 | buf[4]); /* set z */
3284 g[0] = (float)raw[0] / 235.0f; /* convert x */
3285 g[1] = (float)raw[1] / 235.0f; /* convert y */
3286 g[2] = (float)raw[2] / 235.0f; /* convert z */
3287 }
3288
3289 return 0; /* success return 0 */
3290}
3291
3304uint8_t adxl362_read_fifo(adxl362_handle_t *handle, adxl362_frame_t *frame, uint16_t *frame_len)
3305{
3306 uint8_t res;
3307 uint8_t type;
3308 uint8_t prev;
3309 uint8_t range;
3310 uint8_t buf[2];
3311 uint16_t i;
3312 uint16_t len;
3313
3314 if (handle == NULL) /* check handle */
3315 {
3316 return 2; /* return error */
3317 }
3318 if (handle->inited != 1) /* check handle initialization */
3319 {
3320 return 3; /* return error */
3321 }
3322
3323 res = a_adxl362_read(handle, ADXL362_REG_FIFO_ENTRIES_L, buf, 2); /* read fifo entries */
3324 if (res != 0) /* check the result */
3325 {
3326 handle->debug_print("adxl362: read fifo entries failed.\n"); /* read fifo entries failed */
3327
3328 return 1; /* return error */
3329 }
3330 len = (uint16_t)((uint16_t)buf[1] << 8) | buf[0]; /* set the length */
3331 if (len > 512) /* check the length */
3332 {
3333 len = 512; /* set limit to 512 */
3334 }
3335 res = a_adxl362_read(handle, ADXL362_REG_FIFO_CONTROL, &prev, 1); /* read fifo control */
3336 if (res != 0) /* check the result */
3337 {
3338 handle->debug_print("adxl362: read fifo control failed.\n"); /* read fifo control failed */
3339
3340 return 1; /* return error */
3341 }
3342 len = len < (*frame_len) ? len : (*frame_len); /* adjust to buffer */
3343 if (((prev >> 2) & 0x01) != 0) /* fifo has temperature */
3344 {
3345 len = (len / 4) * 4; /* data alignment */
3346 }
3347 else /* no temperature */
3348 {
3349 len = (len / 3) * 3; /* data alignment */
3350 }
3351 res = a_adxl362_read_fifo(handle, handle->buf, len * 2); /* read from fifo */
3352 if (res != 0) /* check the result */
3353 {
3354 handle->debug_print("adxl362: read fifo failed.\n"); /* read fifo failed */
3355
3356 return 1; /* return error */
3357 }
3358
3359 res = a_adxl362_read(handle, ADXL362_REG_FILTER_CTL, &prev, 1); /* read filter */
3360 if (res != 0) /* check the result */
3361 {
3362 handle->debug_print("adxl362: read filter failed.\n"); /* read filter failed */
3363
3364 return 1; /* return error */
3365 }
3366 range = (prev >> 6) & 0x3; /* get the range */
3367 for (i = 0; i < len; i++) /* copy data */
3368 {
3369 frame[i].raw = (uint16_t)(handle->buf[i * 2 + 1]) << 8 |
3370 handle->buf[i * 2]; /* get the raw data */
3371 type = (frame[i].raw >> 14) & 0x03; /* get the type */
3372 frame[i].raw &= 0x3FFF; /* get the valid part */
3373 if (((frame[i].raw >> 12) & 0x01) != 0) /* check the sign extension */
3374 {
3375 frame[i].raw |= (int16_t)((uint16_t)0x3 << 14); /* set the sign extension */
3376 }
3377 frame[i].type = (adxl362_frame_type_t)(type); /* get the type */
3378 if (frame[i].type == ADXL362_FRAME_TYPE_TEMP) /* if temperature */
3379 {
3380 frame[i].data = (float)frame[i].raw * 0.065f; /* convert data */
3381 }
3382 else
3383 {
3384 if (range == 0) /* 2g */
3385 {
3386 frame[i].data = (float)frame[i].raw / 1000.0f; /* convert data */
3387 }
3388 else if (range == 1) /* 4g */
3389 {
3390 frame[i].data = (float)frame[i].raw / 500.0f; /* convert data */
3391 }
3392 else /* 8g */
3393 {
3394 frame[i].data = (float)frame[i].raw / 235.0f; /* convert data */
3395 }
3396 }
3397 }
3398 *frame_len = len; /* set frame length */
3399
3400 return 0; /* success return 0 */
3401}
3402
3413uint8_t adxl362_irq_handler(adxl362_handle_t *handle)
3414{
3415 uint8_t res;
3416 uint8_t prev;
3417
3418 if (handle == NULL) /* check handle */
3419 {
3420 return 2; /* return error */
3421 }
3422 if (handle->inited != 1) /* check handle initialization */
3423 {
3424 return 3; /* return error */
3425 }
3426
3427 res = a_adxl362_read(handle, ADXL362_REG_STATUS, (uint8_t *)&prev, 1); /* read config */
3428 if (res != 0) /* check result */
3429 {
3430 handle->debug_print("adxl362: read failed.\n"); /* read failed */
3431
3432 return 1; /* return error */
3433 }
3434 if ((prev & ADXL362_STATUS_ERR_USER_REGS) != 0) /* if seu error detect */
3435 {
3436 if (handle->receive_callback != NULL) /* if receive callback */
3437 {
3438 handle->receive_callback(ADXL362_STATUS_ERR_USER_REGS); /* run callback */
3439 }
3440 }
3441 if ((prev & ADXL362_STATUS_AWAKE) != 0) /* if awake */
3442 {
3443 if (handle->receive_callback != NULL) /* if receive callback */
3444 {
3445 handle->receive_callback(ADXL362_STATUS_AWAKE); /* run callback */
3446 }
3447 }
3448 if ((prev & ADXL362_STATUS_INACT) != 0) /* if inactivity */
3449 {
3450 if (handle->receive_callback != NULL) /* if receive callback */
3451 {
3452 handle->receive_callback(ADXL362_STATUS_INACT); /* run callback */
3453 }
3454 }
3455 if ((prev & ADXL362_STATUS_ACT) != 0) /* if activity */
3456 {
3457 if (handle->receive_callback != NULL) /* if receive callback */
3458 {
3459 handle->receive_callback(ADXL362_STATUS_ACT); /* run callback */
3460 }
3461 }
3462 if ((prev & ADXL362_STATUS_FIFO_OVERRUN) != 0) /* if fifo overrun */
3463 {
3464 if (handle->receive_callback != NULL) /* if receive callback */
3465 {
3466 (void)a_adxl362_read_fifo(handle, handle->buf, 512 * 2); /* clear the fifo */
3467 handle->receive_callback(ADXL362_STATUS_FIFO_OVERRUN); /* run callback */
3468 }
3469 }
3470 if ((prev & ADXL362_STATUS_FIFO_WATERMARK) != 0) /* if fifo watermark */
3471 {
3472 if (handle->receive_callback != NULL) /* if receive callback */
3473 {
3474 handle->receive_callback(ADXL362_STATUS_FIFO_WATERMARK); /* run callback */
3475 }
3476 }
3477 if ((prev & ADXL362_STATUS_FIFO_READY) != 0) /* if fifo ready */
3478 {
3479 if (handle->receive_callback != NULL) /* if receive callback */
3480 {
3481 handle->receive_callback(ADXL362_STATUS_FIFO_READY); /* run callback */
3482 }
3483 }
3484 if ((prev & ADXL362_STATUS_DATA_READY) != 0) /* if data ready */
3485 {
3486 if (handle->receive_callback != NULL) /* if receive callback */
3487 {
3488 handle->receive_callback(ADXL362_STATUS_DATA_READY); /* run callback */
3489 }
3490 }
3491
3492 return 0; /* success return 0 */
3493}
3494
3508uint8_t adxl362_set_reg(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
3509{
3510 if (handle == NULL) /* check handle */
3511 {
3512 return 2; /* return error */
3513 }
3514 if (handle->inited != 1) /* check handle initialization */
3515 {
3516 return 3; /* return error */
3517 }
3518
3519 return a_adxl362_write(handle, reg, buf, len); /* write data */
3520}
3521
3535uint8_t adxl362_get_reg(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
3536{
3537 if (handle == NULL) /* check handle */
3538 {
3539 return 2; /* return error */
3540 }
3541 if (handle->inited != 1) /* check handle initialization */
3542 {
3543 return 3; /* return error */
3544 }
3545
3546 return a_adxl362_read(handle, reg, buf, len); /* read data */
3547}
3548
3561uint8_t adxl362_get_fifo(adxl362_handle_t *handle, uint8_t *buf, uint16_t len)
3562{
3563 if (handle == NULL) /* check handle */
3564 {
3565 return 2; /* return error */
3566 }
3567 if (handle->inited != 1) /* check handle initialization */
3568 {
3569 return 3; /* return error */
3570 }
3571
3572 return a_adxl362_read_fifo(handle, buf, len); /* read data */
3573}
3574
3583uint8_t adxl362_info(adxl362_info_t *info)
3584{
3585 if (info == NULL) /* check handle */
3586 {
3587 return 2; /* return error */
3588 }
3589
3590 memset(info, 0, sizeof(adxl362_info_t)); /* initialize adxl362 info structure */
3591 strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
3592 strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
3593 strncpy(info->interface, "SPI", 8); /* copy interface name */
3594 info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
3595 info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
3596 info->max_current_ma = MAX_CURRENT; /* set maximum current */
3597 info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
3598 info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
3599 info->driver_version = DRIVER_VERSION; /* set driver version */
3600
3601 return 0; /* success return 0 */
3602}
ADXL362_REG_SOFT_RESET
#define ADXL362_REG_SOFT_RESET
Definition driver_adxl362.c:72
ADXL362_REG_TEMP_L
#define ADXL362_REG_TEMP_L
Definition driver_adxl362.c:70
ADXL362_REG_FIFO_CONTROL
#define ADXL362_REG_FIFO_CONTROL
Definition driver_adxl362.c:81
ADXL362_REG_PARTID
#define ADXL362_REG_PARTID
Definition driver_adxl362.c:56
ADXL362_REG_THRESH_INACT_L
#define ADXL362_REG_THRESH_INACT_L
Definition driver_adxl362.c:76
ADXL362_REG_SELF_TEST
#define ADXL362_REG_SELF_TEST
Definition driver_adxl362.c:87
MAX_CURRENT
#define MAX_CURRENT
Definition driver_adxl362.c:46
ADXL362_REG_ACT_INACT_CTL
#define ADXL362_REG_ACT_INACT_CTL
Definition driver_adxl362.c:80
ADXL362_REG_REVID
#define ADXL362_REG_REVID
Definition driver_adxl362.c:57
ADXL362_REG_THRESH_ACT_L
#define ADXL362_REG_THRESH_ACT_L
Definition driver_adxl362.c:73
ADXL362_REG_XDATA
#define ADXL362_REG_XDATA
Definition driver_adxl362.c:58
ADXL362_REG_XDATA_L
#define ADXL362_REG_XDATA_L
Definition driver_adxl362.c:64
SUPPLY_VOLTAGE_MAX
#define SUPPLY_VOLTAGE_MAX
Definition driver_adxl362.c:45
ADXL362_REG_FILTER_CTL
#define ADXL362_REG_FILTER_CTL
Definition driver_adxl362.c:85
ADXL362_REG_DEVID_AD
#define ADXL362_REG_DEVID_AD
chip register definition
Definition driver_adxl362.c:54
ADXL362_REG_FIFO_SAMPLES
#define ADXL362_REG_FIFO_SAMPLES
Definition driver_adxl362.c:82
TEMPERATURE_MAX
#define TEMPERATURE_MAX
Definition driver_adxl362.c:48
ADXL362_REG_POWER_CTL
#define ADXL362_REG_POWER_CTL
Definition driver_adxl362.c:86
ADXL362_REG_INTMAP2
#define ADXL362_REG_INTMAP2
Definition driver_adxl362.c:84
MANUFACTURER_NAME
#define MANUFACTURER_NAME
Definition driver_adxl362.c:43
TEMPERATURE_MIN
#define TEMPERATURE_MIN
Definition driver_adxl362.c:47
SUPPLY_VOLTAGE_MIN
#define SUPPLY_VOLTAGE_MIN
Definition driver_adxl362.c:44
ADXL362_REG_TIME_INACT_L
#define ADXL362_REG_TIME_INACT_L
Definition driver_adxl362.c:78
ADXL362_REG_STATUS
#define ADXL362_REG_STATUS
Definition driver_adxl362.c:61
CHIP_NAME
#define CHIP_NAME
chip register definition
Definition driver_adxl362.c:42
ADXL362_REG_DEVID_MST
#define ADXL362_REG_DEVID_MST
Definition driver_adxl362.c:55
DRIVER_VERSION
#define DRIVER_VERSION
Definition driver_adxl362.c:49
ADXL362_REG_FIFO_ENTRIES_L
#define ADXL362_REG_FIFO_ENTRIES_L
Definition driver_adxl362.c:62
ADXL362_REG_INTMAP1
#define ADXL362_REG_INTMAP1
Definition driver_adxl362.c:83
ADXL362_REG_TIME_ACT
#define ADXL362_REG_TIME_ACT
Definition driver_adxl362.c:75
driver_adxl362.h
driver adxl362 header file
adxl362_get_wake_up
uint8_t adxl362_get_wake_up(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the chip wake up status
Definition driver_adxl362.c:1745
adxl362_detect_mode_t
adxl362_detect_mode_t
adxl362 detect mode enumeration definition
Definition driver_adxl362.h:132
adxl362_get_interrupt_pin1_map
uint8_t adxl362_get_interrupt_pin1_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t *enable)
get the interrupt pin1 map
Definition driver_adxl362.c:1005
adxl362_inactivity_threshold_convert_to_data
uint8_t adxl362_inactivity_threshold_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *g)
convert the register raw data to the inactivity threshold
Definition driver_adxl362.c:2563
adxl362_fifo_mode_t
adxl362_fifo_mode_t
adxl362 fifo mode enumeration definition
Definition driver_adxl362.h:180
adxl362_set_range
uint8_t adxl362_set_range(adxl362_handle_t *handle, adxl362_range_t range)
set the measurement range
Definition driver_adxl362.c:1208
adxl362_get_self_test
uint8_t adxl362_get_self_test(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the self test status
Definition driver_adxl362.c:1991
adxl362_read_8msb
uint8_t adxl362_read_8msb(adxl362_handle_t *handle, int8_t raw[3], float g[3])
read the data with eight most significant bits
Definition driver_adxl362.c:390
adxl362_set_interrupt_pin2_map
uint8_t adxl362_set_interrupt_pin2_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t enable)
set the interrupt pin2 map
Definition driver_adxl362.c:1125
adxl362_get_noise_mode
uint8_t adxl362_get_noise_mode(adxl362_handle_t *handle, adxl362_noise_mode_t *mode)
get the noise mode
Definition driver_adxl362.c:1663
adxl362_get_fifo_mode
uint8_t adxl362_get_fifo_mode(adxl362_handle_t *handle, adxl362_fifo_mode_t *mode)
get the fifo mode
Definition driver_adxl362.c:733
adxl362_bandwidth_t
adxl362_bandwidth_t
adxl362 bandwidth enumeration definition
Definition driver_adxl362.h:91
adxl362_get_fifo_sample
uint8_t adxl362_get_fifo_sample(adxl362_handle_t *handle, uint16_t *sample)
get the fifo sample
Definition driver_adxl362.c:831
adxl362_inactivity_time_convert_to_data
uint8_t adxl362_inactivity_time_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *ms)
convert the register raw data to the inactivity time
Definition driver_adxl362.c:2757
adxl362_set_inactivity_detect_trigger
uint8_t adxl362_set_inactivity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t trigger)
set the inactivity detect trigger mode
Definition driver_adxl362.c:2901
adxl362_set_fifo_sample
uint8_t adxl362_set_fifo_sample(adxl362_handle_t *handle, uint16_t sample)
set the fifo sample
Definition driver_adxl362.c:771
adxl362_set_inactivity_time
uint8_t adxl362_set_inactivity_time(adxl362_handle_t *handle, uint16_t tim)
set the inactivity time
Definition driver_adxl362.c:2613
adxl362_info_t
struct adxl362_info_s adxl362_info_t
adxl362 information structure definition
adxl362_set_fifo_mode
uint8_t adxl362_set_fifo_mode(adxl362_handle_t *handle, adxl362_fifo_mode_t mode)
set the fifo mode
Definition driver_adxl362.c:688
adxl362_get_detect_mode
uint8_t adxl362_get_detect_mode(adxl362_handle_t *handle, adxl362_detect_mode_t *mode)
get the detect mode
Definition driver_adxl362.c:2864
adxl362_info
uint8_t adxl362_info(adxl362_info_t *info)
get chip's information
Definition driver_adxl362.c:3583
adxl362_odr_t
adxl362_odr_t
adxl362 odr enumeration definition
Definition driver_adxl362.h:100
adxl362_set_self_test
uint8_t adxl362_set_self_test(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable the self test
Definition driver_adxl362.c:1946
adxl362_interrupt_map_t
adxl362_interrupt_map_t
adxl362 interrupt map enumeration definition
Definition driver_adxl362.h:151
adxl362_mode_t
adxl362_mode_t
adxl362 mode enumeration definition
Definition driver_adxl362.h:123
adxl362_init
uint8_t adxl362_init(adxl362_handle_t *handle)
initialize the chip
Definition driver_adxl362.c:204
adxl362_set_detect_mode
uint8_t adxl362_set_detect_mode(adxl362_handle_t *handle, adxl362_detect_mode_t mode)
set the detect mode
Definition driver_adxl362.c:2819
adxl362_frame_t
struct adxl362_frame_s adxl362_frame_t
adxl362 frame structure definition
adxl362_get_activity_time
uint8_t adxl362_get_activity_time(adxl362_handle_t *handle, uint8_t *tim)
get the activity time
Definition driver_adxl362.c:2255
adxl362_set_interrupt_pin2_active_level
uint8_t adxl362_set_interrupt_pin2_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t level)
set the interrupt pin2 active level
Definition driver_adxl362.c:1042
adxl362_handle_t
struct adxl362_handle_s adxl362_handle_t
adxl362 handle structure definition
adxl362_get_interrupt_pin2_active_level
uint8_t adxl362_get_interrupt_pin2_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t *level)
get the interrupt pin2 active level
Definition driver_adxl362.c:1087
adxl362_get_odr
uint8_t adxl362_get_odr(adxl362_handle_t *handle, adxl362_odr_t *odr)
get the output data rate
Definition driver_adxl362.c:1499
adxl362_set_wake_up
uint8_t adxl362_set_wake_up(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable chip wake up
Definition driver_adxl362.c:1700
adxl362_get_inactivity_threshold
uint8_t adxl362_get_inactivity_threshold(adxl362_handle_t *handle, uint16_t *threshold)
get the inactivity threshold
Definition driver_adxl362.c:2468
adxl362_set_inactivity_threshold
uint8_t adxl362_set_inactivity_threshold(adxl362_handle_t *handle, uint16_t threshold)
set the inactivity threshold
Definition driver_adxl362.c:2424
adxl362_get_bandwidth
uint8_t adxl362_get_bandwidth(adxl362_handle_t *handle, adxl362_bandwidth_t *bandwidth)
get the filter bandwidth
Definition driver_adxl362.c:1335
adxl362_read
uint8_t adxl362_read(adxl362_handle_t *handle, int16_t raw[3], float g[3])
read the data
Definition driver_adxl362.c:3230
adxl362_get_inactivity
uint8_t adxl362_get_inactivity(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the inactivity status
Definition driver_adxl362.c:3110
adxl362_set_interrupt_pin1_map
uint8_t adxl362_set_interrupt_pin1_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t enable)
set the interrupt pin1 map
Definition driver_adxl362.c:959
adxl362_get_inactivity_detect_trigger
uint8_t adxl362_get_inactivity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t *trigger)
get the inactivity detect trigger mode
Definition driver_adxl362.c:2946
adxl362_set_noise_mode
uint8_t adxl362_set_noise_mode(adxl362_handle_t *handle, adxl362_noise_mode_t mode)
set the noise mode
Definition driver_adxl362.c:1618
adxl362_set_activity_threshold
uint8_t adxl362_set_activity_threshold(adxl362_handle_t *handle, uint16_t threshold)
set the activity threshold
Definition driver_adxl362.c:2029
adxl362_activity_threshold_convert_to_register
uint8_t adxl362_activity_threshold_convert_to_register(adxl362_handle_t *handle, float g, uint16_t *reg)
convert the activity threshold to the register raw data
Definition driver_adxl362.c:2112
adxl362_set_activity_time
uint8_t adxl362_set_activity_time(adxl362_handle_t *handle, uint8_t tim)
set the activity time
Definition driver_adxl362.c:2218
adxl362_get_mode
uint8_t adxl362_get_mode(adxl362_handle_t *handle, adxl362_mode_t *mode)
get the chip mode
Definition driver_adxl362.c:1909
adxl362_read_fifo
uint8_t adxl362_read_fifo(adxl362_handle_t *handle, adxl362_frame_t *frame, uint16_t *frame_len)
read data from the fifo
Definition driver_adxl362.c:3304
adxl362_get_auto_sleep
uint8_t adxl362_get_auto_sleep(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the auto sleep status
Definition driver_adxl362.c:1827
adxl362_noise_mode_t
adxl362_noise_mode_t
adxl362 noise mode enumeration definition
Definition driver_adxl362.h:113
adxl362_set_interrupt_pin1_active_level
uint8_t adxl362_set_interrupt_pin1_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t level)
set the interrupt pin1 active level
Definition driver_adxl362.c:876
adxl362_get_fifo_counter
uint8_t adxl362_get_fifo_counter(adxl362_handle_t *handle, uint16_t *counter)
get the fifo counter
Definition driver_adxl362.c:531
adxl362_get_fifo_temperature
uint8_t adxl362_get_fifo_temperature(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the fifo temperature status
Definition driver_adxl362.c:651
adxl362_get_activity_detect_trigger
uint8_t adxl362_get_activity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t *trigger)
get the activity detect trigger mode
Definition driver_adxl362.c:3028
adxl362_get_revision
uint8_t adxl362_get_revision(adxl362_handle_t *handle, uint8_t *id)
get the chip revision
Definition driver_adxl362.c:168
adxl362_inactivity_time_convert_to_register
uint8_t adxl362_inactivity_time_convert_to_register(adxl362_handle_t *handle, float ms, uint16_t *reg)
convert the inactivity time to the register raw data
Definition driver_adxl362.c:2689
adxl362_set_fifo_temperature
uint8_t adxl362_set_fifo_temperature(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable saving temperature data to fifo
Definition driver_adxl362.c:606
adxl362_get_inactivity_time
uint8_t adxl362_get_inactivity_time(adxl362_handle_t *handle, uint16_t *tim)
get the inactivity time
Definition driver_adxl362.c:2651
adxl362_bool_t
adxl362_bool_t
adxl362 bool enumeration definition
Definition driver_adxl362.h:63
adxl362_set_activity_detect_trigger
uint8_t adxl362_set_activity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t trigger)
set the activity detect trigger mode
Definition driver_adxl362.c:2983
adxl362_range_t
adxl362_range_t
adxl362 range enumeration definition
Definition driver_adxl362.h:81
adxl362_set_interrupt_pin1_as_external_clock
uint8_t adxl362_set_interrupt_pin1_as_external_clock(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable interrupt pin1 as the external clock
Definition driver_adxl362.c:1536
adxl362_irq_handler
uint8_t adxl362_irq_handler(adxl362_handle_t *handle)
irq handler
Definition driver_adxl362.c:3413
adxl362_detect_trigger_t
adxl362_detect_trigger_t
adxl362 detect trigger enumeration definition
Definition driver_adxl362.h:142
adxl362_set_mode
uint8_t adxl362_set_mode(adxl362_handle_t *handle, adxl362_mode_t mode)
set the chip mode
Definition driver_adxl362.c:1864
adxl362_get_interrupt_pin1_active_level
uint8_t adxl362_get_interrupt_pin1_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t *level)
get the interrupt pin1 active level
Definition driver_adxl362.c:921
adxl362_get_activity
uint8_t adxl362_get_activity(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the activity status
Definition driver_adxl362.c:3192
adxl362_set_inactivity
uint8_t adxl362_set_inactivity(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable inactivity
Definition driver_adxl362.c:3065
adxl362_interrupt_pin_level_t
adxl362_interrupt_pin_level_t
adxl362 interrupt pin level enumeration definition
Definition driver_adxl362.h:72
adxl362_activity_time_convert_to_register
uint8_t adxl362_activity_time_convert_to_register(adxl362_handle_t *handle, float ms, uint8_t *reg)
convert the activity time to the register raw data
Definition driver_adxl362.c:2293
adxl362_frame_type_t
adxl362_frame_type_t
adxl362 frame type enumeration definition
Definition driver_adxl362.h:191
adxl362_get_interrupt_pin1_as_external_clock
uint8_t adxl362_get_interrupt_pin1_as_external_clock(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the interrupt pin1 as the external clock status
Definition driver_adxl362.c:1581
adxl362_inactivity_threshold_convert_to_register
uint8_t adxl362_inactivity_threshold_convert_to_register(adxl362_handle_t *handle, float g, uint16_t *reg)
convert the inactivity threshold to the register raw data
Definition driver_adxl362.c:2507
adxl362_get_interrupt_pin2_as_external_sampling_trigger
uint8_t adxl362_get_interrupt_pin2_as_external_sampling_trigger(adxl362_handle_t *handle, adxl362_bool_t *enable)
get the interrupt pin2 as the external sampling trigger status
Definition driver_adxl362.c:1417
adxl362_set_interrupt_pin2_as_external_sampling_trigger
uint8_t adxl362_set_interrupt_pin2_as_external_sampling_trigger(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable interrupt pin2 as the external sampling trigger
Definition driver_adxl362.c:1372
adxl362_get_status
uint8_t adxl362_get_status(adxl362_handle_t *handle, uint8_t *status)
get the chip status
Definition driver_adxl362.c:496
adxl362_set_activity
uint8_t adxl362_set_activity(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable activity
Definition driver_adxl362.c:3147
adxl362_soft_reset
uint8_t adxl362_soft_reset(adxl362_handle_t *handle)
soft reset
Definition driver_adxl362.c:568
adxl362_set_auto_sleep
uint8_t adxl362_set_auto_sleep(adxl362_handle_t *handle, adxl362_bool_t enable)
enable or disable auto sleep
Definition driver_adxl362.c:1782
adxl362_get_range
uint8_t adxl362_get_range(adxl362_handle_t *handle, adxl362_range_t *range)
get the measurement range
Definition driver_adxl362.c:1253
adxl362_get_activity_threshold
uint8_t adxl362_get_activity_threshold(adxl362_handle_t *handle, uint16_t *threshold)
get the activity threshold
Definition driver_adxl362.c:2073
adxl362_get_interrupt_pin2_map
uint8_t adxl362_get_interrupt_pin2_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t *enable)
get the interrupt pin2 map
Definition driver_adxl362.c:1171
adxl362_read_temperature
uint8_t adxl362_read_temperature(adxl362_handle_t *handle, int16_t *raw, float *temp)
read the temperature
Definition driver_adxl362.c:458
adxl362_activity_threshold_convert_to_data
uint8_t adxl362_activity_threshold_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *g)
convert the register raw data to the activity threshold
Definition driver_adxl362.c:2168
adxl362_set_bandwidth
uint8_t adxl362_set_bandwidth(adxl362_handle_t *handle, adxl362_bandwidth_t bandwidth)
set the filter bandwidth
Definition driver_adxl362.c:1290
adxl362_deinit
uint8_t adxl362_deinit(adxl362_handle_t *handle)
close the chip
Definition driver_adxl362.c:335
adxl362_activity_time_convert_to_data
uint8_t adxl362_activity_time_convert_to_data(adxl362_handle_t *handle, uint8_t reg, float *ms)
convert the register raw data to the activity time
Definition driver_adxl362.c:2361
adxl362_set_odr
uint8_t adxl362_set_odr(adxl362_handle_t *handle, adxl362_odr_t odr)
set the output data rate
Definition driver_adxl362.c:1454
ADXL362_STATUS_DATA_READY
@ ADXL362_STATUS_DATA_READY
Definition driver_adxl362.h:173
ADXL362_STATUS_FIFO_OVERRUN
@ ADXL362_STATUS_FIFO_OVERRUN
Definition driver_adxl362.h:170
ADXL362_STATUS_AWAKE
@ ADXL362_STATUS_AWAKE
Definition driver_adxl362.h:167
ADXL362_STATUS_INACT
@ ADXL362_STATUS_INACT
Definition driver_adxl362.h:168
ADXL362_STATUS_FIFO_READY
@ ADXL362_STATUS_FIFO_READY
Definition driver_adxl362.h:172
ADXL362_STATUS_ERR_USER_REGS
@ ADXL362_STATUS_ERR_USER_REGS
Definition driver_adxl362.h:166
ADXL362_STATUS_ACT
@ ADXL362_STATUS_ACT
Definition driver_adxl362.h:169
ADXL362_STATUS_FIFO_WATERMARK
@ ADXL362_STATUS_FIFO_WATERMARK
Definition driver_adxl362.h:171
ADXL362_FRAME_TYPE_TEMP
@ ADXL362_FRAME_TYPE_TEMP
Definition driver_adxl362.h:195
adxl362_get_reg
uint8_t adxl362_get_reg(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
get the chip register
Definition driver_adxl362.c:3535
adxl362_get_fifo
uint8_t adxl362_get_fifo(adxl362_handle_t *handle, uint8_t *buf, uint16_t len)
read from fifo
Definition driver_adxl362.c:3561
adxl362_set_reg
uint8_t adxl362_set_reg(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
set the chip register
Definition driver_adxl362.c:3508
adxl362_frame_s::raw
int16_t raw
Definition driver_adxl362.h:204
adxl362_frame_s::data
float data
Definition driver_adxl362.h:205
adxl362_frame_s::type
adxl362_frame_type_t type
Definition driver_adxl362.h:203
adxl362_handle_s::inited
uint8_t inited
Definition driver_adxl362.h:221
adxl362_handle_s::spi_init
uint8_t(* spi_init)(void)
Definition driver_adxl362.h:213
adxl362_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition driver_adxl362.h:219
adxl362_handle_s::receive_callback
void(* receive_callback)(uint8_t type)
Definition driver_adxl362.h:218
adxl362_handle_s::buf
uint8_t buf[512 *2]
Definition driver_adxl362.h:222
adxl362_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition driver_adxl362.h:220
adxl362_handle_s::spi_write_address16
uint8_t(* spi_write_address16)(uint16_t addr, uint8_t *buf, uint16_t len)
Definition driver_adxl362.h:217
adxl362_handle_s::spi_read_address16
uint8_t(* spi_read_address16)(uint16_t addr, uint8_t *buf, uint16_t len)
Definition driver_adxl362.h:216
adxl362_handle_s::spi_deinit
uint8_t(* spi_deinit)(void)
Definition driver_adxl362.h:214
adxl362_handle_s::spi_read
uint8_t(* spi_read)(uint8_t addr, uint8_t *buf, uint16_t len)
Definition driver_adxl362.h:215
adxl362_info_s::temperature_max
float temperature_max
Definition driver_adxl362.h:237
adxl362_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition driver_adxl362.h:234
adxl362_info_s::driver_version
uint32_t driver_version
Definition driver_adxl362.h:238
adxl362_info_s::temperature_min
float temperature_min
Definition driver_adxl362.h:236
adxl362_info_s::max_current_ma
float max_current_ma
Definition driver_adxl362.h:235
adxl362_info_s::manufacturer_name
char manufacturer_name[32]
Definition driver_adxl362.h:231
adxl362_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition driver_adxl362.h:233
adxl362_info_s::interface
char interface[8]
Definition driver_adxl362.h:232
adxl362_info_s::chip_name
char chip_name[32]
Definition driver_adxl362.h:230