driver_adxl362.h

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#ifndef DRIVER_ADXL362_H
#define DRIVER_ADXL362_H
 
#include <stdint.h>
#include <stdio.h>
#include <string.h>
 
#ifdef __cplusplus
extern "C"{
#endif



typedef enum
{
    ADXL362_BOOL_FALSE = 0x00,        
    ADXL362_BOOL_TRUE  = 0x01,        
} adxl362_bool_t;

typedef enum
{
    ADXL362_INTERRUPT_PIN_HIGH = 0x00,        
    ADXL362_INTERRUPT_PIN_LOW  = 0x01,        
} adxl362_interrupt_pin_level_t;

typedef enum
{
    ADXL362_RANGE_2G = 0x00,        
    ADXL362_RANGE_4G = 0x01,        
    ADXL362_RANGE_8G = 0x02,        
} adxl362_range_t;

typedef enum
{
    ADXL362_BANDWIDTH_ODR_DIV_2 = 0x00,        
    ADXL362_BANDWIDTH_ODE_DIV_4 = 0x01,        
} adxl362_bandwidth_t;

typedef enum
{
    ADXL362_ODR_12P5HZ = 0x00,        
    ADXL362_ODR_25HZ   = 0x01,        
    ADXL362_ODR_50HZ   = 0x02,        
    ADXL362_ODR_100HZ  = 0x03,        
    ADXL362_ODR_200HZ  = 0x04,        
    ADXL362_ODR_400HZ  = 0x05,        
} adxl362_odr_t;

typedef enum
{
    ADXL362_NOISE_MODE_NORMAL          = 0x00,        
    ADXL362_NOISE_MODE_LOW_NOISE       = 0x01,        
    ADXL362_NOISE_MODE_ULTRA_LOW_NOISE = 0x02,        
} adxl362_noise_mode_t;

typedef enum
{
    ADXL362_MODE_STANDBY     = 0x00,        
    ADXL362_MODE_MEASUREMENT = 0x02,        
} adxl362_mode_t;

typedef enum
{
    ADXL362_DETECT_MODE_BOTH = 0x00,        
    ADXL362_DETECT_MODE_LINK = 0x01,        
    ADXL362_DETECT_MODE_LOOP = 0x03,        
} adxl362_detect_mode_t;

typedef enum
{
    ADXL362_DETECT_TRIGGER_ABSOLUTE   = 0x00,        
    ADXL362_DETECT_TRIGGER_REFERENCED = 0x01,        
} adxl362_detect_trigger_t;

typedef enum
{
    ADXL362_INTERRUPT_MAP_AWAKE          = 6,        
    ADXL362_INTERRUPT_MAP_INACT          = 5,        
    ADXL362_INTERRUPT_MAP_ACT            = 4,        
    ADXL362_INTERRUPT_MAP_FIFO_OVERRUN   = 3,        
    ADXL362_INTERRUPT_MAP_FIFO_WATERMARK = 2,        
    ADXL362_INTERRUPT_MAP_FIFO_READY     = 1,        
    ADXL362_INTERRUPT_MAP_DATA_READY     = 0,        
} adxl362_interrupt_map_t;

typedef enum
{
    ADXL362_STATUS_ERR_USER_REGS  = (1 << 7),        
    ADXL362_STATUS_AWAKE          = (1 << 6),        
    ADXL362_STATUS_INACT          = (1 << 5),        
    ADXL362_STATUS_ACT            = (1 << 4),        
    ADXL362_STATUS_FIFO_OVERRUN   = (1 << 3),        
    ADXL362_STATUS_FIFO_WATERMARK = (1 << 2),        
    ADXL362_STATUS_FIFO_READY     = (1 << 1),        
    ADXL362_STATUS_DATA_READY     = (1 << 0),        
} adxl362_status_t;

typedef enum
{
    ADXL362_FIFO_MODE_DISABLE      = 0x00,        
    ADXL362_FIFO_MODE_OLDEST_SAVED = 0x01,        
    ADXL362_FIFO_MODE_STREAM       = 0x02,        
    ADXL362_FIFO_MODE_TRIGGERED    = 0x03,        
} adxl362_fifo_mode_t;

typedef enum
{
    ADXL362_FRAME_TYPE_X    = 0x00,        
    ADXL362_FRAME_TYPE_Y    = 0x01,        
    ADXL362_FRAME_TYPE_Z    = 0x02,        
    ADXL362_FRAME_TYPE_TEMP = 0x03,        
} adxl362_frame_type_t;

typedef struct adxl362_frame_s
{
    adxl362_frame_type_t type;       
    int16_t raw;                     
    float data;                      
} adxl362_frame_t;

typedef struct adxl362_handle_s
{
    uint8_t (*spi_init)(void);                                                        
    uint8_t (*spi_deinit)(void);                                                      
    uint8_t (*spi_read)(uint8_t addr, uint8_t *buf, uint16_t len);                    
    uint8_t (*spi_read_address16)(uint16_t addr, uint8_t *buf, uint16_t len);         
    uint8_t (*spi_write_address16)(uint16_t addr, uint8_t *buf, uint16_t len);        
    void (*receive_callback)(uint8_t type);                                           
    void (*delay_ms)(uint32_t ms);                                                    
    void (*debug_print)(const char *const fmt, ...);                                  
    uint8_t inited;                                                                   
    uint8_t buf[512 * 2];                                                             
} adxl362_handle_t;

typedef struct adxl362_info_s
{
    char chip_name[32];                
    char manufacturer_name[32];        
    char interface[8];                 
    float supply_voltage_min_v;        
    float supply_voltage_max_v;        
    float max_current_ma;              
    float temperature_min;             
    float temperature_max;             
    uint32_t driver_version;           
} adxl362_info_t;



#define DRIVER_ADXL362_LINK_INIT(HANDLE, STRUCTURE)                  memset(HANDLE, 0, sizeof(STRUCTURE))

#define DRIVER_ADXL362_LINK_SPI_INIT(HANDLE, FUC)                   (HANDLE)->spi_init = FUC

#define DRIVER_ADXL362_LINK_SPI_DEINIT(HANDLE, FUC)                 (HANDLE)->spi_deinit = FUC

#define DRIVER_ADXL362_LINK_SPI_READ(HANDLE, FUC)                   (HANDLE)->spi_read = FUC

#define DRIVER_ADXL362_LINK_SPI_READ_ADDRESS16(HANDLE, FUC)         (HANDLE)->spi_read_address16 = FUC

#define DRIVER_ADXL362_LINK_SPI_WRITE_ADDRESS16(HANDLE, FUC)        (HANDLE)->spi_write_address16 = FUC

#define DRIVER_ADXL362_LINK_DELAY_MS(HANDLE, FUC)                   (HANDLE)->delay_ms = FUC

#define DRIVER_ADXL362_LINK_DEBUG_PRINT(HANDLE, FUC)                (HANDLE)->debug_print = FUC

#define DRIVER_ADXL362_LINK_RECEIVE_CALLBACK(HANDLE, FUC)           (HANDLE)->receive_callback = FUC



uint8_t adxl362_info(adxl362_info_t *info);

uint8_t adxl362_irq_handler(adxl362_handle_t *handle);

uint8_t adxl362_init(adxl362_handle_t *handle);

uint8_t adxl362_deinit(adxl362_handle_t *handle);

uint8_t adxl362_read(adxl362_handle_t *handle, int16_t raw[3], float g[3]);

uint8_t adxl362_read_fifo(adxl362_handle_t *handle, adxl362_frame_t *frame, uint16_t *frame_len);

uint8_t adxl362_read_8msb(adxl362_handle_t *handle, int8_t raw[3], float g[3]);

uint8_t adxl362_read_temperature(adxl362_handle_t *handle, int16_t *raw, float *temp);

uint8_t adxl362_get_revision(adxl362_handle_t *handle, uint8_t *id);

uint8_t adxl362_get_status(adxl362_handle_t *handle, uint8_t *status);

uint8_t adxl362_get_fifo_counter(adxl362_handle_t *handle, uint16_t *counter);

uint8_t adxl362_soft_reset(adxl362_handle_t *handle);

uint8_t adxl362_set_fifo_temperature(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_fifo_temperature(adxl362_handle_t *handle, adxl362_bool_t *enable);

uint8_t adxl362_set_fifo_mode(adxl362_handle_t *handle, adxl362_fifo_mode_t mode);

uint8_t adxl362_get_fifo_mode(adxl362_handle_t *handle, adxl362_fifo_mode_t *mode);

uint8_t adxl362_set_fifo_sample(adxl362_handle_t *handle, uint16_t sample);

uint8_t adxl362_get_fifo_sample(adxl362_handle_t *handle, uint16_t *sample);

uint8_t adxl362_set_interrupt_pin1_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t level);

uint8_t adxl362_get_interrupt_pin1_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t *level);

uint8_t adxl362_set_interrupt_pin1_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t enable);

uint8_t adxl362_get_interrupt_pin1_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t *enable);

uint8_t adxl362_set_interrupt_pin2_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t level);

uint8_t adxl362_get_interrupt_pin2_active_level(adxl362_handle_t *handle, adxl362_interrupt_pin_level_t *level);

uint8_t adxl362_set_interrupt_pin2_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t enable);

uint8_t adxl362_get_interrupt_pin2_map(adxl362_handle_t *handle, adxl362_interrupt_map_t map, adxl362_bool_t *enable);

uint8_t adxl362_set_range(adxl362_handle_t *handle, adxl362_range_t range);

uint8_t adxl362_get_range(adxl362_handle_t *handle, adxl362_range_t *range);

uint8_t adxl362_set_bandwidth(adxl362_handle_t *handle, adxl362_bandwidth_t bandwidth);

uint8_t adxl362_get_bandwidth(adxl362_handle_t *handle, adxl362_bandwidth_t *bandwidth);

uint8_t adxl362_set_interrupt_pin2_as_external_sampling_trigger(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_interrupt_pin2_as_external_sampling_trigger(adxl362_handle_t *handle, adxl362_bool_t *enable);

uint8_t adxl362_set_odr(adxl362_handle_t *handle, adxl362_odr_t odr);

uint8_t adxl362_get_odr(adxl362_handle_t *handle, adxl362_odr_t *odr);

uint8_t adxl362_set_interrupt_pin1_as_external_clock(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_interrupt_pin1_as_external_clock(adxl362_handle_t *handle, adxl362_bool_t *enable);

uint8_t adxl362_set_noise_mode(adxl362_handle_t *handle, adxl362_noise_mode_t mode);

uint8_t adxl362_get_noise_mode(adxl362_handle_t *handle, adxl362_noise_mode_t *mode);

uint8_t adxl362_set_wake_up(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_wake_up(adxl362_handle_t *handle, adxl362_bool_t *enable);

uint8_t adxl362_set_auto_sleep(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_auto_sleep(adxl362_handle_t *handle, adxl362_bool_t *enable);

uint8_t adxl362_set_mode(adxl362_handle_t *handle, adxl362_mode_t mode);

uint8_t adxl362_get_mode(adxl362_handle_t *handle, adxl362_mode_t *mode);

uint8_t adxl362_set_activity_threshold(adxl362_handle_t *handle, uint16_t threshold);

uint8_t adxl362_get_activity_threshold(adxl362_handle_t *handle, uint16_t *threshold);

uint8_t adxl362_activity_threshold_convert_to_register(adxl362_handle_t *handle, float g, uint16_t *reg);

uint8_t adxl362_activity_threshold_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *g);

uint8_t adxl362_set_activity_time(adxl362_handle_t *handle, uint8_t tim);

uint8_t adxl362_activity_time_convert_to_data(adxl362_handle_t *handle, uint8_t reg, float *ms);

uint8_t adxl362_activity_time_convert_to_register(adxl362_handle_t *handle, float ms, uint8_t *reg);

uint8_t adxl362_get_activity_time(adxl362_handle_t *handle, uint8_t *tim);

uint8_t adxl362_set_inactivity_threshold(adxl362_handle_t *handle, uint16_t threshold);

uint8_t adxl362_get_inactivity_threshold(adxl362_handle_t *handle, uint16_t *threshold);

uint8_t adxl362_inactivity_threshold_convert_to_register(adxl362_handle_t *handle, float g, uint16_t *reg);

uint8_t adxl362_inactivity_threshold_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *g);

uint8_t adxl362_set_inactivity_time(adxl362_handle_t *handle, uint16_t tim);

uint8_t adxl362_get_inactivity_time(adxl362_handle_t *handle, uint16_t *tim);

uint8_t adxl362_inactivity_time_convert_to_register(adxl362_handle_t *handle, float ms, uint16_t *reg);

uint8_t adxl362_inactivity_time_convert_to_data(adxl362_handle_t *handle, uint16_t reg, float *ms);

uint8_t adxl362_set_detect_mode(adxl362_handle_t *handle, adxl362_detect_mode_t mode);

uint8_t adxl362_get_detect_mode(adxl362_handle_t *handle, adxl362_detect_mode_t *mode);

uint8_t adxl362_set_inactivity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t trigger);

uint8_t adxl362_get_inactivity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t *trigger);

uint8_t adxl362_set_activity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t trigger);

uint8_t adxl362_get_activity_detect_trigger(adxl362_handle_t *handle, adxl362_detect_trigger_t *trigger);

uint8_t adxl362_set_inactivity(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_inactivity(adxl362_handle_t *handle, adxl362_bool_t *enable);

uint8_t adxl362_set_activity(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_activity(adxl362_handle_t *handle, adxl362_bool_t *enable);

uint8_t adxl362_set_self_test(adxl362_handle_t *handle, adxl362_bool_t enable);

uint8_t adxl362_get_self_test(adxl362_handle_t *handle, adxl362_bool_t *enable);



uint8_t adxl362_set_reg(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len);

uint8_t adxl362_get_reg(adxl362_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len);

uint8_t adxl362_get_fifo(adxl362_handle_t *handle, uint8_t *buf, uint16_t len);


 
#ifdef __cplusplus
}
#endif
 
#endif