LibDriver CH9120
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driver_ch9120_basic.c
Go to the documentation of this file.
1
36
37#include "driver_ch9120_basic.h"
38
39static ch9120_handle_t gs_handle;
40
79
95 uint8_t ip[4], uint16_t port,
96 uint8_t mask[4], uint8_t gateway[4],
97 uint8_t dest_ip[4], uint16_t dest_port)
98{
99 uint8_t res;
100 uint8_t reg;
101
102 /* set default dhcp */
104 if (res != 0)
105 {
106 ch9120_interface_debug_print("ch9120: set dhcp failed.\n");
107
108 return 1;
109 }
110
111 /* set local ip */
112 res = ch9120_set_ip(&gs_handle, ip);
113 if (res != 0)
114 {
115 ch9120_interface_debug_print("ch9120: set ip failed.\n");
116
117 return 1;
118 }
119
120 /* set subnet mask */
121 res = ch9120_set_subnet_mask(&gs_handle, mask);
122 if (res != 0)
123 {
124 ch9120_interface_debug_print("ch9120: set subnet mask failed.\n");
125
126 return 1;
127 }
128
129 /* set gateway */
130 res = ch9120_set_gateway(&gs_handle, gateway);
131 if (res != 0)
132 {
133 ch9120_interface_debug_print("ch9120: set gateway failed.\n");
134
135 return 1;
136 }
137
138 /* set source port */
139 res = ch9120_set_source_port(&gs_handle, port);
140 if (res != 0)
141 {
142 ch9120_interface_debug_print("ch9120: set source port failed.\n");
143
144 return 1;
145 }
146
147 /* set dest ip */
148 res = ch9120_set_dest_ip(&gs_handle, dest_ip);
149 if (res != 0)
150 {
151 ch9120_interface_debug_print("ch9120: set dest ip failed.\n");
152
153 return 1;
154 }
155
156 /* set dest port */
157 res = ch9120_set_dest_port(&gs_handle, dest_port);
158 if (res != 0)
159 {
160 ch9120_interface_debug_print("ch9120: set dest port failed.\n");
161
162 return 1;
163 }
164
165 /* set default uart baud */
167 if (res != 0)
168 {
169 ch9120_interface_debug_print("ch9120: set uart baud failed.\n");
170
171 return 1;
172 }
173
174 /* set default uart config */
177 if (res != 0)
178 {
179 ch9120_interface_debug_print("ch9120: set uart config failed.\n");
180
181 return 1;
182 }
183
184 /* set default uart timeout */
186 if (res != 0)
187 {
188 ch9120_interface_debug_print("ch9120: uart timeout convert to register failed.\n");
189
190 return 1;
191 }
192
193 /* set uart timeout */
194 res = ch9120_set_uart_timeout(&gs_handle, reg);
195 if (res != 0)
196 {
197 ch9120_interface_debug_print("ch9120: set uart timeout failed.\n");
198
199 return 1;
200 }
201
202 /* set default source port random */
204 if (res != 0)
205 {
206 ch9120_interface_debug_print("ch9120: set source port random failed.\n");
207
208 return 1;
209 }
210
211 /* set default uart buffer length */
213 if (res != 0)
214 {
215 ch9120_interface_debug_print("ch9120: set uart buffer length failed.\n");
216
217 return 1;
218 }
219
220 /* set default uart flush */
222 if (res != 0)
223 {
224 ch9120_interface_debug_print("ch9120: set uart flush failed.\n");
225
226 return 1;
227 }
228
229 /* set default disconnect with no rj45 */
231 if (res != 0)
232 {
233 ch9120_interface_debug_print("ch9120: set disconnect with no rj45 failed.\n");
234
235 return 1;
236 }
237
238 /* set mode */
239 res = ch9120_set_mode(&gs_handle, mode);
240 if (res != 0)
241 {
242 ch9120_interface_debug_print("ch9120: set mode failed.\n");
243
244 return 1;
245 }
246
247 /* save to eeprom */
248 res = ch9120_save_to_eeprom(&gs_handle);
249 if (res != 0)
250 {
251 ch9120_interface_debug_print("ch9120: save to eeprom failed.\n");
252
253 return 1;
254 }
255
256 /* config and reset */
257 res = ch9120_config_and_reset(&gs_handle);
258 if (res != 0)
259 {
260 ch9120_interface_debug_print("ch9120: config and reset failed.\n");
261
262 return 1;
263 }
264
265 return 0;
266}
267
277uint8_t ch9120_basic_read(uint8_t *buf, uint16_t *len)
278{
279 if (ch9120_read(&gs_handle, buf, len) != 0)
280 {
281 return 1;
282 }
283
284 return 0;
285}
286
296uint8_t ch9120_basic_write(uint8_t *buf, uint16_t len)
297{
298 if (ch9120_write(&gs_handle, buf, len) != 0)
299 {
300 return 1;
301 }
302
303 return 0;
304}
305
314{
315 /* deinit ch9120 */
316 if (ch9120_deinit(&gs_handle) != 0)
317 {
318 return 1;
319 }
320
321 return 0;
322}
driver ch9120 basic header file
uint8_t ch9120_set_uart_baud(ch9120_handle_t *handle, uint32_t baud)
set uart baud
uint8_t ch9120_set_dest_ip(ch9120_handle_t *handle, uint8_t ip[4])
set dest ip
uint8_t ch9120_init(ch9120_handle_t *handle)
initialize the chip
ch9120_mode_t
ch9120 mode enumeration definition
struct ch9120_handle_s ch9120_handle_t
ch9120 handle structure definition
uint8_t ch9120_read(ch9120_handle_t *handle, uint8_t *buf, uint16_t *len)
read data
uint8_t ch9120_set_dest_port(ch9120_handle_t *handle, uint16_t num)
set dest port
uint8_t ch9120_set_source_port_random(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable random source port number
uint8_t ch9120_set_uart_config(ch9120_handle_t *handle, uint8_t data_bit, ch9120_parity_t parity, uint8_t stop_bit)
set uart config
uint8_t ch9120_set_uart_buffer_length(ch9120_handle_t *handle, uint32_t len)
set uart buffer length
uint8_t ch9120_set_uart_flush(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable uart auto flush
uint8_t ch9120_deinit(ch9120_handle_t *handle)
close the chip
uint8_t ch9120_set_gateway(ch9120_handle_t *handle, uint8_t ip[4])
set gateway
uint8_t ch9120_config_and_reset(ch9120_handle_t *handle)
config and reset the chip
uint8_t ch9120_set_uart_timeout(ch9120_handle_t *handle, uint8_t timeout)
set uart timeout
uint8_t ch9120_set_disconnect_with_no_rj45(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable disconnect with no rj45
uint8_t ch9120_set_mode(ch9120_handle_t *handle, ch9120_mode_t mode)
set mode
uint8_t ch9120_uart_timeout_convert_to_register(ch9120_handle_t *handle, uint16_t ms, uint8_t *reg)
convert the uart timeout to the register raw data
uint8_t ch9120_set_dhcp(ch9120_handle_t *handle, ch9120_bool_t enable)
enable or disable dhcp
uint8_t ch9120_save_to_eeprom(ch9120_handle_t *handle)
save to eeprom
uint8_t ch9120_set_subnet_mask(ch9120_handle_t *handle, uint8_t mask[4])
set subnet mask
uint8_t ch9120_set_ip(ch9120_handle_t *handle, uint8_t ip[4])
set ip address
uint8_t ch9120_write(ch9120_handle_t *handle, uint8_t *buf, uint16_t len)
write data
uint8_t ch9120_set_source_port(ch9120_handle_t *handle, uint16_t num)
set source port
#define CH9120_BASIC_DEFAULT_UART_PORT
#define CH9120_BASIC_DEFAULT_DHCP
ch9120 basic example default definition
#define CH9120_BASIC_DEFAULT_UART_SOURCE_PORT_RANDOM
#define CH9120_BASIC_DEFAULT_UART_TIMEOUT
#define CH9120_BASIC_DEFAULT_UART_FLUSH
uint8_t ch9120_basic_deinit(void)
basic example deinit
uint8_t ch9120_basic_config(ch9120_mode_t mode, uint8_t ip[4], uint16_t port, uint8_t mask[4], uint8_t gateway[4], uint8_t dest_ip[4], uint16_t dest_port)
basic example config
#define CH9120_BASIC_DEFAULT_UART_PARITY
#define CH9120_BASIC_DEFAULT_DISCONNECT_WITH_NO_RJ45
#define CH9120_BASIC_DEFAULT_UART_DATA_BIT
uint8_t ch9120_basic_init(void)
basic example init
#define CH9120_BASIC_DEFAULT_UART_STOP_BIT
#define CH9120_BASIC_DEFAULT_UART_BUFFER_LENGTH
uint8_t ch9120_basic_write(uint8_t *buf, uint16_t len)
basic example write data
uint8_t ch9120_basic_read(uint8_t *buf, uint16_t *len)
basic example read data
uint8_t ch9120_interface_uart_write(uint8_t *buf, uint16_t len)
interface uart write
uint8_t ch9120_interface_cfg_gpio_init(void)
interface cfg gpio init
uint16_t ch9120_interface_uart_read(uint8_t *buf, uint16_t len)
interface uart read
uint8_t ch9120_interface_reset_gpio_init(void)
interface reset gpio init
uint8_t ch9120_interface_cfg_gpio_write(uint8_t data)
interface cfg gpio write
uint8_t ch9120_interface_reset_gpio_deinit(void)
interface reset gpio deinit
uint8_t ch9120_interface_uart_init(void)
interface uart init
uint8_t ch9120_interface_uart_flush(void)
interface uart flush
uint8_t ch9120_interface_uart_deinit(void)
interface uart deinit
uint8_t ch9120_interface_cfg_gpio_deinit(void)
interface cfg gpio deinit
void ch9120_interface_debug_print(const char *const fmt,...)
interface print format data
uint8_t ch9120_interface_reset_gpio_write(uint8_t data)
interface reset gpio write
void ch9120_interface_delay_ms(uint32_t ms)
interface delay ms