LibDriver L3GD20H
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driver_l3gd20h_interrupt_test.c
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1
37
39#include <stdlib.h>
40
41static l3gd20h_handle_t gs_handle;
42static volatile uint8_t g_flag = 0;
43
52{
53 if (l3gd20h_irq_handler(&gs_handle, 1) != 0)
54 {
55 return 1;
56 }
57 else
58 {
59 return 0;
60 }
61}
62
68static void a_l3gd20h_interface_receive_callback(uint8_t type)
69{
70 int16_t raw[1][3];
71 float dps[1][3];
72 uint16_t len;
73 uint8_t res;
74
75 switch (type)
76 {
78 {
79 len = 1;
80 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
81 if (res != 0)
82 {
83 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
84
85 return;
86 }
87 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
88 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
89 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
90 g_flag = 1;
91 l3gd20h_interface_debug_print("l3gd20h: irq z high threshold.\n");
92
93 break;
94 }
96 {
97 len = 1;
98 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
99 if (res != 0)
100 {
101 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
102
103 return;
104 }
105 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
106 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
107 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
108 g_flag = 1;
109 l3gd20h_interface_debug_print("l3gd20h: irq y high threshold.\n");
110
111 break;
112 }
114 {
115 len = 1;
116 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
117 if (res != 0)
118 {
119 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
120
121 return;
122 }
123 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
124 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
125 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
126 g_flag = 1;
127 l3gd20h_interface_debug_print("l3gd20h: irq x high threshold.\n");
128
129 break;
130 }
131 default :
132 {
133 break;
134 }
135 }
136}
137
150 float interrupt_threshold, uint32_t times)
151{
152 uint8_t res;
153 uint16_t threshold, i;
154 l3gd20h_info_t info;
155
156 /* link interface function */
168 DRIVER_L3GD20H_LINK_RECEIVE_CALLBACK(&gs_handle, a_l3gd20h_interface_receive_callback);
169
170 /* get information */
171 res = l3gd20h_info(&info);
172 if (res != 0)
173 {
174 l3gd20h_interface_debug_print("l3gd20h: get info failed.\n");
175
176 return 1;
177 }
178 else
179 {
180 /* print chip info */
181 l3gd20h_interface_debug_print("l3gd20h: chip is %s.\n", info.chip_name);
182 l3gd20h_interface_debug_print("l3gd20h: manufacturer is %s.\n", info.manufacturer_name);
183 l3gd20h_interface_debug_print("l3gd20h: interface is %s.\n", info.interface);
184 l3gd20h_interface_debug_print("l3gd20h: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
185 l3gd20h_interface_debug_print("l3gd20h: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
186 l3gd20h_interface_debug_print("l3gd20h: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
187 l3gd20h_interface_debug_print("l3gd20h: max current is %0.2fmA.\n", info.max_current_ma);
188 l3gd20h_interface_debug_print("l3gd20h: max temperature is %0.1fC.\n", info.temperature_max);
189 l3gd20h_interface_debug_print("l3gd20h: min temperature is %0.1fC.\n", info.temperature_min);
190 }
191
192 /* start interrupt test */
193 l3gd20h_interface_debug_print("l3gd20h: start interrupt test.\n");
194
195 /* set the interface */
196 res = l3gd20h_set_interface(&gs_handle, interface);
197 if (res != 0)
198 {
199 l3gd20h_interface_debug_print("l3gd20h: set interface failed.\n");
200
201 return 1;
202 }
203
204 /* set the address pin */
205 res = l3gd20h_set_addr_pin(&gs_handle, addr_pin);
206 if (res != 0)
207 {
208 l3gd20h_interface_debug_print("l3gd20h: set addr pin failed.\n");
209
210 return 1;
211 }
212
213 /* init the l3gd20h */
214 res = l3gd20h_init(&gs_handle);
215 if (res != 0)
216 {
217 l3gd20h_interface_debug_print("l3gd20h: init failed.\n");
218
219 return 1;
220 }
221
222 /* set normal boot */
223 res = l3gd20h_set_boot(&gs_handle, L3GD20H_BOOT_NORMAL);
224 if (res != 0)
225 {
226 l3gd20h_interface_debug_print("l3gd20h: set boot failed.\n");
227 (void)l3gd20h_deinit(&gs_handle);
228
229 return 1;
230 }
231
232 /* enable x axis*/
234 if (res != 0)
235 {
236 l3gd20h_interface_debug_print("l3gd20h: set axis failed.\n");
237 (void)l3gd20h_deinit(&gs_handle);
238
239 return 1;
240 }
241
242 /* enable y axis*/
244 if (res != 0)
245 {
246 l3gd20h_interface_debug_print("l3gd20h: set axis failed.\n");
247 (void)l3gd20h_deinit(&gs_handle);
248
249 return 1;
250 }
251
252 /* enable z axis*/
254 if (res != 0)
255 {
256 l3gd20h_interface_debug_print("l3gd20h: set axis failed.\n");
257 (void)l3gd20h_deinit(&gs_handle);
258
259 return 1;
260 }
261
262 /* set 100 Hz rate bandwidth 12.5 Hz */
264 if (res != 0)
265 {
266 l3gd20h_interface_debug_print("l3gd20h: set rate bandwidth failed.\n");
267 (void)l3gd20h_deinit(&gs_handle);
268
269 return 1;
270 }
271
272 /* disable edge trigger */
274 if (res != 0)
275 {
276 l3gd20h_interface_debug_print("l3gd20h: set edge trigger failed.\n");
277 (void)l3gd20h_deinit(&gs_handle);
278
279 return 1;
280 }
281
282 /* disable level trigger */
284 if (res != 0)
285 {
286 l3gd20h_interface_debug_print("l3gd20h: set level trigger failed.\n");
287 (void)l3gd20h_deinit(&gs_handle);
288
289 return 1;
290 }
291
292 /* enable latched */
294 if (res != 0)
295 {
296 l3gd20h_interface_debug_print("l3gd20h: set level sensitive latched failed.\n");
297 (void)l3gd20h_deinit(&gs_handle);
298
299 return 1;
300 }
301
302 /* normal mode */
304 if (res != 0)
305 {
306 l3gd20h_interface_debug_print("l3gd20h: set self test failed.\n");
307 (void)l3gd20h_deinit(&gs_handle);
308
309 return 1;
310 }
311
312 /* set high pass filter normal mode */
314 if (res != 0)
315 {
316 l3gd20h_interface_debug_print("l3gd20h: set high pass filter normal mode failed.\n");
317 (void)l3gd20h_deinit(&gs_handle);
318
319 return 1;
320 }
321
322 /* set high pass filter cut-off frequency 0 */
324 if (res != 0)
325 {
326 l3gd20h_interface_debug_print("l3gd20h: set high pass filter cut off frequency failed.\n");
327 (void)l3gd20h_deinit(&gs_handle);
328
329 return 1;
330 }
331
332 /* enable high pass filter */
334 if (res != 0)
335 {
336 l3gd20h_interface_debug_print("l3gd20h: set high pass filter failed.\n");
337 (void)l3gd20h_deinit(&gs_handle);
338
339 return 1;
340 }
341
342 /* disable block data update */
344 if (res != 0)
345 {
346 l3gd20h_interface_debug_print("l3gd20h: set block data update failed.\n");
347 (void)l3gd20h_deinit(&gs_handle);
348
349 return 1;
350 }
351
352 /* set LPF1-HPF-LPF2 */
354 if (res != 0)
355 {
356 l3gd20h_interface_debug_print("l3gd20h: set out selection failed.\n");
357 (void)l3gd20h_deinit(&gs_handle);
358
359 return 1;
360 }
361
362 /* set LPF1-HPF-LPF2 */
364 if (res != 0)
365 {
366 l3gd20h_interface_debug_print("l3gd20h: set interrupt selection failed.\n");
367 (void)l3gd20h_deinit(&gs_handle);
368
369 return 1;
370 }
371
372 /* set high pass filter reference 0x00 */
373 res = l3gd20h_set_high_pass_filter_reference(&gs_handle, 0x00);
374 if (res != 0)
375 {
376 l3gd20h_interface_debug_print("l3gd20h: set high pass filter reference failed.\n");
377 (void)l3gd20h_deinit(&gs_handle);
378
379 return 1;
380 }
381
382 /* bypass mode */
384 if (res != 0)
385 {
386 l3gd20h_interface_debug_print("l3gd20h: set fifo mode failed.\n");
387 (void)l3gd20h_deinit(&gs_handle);
388
389 return 1;
390 }
391
392 /* enable interrupt 1*/
393 res = l3gd20h_set_interrupt1(&gs_handle, L3GD20H_BOOL_TRUE);
394 if (res != 0)
395 {
396 l3gd20h_interface_debug_print("l3gd20h: set interrupt1 failed.\n");
397 (void)l3gd20h_deinit(&gs_handle);
398
399 return 1;
400 }
401
402 /* disable boot on interrupt 1*/
404 if (res != 0)
405 {
406 l3gd20h_interface_debug_print("l3gd20h: set boot on interrupt1 failed.\n");
407 (void)l3gd20h_deinit(&gs_handle);
408
409 return 1;
410 }
411
412 /* active level low */
414 if (res != 0)
415 {
416 l3gd20h_interface_debug_print("l3gd20h: set interrupt active level failed.\n");
417 (void)l3gd20h_deinit(&gs_handle);
418
419 return 1;
420 }
421
422 /* push-pull pin type */
424 if (res != 0)
425 {
426 l3gd20h_interface_debug_print("l3gd20h: set interrupt pin type failed.\n");
427 (void)l3gd20h_deinit(&gs_handle);
428
429 return 1;
430 }
431
432 /* disable data ready on interrupt2 */
434 if (res != 0)
435 {
436 l3gd20h_interface_debug_print("l3gd20h: set data ready on interrupt2 failed.\n");
437 (void)l3gd20h_deinit(&gs_handle);
438
439 return 1;
440 }
441
442 /* fifo threshold on interrupt2 */
444 if (res != 0)
445 {
446 l3gd20h_interface_debug_print("l3gd20h: set fifo threshold on interrupt2 failed.\n");
447 (void)l3gd20h_deinit(&gs_handle);
448
449 return 1;
450 }
451
452 /* fifo overrun on interrupt2 */
454 if (res != 0)
455 {
456 l3gd20h_interface_debug_print("l3gd20h: set fifo overrun on interrupt2 failed.\n");
457 (void)l3gd20h_deinit(&gs_handle);
458
459 return 1;
460 }
461
462 /* fifo empty on interrupt2 */
464 if (res != 0)
465 {
466 l3gd20h_interface_debug_print("l3gd20h: set fifo empty on interrupt2 failed.\n");
467 (void)l3gd20h_deinit(&gs_handle);
468
469 return 1;
470 }
471
472 /* disable L3GD20H_INTERRUPT_EVENT_AND_OR_COMBINATION */
474 if (res != 0)
475 {
476 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
477 (void)l3gd20h_deinit(&gs_handle);
478
479 return 1;
480 }
481
482 /* disable L3GD20H_INTERRUPT_EVENT_LATCH */
484 if (res != 0)
485 {
486 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
487 (void)l3gd20h_deinit(&gs_handle);
488
489 return 1;
490 }
491
492 /* enable L3GD20H_INTERRUPT_EVENT_Z_HIGH_EVENT */
494 if (res != 0)
495 {
496 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
497 (void)l3gd20h_deinit(&gs_handle);
498
499 return 1;
500 }
501
502 /* disable L3GD20H_INTERRUPT_EVENT_Z_LOW_EVENT */
504 if (res != 0)
505 {
506 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
507 (void)l3gd20h_deinit(&gs_handle);
508
509 return 1;
510 }
511
512 /* enable L3GD20H_INTERRUPT_EVENT_Y_HIGH_EVENT */
514 if (res != 0)
515 {
516 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
517 (void)l3gd20h_deinit(&gs_handle);
518
519 return 1;
520 }
521
522 /* disable L3GD20H_INTERRUPT_EVENT_Y_LOW_EVENT */
524 if (res != 0)
525 {
526 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
527 (void)l3gd20h_deinit(&gs_handle);
528
529 return 1;
530 }
531
532 /* enable L3GD20H_INTERRUPT_EVENT_X_HIGH_EVENT */
534 if (res != 0)
535 {
536 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
537 (void)l3gd20h_deinit(&gs_handle);
538
539 return 1;
540 }
541
542 /* disable L3GD20H_INTERRUPT_EVENT_X_LOW_EVENT */
544 if (res != 0)
545 {
546 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
547 (void)l3gd20h_deinit(&gs_handle);
548
549 return 1;
550 }
551
552 /* convert the threshold */
553 res = l3gd20h_interrupt_threshold_convert_to_register(&gs_handle, interrupt_threshold, (uint16_t *)&threshold);
554 if (res != 0)
555 {
556 l3gd20h_interface_debug_print("l3gd20h: convert to register failed.\n");
557 (void)l3gd20h_deinit(&gs_handle);
558
559 return 1;
560 }
561
562 /* set x interrupt threshold */
563 res = l3gd20h_set_x_interrupt_threshold(&gs_handle, threshold);
564 if (res != 0)
565 {
566 l3gd20h_interface_debug_print("l3gd20h: set x interrupt threshold failed.\n");
567 (void)l3gd20h_deinit(&gs_handle);
568
569 return 1;
570 }
571
572 /* set y interrupt threshold */
573 res = l3gd20h_set_y_interrupt_threshold(&gs_handle, threshold);
574 if (res != 0)
575 {
576 l3gd20h_interface_debug_print("l3gd20h: set y interrupt threshold failed.\n");
577 (void)l3gd20h_deinit(&gs_handle);
578
579 return 1;
580 }
581
582 /* set z interrupt threshold */
583 res = l3gd20h_set_z_interrupt_threshold(&gs_handle, threshold);
584 if (res != 0)
585 {
586 l3gd20h_interface_debug_print("l3gd20h: set z interrupt threshold failed.\n");
587 (void)l3gd20h_deinit(&gs_handle);
588
589 return 1;
590 }
591
592 /* reset counter mode */
594 if (res != 0)
595 {
596 l3gd20h_interface_debug_print("l3gd20h: set counter mode failed.\n");
597 (void)l3gd20h_deinit(&gs_handle);
598
599 return 1;
600 }
601
602 /* enable wait */
603 res = l3gd20h_set_wait(&gs_handle, L3GD20H_BOOL_TRUE);
604 if (res != 0)
605 {
606 l3gd20h_interface_debug_print("l3gd20h: set wait failed.\n");
607 (void)l3gd20h_deinit(&gs_handle);
608
609 return 1;
610 }
611
612 /* set duration 0x01 */
613 res = l3gd20h_set_duration(&gs_handle, 0x01);
614 if (res != 0)
615 {
616 l3gd20h_interface_debug_print("l3gd20h: set duration failed.\n");
617 (void)l3gd20h_deinit(&gs_handle);
618
619 return 1;
620 }
621
622 /* set data ready active level low */
624 if (res != 0)
625 {
626 l3gd20h_interface_debug_print("l3gd20h: set data ready active level failed.\n");
627 (void)l3gd20h_deinit(&gs_handle);
628
629 return 1;
630 }
631
632 /* disable fifo */
633 res = l3gd20h_set_fifo(&gs_handle, L3GD20H_BOOL_FALSE);
634 if (res != 0)
635 {
636 l3gd20h_interface_debug_print("l3gd20h: set fifo failed.\n");
637 (void)l3gd20h_deinit(&gs_handle);
638
639 return 1;
640 }
641
642 /* enable stop on fifo threshold */
644 if (res != 0)
645 {
646 l3gd20h_interface_debug_print("l3gd20h: set stop on fifo threshold failed.\n");
647 (void)l3gd20h_deinit(&gs_handle);
648
649 return 1;
650 }
651
652 /* fifo threshold 16 */
653 res = l3gd20h_set_fifo_threshold(&gs_handle, 16);
654 if (res != 0)
655 {
656 l3gd20h_interface_debug_print("l3gd20h: set fifo threshold failed.\n");
657 (void)l3gd20h_deinit(&gs_handle);
658
659 return 1;
660 }
661
662 /* little endian */
664 if (res != 0)
665 {
666 l3gd20h_interface_debug_print("l3gd20h: set data format failed.\n");
667 (void)l3gd20h_deinit(&gs_handle);
668
669 return 1;
670 }
671
672 /* ±245 dps */
674 if (res != 0)
675 {
676 l3gd20h_interface_debug_print("l3gd20h: set full scale failed.\n");
677 (void)l3gd20h_deinit(&gs_handle);
678
679 return 1;
680 }
681
682 /* normal mode */
683 res = l3gd20h_set_mode(&gs_handle, L3GD20H_MODE_NORMAL);
684 if (res != 0)
685 {
686 l3gd20h_interface_debug_print("l3gd20h: set mode failed.\n");
687 (void)l3gd20h_deinit(&gs_handle);
688
689 return 1;
690 }
691
692 l3gd20h_interface_debug_print("l3gd20h: threshold is %0.2f.\n", interrupt_threshold);
693 g_flag = 0;
694 for (i = 0; i < times; i++)
695 {
696 int16_t raw[1][3];
697 float dps[1][3];
698 uint16_t len;
699
700 if (g_flag != 0)
701 {
702 l3gd20h_interface_debug_print("l3gd20h: detect the high threshold event.\n");
703
704 break;
705 }
706 len = 1;
707 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
708 if (res != 0)
709 {
710 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
711 (void)l3gd20h_deinit(&gs_handle);
712
713 return 1;
714 }
715 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
716 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
717 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
719 }
720
721 /* finish interrupt test */
722 l3gd20h_interface_debug_print("l3gd20h: finish interrupt test.\n");
723 (void)l3gd20h_deinit(&gs_handle);
724
725 return 0;
726}
driver l3gd20h interrupt test header file
uint8_t l3gd20h_set_high_pass_filter(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable high pass filter
uint8_t l3gd20h_set_data_format(l3gd20h_handle_t *handle, l3gd20h_data_format_t data_format)
set the data format
struct l3gd20h_info_s l3gd20h_info_t
l3gd20h information structure definition
uint8_t l3gd20h_set_block_data_update(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the block data update
uint8_t l3gd20h_set_mode(l3gd20h_handle_t *handle, l3gd20h_mode_t mode)
set the chip mode
uint8_t l3gd20h_info(l3gd20h_info_t *info)
get chip's information
uint8_t l3gd20h_set_high_pass_filter_mode(l3gd20h_handle_t *handle, l3gd20h_high_pass_filter_mode_t mode)
set the high pass filter mode
uint8_t l3gd20h_set_rate_bandwidth(l3gd20h_handle_t *handle, l3gd20h_lodr_odr_bw_t rate_bandwidth)
set the rate bandwidth
uint8_t l3gd20h_set_level_sensitive_latched(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the level sensitive latched
uint8_t l3gd20h_read(l3gd20h_handle_t *handle, int16_t(*raw)[3], float(*dps)[3], uint16_t *len)
read the data
uint8_t l3gd20h_set_out_selection(l3gd20h_handle_t *handle, l3gd20h_selection_t selection)
set the out selection
uint8_t l3gd20h_set_boot(l3gd20h_handle_t *handle, l3gd20h_boot_t boot)
set the boot
uint8_t l3gd20h_set_addr_pin(l3gd20h_handle_t *handle, l3gd20h_address_t addr_pin)
set the iic address pin
l3gd20h_address_t
l3gd20h address enumeration definition
uint8_t l3gd20h_set_interface(l3gd20h_handle_t *handle, l3gd20h_interface_t interface)
set the chip interface
uint8_t l3gd20h_set_high_pass_filter_reference(l3gd20h_handle_t *handle, uint8_t value)
set the high pass filter reference
uint8_t l3gd20h_deinit(l3gd20h_handle_t *handle)
close the chip
uint8_t l3gd20h_set_edge_trigger(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the edge trigger
l3gd20h_interface_t
l3gd20h interface enumeration definition
uint8_t l3gd20h_set_full_scale(l3gd20h_handle_t *handle, l3gd20h_full_scale_t full_scale)
set the full scale
uint8_t l3gd20h_irq_handler(l3gd20h_handle_t *handle, uint8_t num)
interrupt handler
uint8_t l3gd20h_init(l3gd20h_handle_t *handle)
initialize the chip
uint8_t l3gd20h_set_level_trigger(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the level trigger
uint8_t l3gd20h_set_self_test(l3gd20h_handle_t *handle, l3gd20h_self_test_t self_test)
set the self test
uint8_t l3gd20h_set_high_pass_filter_cut_off_frequency(l3gd20h_handle_t *handle, l3gd20h_high_pass_filter_cut_off_frequency_t frequency)
set the high pass filter cut off frequency
uint8_t l3gd20h_set_axis(l3gd20h_handle_t *handle, l3gd20h_axis_t axis, l3gd20h_bool_t enable)
set the axis
struct l3gd20h_handle_s l3gd20h_handle_t
l3gd20h handle structure definition
@ L3GD20H_BOOT_NORMAL
@ L3GD20H_SELF_TEST_NORMAL
@ L3GD20H_FULL_SCALE_245_DPS
@ L3GD20H_HIGH_PASS_FILTER_MODE_NORMAL
@ L3GD20H_DATA_FORMAT_LITTLE_ENDIAN
@ L3GD20H_HIGH_PASS_FILTER_CUT_OFF_FREQUENCY_0
@ L3GD20H_AXIS_X
@ L3GD20H_AXIS_Z
@ L3GD20H_AXIS_Y
@ L3GD20H_SELECTION_LPF1_HPF_LPF2
@ L3GD20H_MODE_NORMAL
@ L3GD20H_BOOL_FALSE
@ L3GD20H_BOOL_TRUE
@ L3GD20H_LOW_ODR_0_ODR_100HZ_BW_0_12P5HZ
uint8_t l3gd20h_set_stop_on_fifo_threshold(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable stop on fifo threshold
uint8_t l3gd20h_set_fifo_mode(l3gd20h_handle_t *handle, l3gd20h_fifo_mode_t fifo_mode)
set the fifo mode
uint8_t l3gd20h_set_fifo(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo
uint8_t l3gd20h_set_fifo_threshold(l3gd20h_handle_t *handle, uint8_t threshold)
set the fifo threshold
@ L3GD20H_FIFO_MODE_BYPASS
void l3gd20h_interface_debug_print(const char *const fmt,...)
interface print format data
uint8_t l3gd20h_interface_iic_deinit(void)
interface iic bus deinit
uint8_t l3gd20h_interface_spi_read(uint8_t reg, uint8_t *buf, uint16_t len)
interface spi bus read
uint8_t l3gd20h_interface_iic_init(void)
interface iic bus init
uint8_t l3gd20h_interface_iic_read(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
interface iic bus read
uint8_t l3gd20h_interface_spi_init(void)
interface spi bus init
uint8_t l3gd20h_interface_iic_write(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
interface iic bus write
uint8_t l3gd20h_interface_spi_write(uint8_t reg, uint8_t *buf, uint16_t len)
interface spi bus write
uint8_t l3gd20h_interface_spi_deinit(void)
interface spi bus deinit
void l3gd20h_interface_delay_ms(uint32_t ms)
interface delay ms
uint8_t l3gd20h_set_interrupt_pin_type(l3gd20h_handle_t *handle, l3gd20h_pin_type_t pin_type)
set the interrupt pin type
uint8_t l3gd20h_set_data_ready_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the data ready on interrupt2
uint8_t l3gd20h_set_boot_on_interrupt1(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable boot on the interrupt1
uint8_t l3gd20h_set_x_interrupt_threshold(l3gd20h_handle_t *handle, uint16_t threshold)
set the x interrupt threshold
uint8_t l3gd20h_set_wait(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the wait
uint8_t l3gd20h_set_interrupt_event(l3gd20h_handle_t *handle, l3gd20h_interrupt_event_t interrupt_event, l3gd20h_bool_t enable)
set the interrupt event
uint8_t l3gd20h_set_duration(l3gd20h_handle_t *handle, uint8_t duration)
set the wait duration
uint8_t l3gd20h_set_fifo_threshold_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo threshold on interrupt2
uint8_t l3gd20h_set_data_ready_active_level(l3gd20h_handle_t *handle, l3gd20h_interrupt_active_level_t level)
set the data ready active level
uint8_t l3gd20h_set_counter_mode(l3gd20h_handle_t *handle, l3gd20h_counter_mode_t counter_mode)
set the counter mode
uint8_t l3gd20h_set_interrupt_active_level(l3gd20h_handle_t *handle, l3gd20h_interrupt_active_level_t level)
set the interrupt active level
uint8_t l3gd20h_set_fifo_overrun_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo overrun on interrupt2
uint8_t l3gd20h_interrupt_threshold_convert_to_register(l3gd20h_handle_t *handle, float dps, uint16_t *reg)
convert the interrupt threshold real data to the register raw data
uint8_t l3gd20h_set_interrupt_selection(l3gd20h_handle_t *handle, l3gd20h_selection_t selection)
set the interrupt selection
uint8_t l3gd20h_set_fifo_empty_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo empty on interrupt2
uint8_t l3gd20h_set_z_interrupt_threshold(l3gd20h_handle_t *handle, uint16_t threshold)
set the z interrupt threshold
uint8_t l3gd20h_set_interrupt1(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the interrupt1
uint8_t l3gd20h_set_y_interrupt_threshold(l3gd20h_handle_t *handle, uint16_t threshold)
set the y interrupt threshold
@ L3GD20H_INTERRUPT_EVENT_Z_LOW_EVENT
@ L3GD20H_INTERRUPT_EVENT_Y_HIGH_EVENT
@ L3GD20H_INTERRUPT_EVENT_Y_LOW_EVENT
@ L3GD20H_INTERRUPT_EVENT_AND_OR_COMBINATION
@ L3GD20H_INTERRUPT_EVENT_LATCH
@ L3GD20H_INTERRUPT_EVENT_X_LOW_EVENT
@ L3GD20H_INTERRUPT_EVENT_Z_HIGH_EVENT
@ L3GD20H_INTERRUPT_EVENT_X_HIGH_EVENT
@ L3GD20H_INTERRUPT1_Y_HIGH
@ L3GD20H_INTERRUPT1_X_HIGH
@ L3GD20H_INTERRUPT1_Z_HIGH
@ L3GD20H_COUNTER_MODE_RESET
@ L3GD20H_INTERRUPT_ACTIVE_LEVEL_LOW
@ L3GD20H_PIN_PUSH_PULL
uint8_t l3gd20h_interrupt_test(l3gd20h_interface_t interface, l3gd20h_address_t addr_pin, float interrupt_threshold, uint32_t times)
interrupt test
uint8_t l3gd20h_interrupt_test_irq_handler(void)
interrupt test irq callback
uint32_t driver_version
char manufacturer_name[32]