LibDriver L3GD20H
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driver_l3gd20h_interrupt_test.c
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1
37
39#include <stdlib.h>
40
41static l3gd20h_handle_t gs_handle;
42static volatile uint8_t g_flag = 0;
43
52{
53 if (l3gd20h_irq_handler(&gs_handle, 1) != 0)
54 {
55 return 1;
56 }
57 else
58 {
59 return 0;
60 }
61}
62
68static void a_l3gd20h_interface_receive_callback(uint8_t type)
69{
70 int16_t raw[1][3];
71 float dps[1][3];
72 uint16_t len;
73 uint8_t res;
74
75 switch (type)
76 {
78 {
79 len = 1;
80 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
81 if (res != 0)
82 {
83 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
84
85 return;
86 }
87 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
88 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
89 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
90 g_flag = 1;
91 l3gd20h_interface_debug_print("l3gd20h: irq z high threshold.\n");
92
93 break;
94 }
96 {
97 len = 1;
98 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
99 if (res != 0)
100 {
101 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
102
103 return;
104 }
105 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
106 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
107 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
108 g_flag = 1;
109 l3gd20h_interface_debug_print("l3gd20h: irq y high threshold.\n");
110
111 break;
112 }
114 {
115 len = 1;
116 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
117 if (res != 0)
118 {
119 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
120
121 return;
122 }
123 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
124 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
125 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
126 g_flag = 1;
127 l3gd20h_interface_debug_print("l3gd20h: irq x high threshold.\n");
128
129 break;
130 }
131 default :
132 {
133 break;
134 }
135 }
136}
137
150 float interrupt_threshold, uint32_t times)
151{
152 uint8_t res;
153 uint16_t threshold;
154 uint32_t i;
155 l3gd20h_info_t info;
156
157 /* link interface function */
169 DRIVER_L3GD20H_LINK_RECEIVE_CALLBACK(&gs_handle, a_l3gd20h_interface_receive_callback);
170
171 /* get information */
172 res = l3gd20h_info(&info);
173 if (res != 0)
174 {
175 l3gd20h_interface_debug_print("l3gd20h: get info failed.\n");
176
177 return 1;
178 }
179 else
180 {
181 /* print chip info */
182 l3gd20h_interface_debug_print("l3gd20h: chip is %s.\n", info.chip_name);
183 l3gd20h_interface_debug_print("l3gd20h: manufacturer is %s.\n", info.manufacturer_name);
184 l3gd20h_interface_debug_print("l3gd20h: interface is %s.\n", info.interface);
185 l3gd20h_interface_debug_print("l3gd20h: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
186 l3gd20h_interface_debug_print("l3gd20h: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
187 l3gd20h_interface_debug_print("l3gd20h: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
188 l3gd20h_interface_debug_print("l3gd20h: max current is %0.2fmA.\n", info.max_current_ma);
189 l3gd20h_interface_debug_print("l3gd20h: max temperature is %0.1fC.\n", info.temperature_max);
190 l3gd20h_interface_debug_print("l3gd20h: min temperature is %0.1fC.\n", info.temperature_min);
191 }
192
193 /* start interrupt test */
194 l3gd20h_interface_debug_print("l3gd20h: start interrupt test.\n");
195
196 /* set the interface */
197 res = l3gd20h_set_interface(&gs_handle, interface);
198 if (res != 0)
199 {
200 l3gd20h_interface_debug_print("l3gd20h: set interface failed.\n");
201
202 return 1;
203 }
204
205 /* set the address pin */
206 res = l3gd20h_set_addr_pin(&gs_handle, addr_pin);
207 if (res != 0)
208 {
209 l3gd20h_interface_debug_print("l3gd20h: set addr pin failed.\n");
210
211 return 1;
212 }
213
214 /* init the l3gd20h */
215 res = l3gd20h_init(&gs_handle);
216 if (res != 0)
217 {
218 l3gd20h_interface_debug_print("l3gd20h: init failed.\n");
219
220 return 1;
221 }
222
223 /* set normal boot */
224 res = l3gd20h_set_boot(&gs_handle, L3GD20H_BOOT_NORMAL);
225 if (res != 0)
226 {
227 l3gd20h_interface_debug_print("l3gd20h: set boot failed.\n");
228 (void)l3gd20h_deinit(&gs_handle);
229
230 return 1;
231 }
232
233 /* enable x axis*/
235 if (res != 0)
236 {
237 l3gd20h_interface_debug_print("l3gd20h: set axis failed.\n");
238 (void)l3gd20h_deinit(&gs_handle);
239
240 return 1;
241 }
242
243 /* enable y axis*/
245 if (res != 0)
246 {
247 l3gd20h_interface_debug_print("l3gd20h: set axis failed.\n");
248 (void)l3gd20h_deinit(&gs_handle);
249
250 return 1;
251 }
252
253 /* enable z axis*/
255 if (res != 0)
256 {
257 l3gd20h_interface_debug_print("l3gd20h: set axis failed.\n");
258 (void)l3gd20h_deinit(&gs_handle);
259
260 return 1;
261 }
262
263 /* set 100 Hz rate bandwidth 12.5 Hz */
265 if (res != 0)
266 {
267 l3gd20h_interface_debug_print("l3gd20h: set rate bandwidth failed.\n");
268 (void)l3gd20h_deinit(&gs_handle);
269
270 return 1;
271 }
272
273 /* disable edge trigger */
275 if (res != 0)
276 {
277 l3gd20h_interface_debug_print("l3gd20h: set edge trigger failed.\n");
278 (void)l3gd20h_deinit(&gs_handle);
279
280 return 1;
281 }
282
283 /* disable level trigger */
285 if (res != 0)
286 {
287 l3gd20h_interface_debug_print("l3gd20h: set level trigger failed.\n");
288 (void)l3gd20h_deinit(&gs_handle);
289
290 return 1;
291 }
292
293 /* enable latched */
295 if (res != 0)
296 {
297 l3gd20h_interface_debug_print("l3gd20h: set level sensitive latched failed.\n");
298 (void)l3gd20h_deinit(&gs_handle);
299
300 return 1;
301 }
302
303 /* normal mode */
305 if (res != 0)
306 {
307 l3gd20h_interface_debug_print("l3gd20h: set self test failed.\n");
308 (void)l3gd20h_deinit(&gs_handle);
309
310 return 1;
311 }
312
313 /* set high pass filter normal mode */
315 if (res != 0)
316 {
317 l3gd20h_interface_debug_print("l3gd20h: set high pass filter normal mode failed.\n");
318 (void)l3gd20h_deinit(&gs_handle);
319
320 return 1;
321 }
322
323 /* set high pass filter cut-off frequency 0 */
325 if (res != 0)
326 {
327 l3gd20h_interface_debug_print("l3gd20h: set high pass filter cut off frequency failed.\n");
328 (void)l3gd20h_deinit(&gs_handle);
329
330 return 1;
331 }
332
333 /* enable high pass filter */
335 if (res != 0)
336 {
337 l3gd20h_interface_debug_print("l3gd20h: set high pass filter failed.\n");
338 (void)l3gd20h_deinit(&gs_handle);
339
340 return 1;
341 }
342
343 /* disable block data update */
345 if (res != 0)
346 {
347 l3gd20h_interface_debug_print("l3gd20h: set block data update failed.\n");
348 (void)l3gd20h_deinit(&gs_handle);
349
350 return 1;
351 }
352
353 /* set LPF1-HPF-LPF2 */
355 if (res != 0)
356 {
357 l3gd20h_interface_debug_print("l3gd20h: set out selection failed.\n");
358 (void)l3gd20h_deinit(&gs_handle);
359
360 return 1;
361 }
362
363 /* set LPF1-HPF-LPF2 */
365 if (res != 0)
366 {
367 l3gd20h_interface_debug_print("l3gd20h: set interrupt selection failed.\n");
368 (void)l3gd20h_deinit(&gs_handle);
369
370 return 1;
371 }
372
373 /* set high pass filter reference 0x00 */
374 res = l3gd20h_set_high_pass_filter_reference(&gs_handle, 0x00);
375 if (res != 0)
376 {
377 l3gd20h_interface_debug_print("l3gd20h: set high pass filter reference failed.\n");
378 (void)l3gd20h_deinit(&gs_handle);
379
380 return 1;
381 }
382
383 /* bypass mode */
385 if (res != 0)
386 {
387 l3gd20h_interface_debug_print("l3gd20h: set fifo mode failed.\n");
388 (void)l3gd20h_deinit(&gs_handle);
389
390 return 1;
391 }
392
393 /* enable interrupt 1*/
394 res = l3gd20h_set_interrupt1(&gs_handle, L3GD20H_BOOL_TRUE);
395 if (res != 0)
396 {
397 l3gd20h_interface_debug_print("l3gd20h: set interrupt1 failed.\n");
398 (void)l3gd20h_deinit(&gs_handle);
399
400 return 1;
401 }
402
403 /* disable boot on interrupt 1*/
405 if (res != 0)
406 {
407 l3gd20h_interface_debug_print("l3gd20h: set boot on interrupt1 failed.\n");
408 (void)l3gd20h_deinit(&gs_handle);
409
410 return 1;
411 }
412
413 /* active level low */
415 if (res != 0)
416 {
417 l3gd20h_interface_debug_print("l3gd20h: set interrupt active level failed.\n");
418 (void)l3gd20h_deinit(&gs_handle);
419
420 return 1;
421 }
422
423 /* push-pull pin type */
425 if (res != 0)
426 {
427 l3gd20h_interface_debug_print("l3gd20h: set interrupt pin type failed.\n");
428 (void)l3gd20h_deinit(&gs_handle);
429
430 return 1;
431 }
432
433 /* disable data ready on interrupt2 */
435 if (res != 0)
436 {
437 l3gd20h_interface_debug_print("l3gd20h: set data ready on interrupt2 failed.\n");
438 (void)l3gd20h_deinit(&gs_handle);
439
440 return 1;
441 }
442
443 /* fifo threshold on interrupt2 */
445 if (res != 0)
446 {
447 l3gd20h_interface_debug_print("l3gd20h: set fifo threshold on interrupt2 failed.\n");
448 (void)l3gd20h_deinit(&gs_handle);
449
450 return 1;
451 }
452
453 /* fifo overrun on interrupt2 */
455 if (res != 0)
456 {
457 l3gd20h_interface_debug_print("l3gd20h: set fifo overrun on interrupt2 failed.\n");
458 (void)l3gd20h_deinit(&gs_handle);
459
460 return 1;
461 }
462
463 /* fifo empty on interrupt2 */
465 if (res != 0)
466 {
467 l3gd20h_interface_debug_print("l3gd20h: set fifo empty on interrupt2 failed.\n");
468 (void)l3gd20h_deinit(&gs_handle);
469
470 return 1;
471 }
472
473 /* disable L3GD20H_INTERRUPT_EVENT_AND_OR_COMBINATION */
475 if (res != 0)
476 {
477 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
478 (void)l3gd20h_deinit(&gs_handle);
479
480 return 1;
481 }
482
483 /* disable L3GD20H_INTERRUPT_EVENT_LATCH */
485 if (res != 0)
486 {
487 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
488 (void)l3gd20h_deinit(&gs_handle);
489
490 return 1;
491 }
492
493 /* enable L3GD20H_INTERRUPT_EVENT_Z_HIGH_EVENT */
495 if (res != 0)
496 {
497 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
498 (void)l3gd20h_deinit(&gs_handle);
499
500 return 1;
501 }
502
503 /* disable L3GD20H_INTERRUPT_EVENT_Z_LOW_EVENT */
505 if (res != 0)
506 {
507 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
508 (void)l3gd20h_deinit(&gs_handle);
509
510 return 1;
511 }
512
513 /* enable L3GD20H_INTERRUPT_EVENT_Y_HIGH_EVENT */
515 if (res != 0)
516 {
517 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
518 (void)l3gd20h_deinit(&gs_handle);
519
520 return 1;
521 }
522
523 /* disable L3GD20H_INTERRUPT_EVENT_Y_LOW_EVENT */
525 if (res != 0)
526 {
527 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
528 (void)l3gd20h_deinit(&gs_handle);
529
530 return 1;
531 }
532
533 /* enable L3GD20H_INTERRUPT_EVENT_X_HIGH_EVENT */
535 if (res != 0)
536 {
537 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
538 (void)l3gd20h_deinit(&gs_handle);
539
540 return 1;
541 }
542
543 /* disable L3GD20H_INTERRUPT_EVENT_X_LOW_EVENT */
545 if (res != 0)
546 {
547 l3gd20h_interface_debug_print("l3gd20h: set interrupt event failed.\n");
548 (void)l3gd20h_deinit(&gs_handle);
549
550 return 1;
551 }
552
553 /* convert the threshold */
554 res = l3gd20h_interrupt_threshold_convert_to_register(&gs_handle, interrupt_threshold, (uint16_t *)&threshold);
555 if (res != 0)
556 {
557 l3gd20h_interface_debug_print("l3gd20h: convert to register failed.\n");
558 (void)l3gd20h_deinit(&gs_handle);
559
560 return 1;
561 }
562
563 /* set x interrupt threshold */
564 res = l3gd20h_set_x_interrupt_threshold(&gs_handle, threshold);
565 if (res != 0)
566 {
567 l3gd20h_interface_debug_print("l3gd20h: set x interrupt threshold failed.\n");
568 (void)l3gd20h_deinit(&gs_handle);
569
570 return 1;
571 }
572
573 /* set y interrupt threshold */
574 res = l3gd20h_set_y_interrupt_threshold(&gs_handle, threshold);
575 if (res != 0)
576 {
577 l3gd20h_interface_debug_print("l3gd20h: set y interrupt threshold failed.\n");
578 (void)l3gd20h_deinit(&gs_handle);
579
580 return 1;
581 }
582
583 /* set z interrupt threshold */
584 res = l3gd20h_set_z_interrupt_threshold(&gs_handle, threshold);
585 if (res != 0)
586 {
587 l3gd20h_interface_debug_print("l3gd20h: set z interrupt threshold failed.\n");
588 (void)l3gd20h_deinit(&gs_handle);
589
590 return 1;
591 }
592
593 /* reset counter mode */
595 if (res != 0)
596 {
597 l3gd20h_interface_debug_print("l3gd20h: set counter mode failed.\n");
598 (void)l3gd20h_deinit(&gs_handle);
599
600 return 1;
601 }
602
603 /* enable wait */
604 res = l3gd20h_set_wait(&gs_handle, L3GD20H_BOOL_TRUE);
605 if (res != 0)
606 {
607 l3gd20h_interface_debug_print("l3gd20h: set wait failed.\n");
608 (void)l3gd20h_deinit(&gs_handle);
609
610 return 1;
611 }
612
613 /* set duration 0x01 */
614 res = l3gd20h_set_duration(&gs_handle, 0x01);
615 if (res != 0)
616 {
617 l3gd20h_interface_debug_print("l3gd20h: set duration failed.\n");
618 (void)l3gd20h_deinit(&gs_handle);
619
620 return 1;
621 }
622
623 /* set data ready active level low */
625 if (res != 0)
626 {
627 l3gd20h_interface_debug_print("l3gd20h: set data ready active level failed.\n");
628 (void)l3gd20h_deinit(&gs_handle);
629
630 return 1;
631 }
632
633 /* disable fifo */
634 res = l3gd20h_set_fifo(&gs_handle, L3GD20H_BOOL_FALSE);
635 if (res != 0)
636 {
637 l3gd20h_interface_debug_print("l3gd20h: set fifo failed.\n");
638 (void)l3gd20h_deinit(&gs_handle);
639
640 return 1;
641 }
642
643 /* enable stop on fifo threshold */
645 if (res != 0)
646 {
647 l3gd20h_interface_debug_print("l3gd20h: set stop on fifo threshold failed.\n");
648 (void)l3gd20h_deinit(&gs_handle);
649
650 return 1;
651 }
652
653 /* fifo threshold 16 */
654 res = l3gd20h_set_fifo_threshold(&gs_handle, 16);
655 if (res != 0)
656 {
657 l3gd20h_interface_debug_print("l3gd20h: set fifo threshold failed.\n");
658 (void)l3gd20h_deinit(&gs_handle);
659
660 return 1;
661 }
662
663 /* little endian */
665 if (res != 0)
666 {
667 l3gd20h_interface_debug_print("l3gd20h: set data format failed.\n");
668 (void)l3gd20h_deinit(&gs_handle);
669
670 return 1;
671 }
672
673 /* ±245 dps */
675 if (res != 0)
676 {
677 l3gd20h_interface_debug_print("l3gd20h: set full scale failed.\n");
678 (void)l3gd20h_deinit(&gs_handle);
679
680 return 1;
681 }
682
683 /* normal mode */
684 res = l3gd20h_set_mode(&gs_handle, L3GD20H_MODE_NORMAL);
685 if (res != 0)
686 {
687 l3gd20h_interface_debug_print("l3gd20h: set mode failed.\n");
688 (void)l3gd20h_deinit(&gs_handle);
689
690 return 1;
691 }
692
693 l3gd20h_interface_debug_print("l3gd20h: threshold is %0.2f.\n", interrupt_threshold);
694 g_flag = 0;
695 for (i = 0; i < times; i++)
696 {
697 int16_t raw[1][3];
698 float dps[1][3];
699 uint16_t len;
700
701 if (g_flag != 0)
702 {
703 l3gd20h_interface_debug_print("l3gd20h: detect the high threshold event.\n");
704
705 break;
706 }
707 len = 1;
708 res = l3gd20h_read(&gs_handle, (int16_t (*)[3])(raw), (float (*)[3])(dps), (uint16_t *)&len);
709 if (res != 0)
710 {
711 l3gd20h_interface_debug_print("l3gd20h: read failed.\n");
712 (void)l3gd20h_deinit(&gs_handle);
713
714 return 1;
715 }
716 l3gd20h_interface_debug_print("l3gd20h: x %0.2f dps.\n", dps[0][0]);
717 l3gd20h_interface_debug_print("l3gd20h: y %0.2f dps.\n", dps[0][1]);
718 l3gd20h_interface_debug_print("l3gd20h: z %0.2f dps.\n", dps[0][2]);
720 }
721
722 /* finish interrupt test */
723 l3gd20h_interface_debug_print("l3gd20h: finish interrupt test.\n");
724 (void)l3gd20h_deinit(&gs_handle);
725
726 return 0;
727}
driver l3gd20h interrupt test header file
uint8_t l3gd20h_set_high_pass_filter(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable high pass filter
uint8_t l3gd20h_set_data_format(l3gd20h_handle_t *handle, l3gd20h_data_format_t data_format)
set the data format
struct l3gd20h_info_s l3gd20h_info_t
l3gd20h information structure definition
uint8_t l3gd20h_set_block_data_update(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the block data update
uint8_t l3gd20h_set_mode(l3gd20h_handle_t *handle, l3gd20h_mode_t mode)
set the chip mode
uint8_t l3gd20h_info(l3gd20h_info_t *info)
get chip's information
uint8_t l3gd20h_set_high_pass_filter_mode(l3gd20h_handle_t *handle, l3gd20h_high_pass_filter_mode_t mode)
set the high pass filter mode
uint8_t l3gd20h_set_rate_bandwidth(l3gd20h_handle_t *handle, l3gd20h_lodr_odr_bw_t rate_bandwidth)
set the rate bandwidth
uint8_t l3gd20h_set_level_sensitive_latched(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the level sensitive latched
uint8_t l3gd20h_read(l3gd20h_handle_t *handle, int16_t(*raw)[3], float(*dps)[3], uint16_t *len)
read the data
uint8_t l3gd20h_set_out_selection(l3gd20h_handle_t *handle, l3gd20h_selection_t selection)
set the out selection
uint8_t l3gd20h_set_boot(l3gd20h_handle_t *handle, l3gd20h_boot_t boot)
set the boot
uint8_t l3gd20h_set_addr_pin(l3gd20h_handle_t *handle, l3gd20h_address_t addr_pin)
set the iic address pin
l3gd20h_address_t
l3gd20h address enumeration definition
uint8_t l3gd20h_set_interface(l3gd20h_handle_t *handle, l3gd20h_interface_t interface)
set the chip interface
uint8_t l3gd20h_set_high_pass_filter_reference(l3gd20h_handle_t *handle, uint8_t value)
set the high pass filter reference
uint8_t l3gd20h_deinit(l3gd20h_handle_t *handle)
close the chip
uint8_t l3gd20h_set_edge_trigger(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the edge trigger
l3gd20h_interface_t
l3gd20h interface enumeration definition
uint8_t l3gd20h_set_full_scale(l3gd20h_handle_t *handle, l3gd20h_full_scale_t full_scale)
set the full scale
uint8_t l3gd20h_irq_handler(l3gd20h_handle_t *handle, uint8_t num)
interrupt handler
uint8_t l3gd20h_init(l3gd20h_handle_t *handle)
initialize the chip
uint8_t l3gd20h_set_level_trigger(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the level trigger
uint8_t l3gd20h_set_self_test(l3gd20h_handle_t *handle, l3gd20h_self_test_t self_test)
set the self test
uint8_t l3gd20h_set_high_pass_filter_cut_off_frequency(l3gd20h_handle_t *handle, l3gd20h_high_pass_filter_cut_off_frequency_t frequency)
set the high pass filter cut off frequency
uint8_t l3gd20h_set_axis(l3gd20h_handle_t *handle, l3gd20h_axis_t axis, l3gd20h_bool_t enable)
set the axis
struct l3gd20h_handle_s l3gd20h_handle_t
l3gd20h handle structure definition
@ L3GD20H_BOOT_NORMAL
@ L3GD20H_SELF_TEST_NORMAL
@ L3GD20H_FULL_SCALE_245_DPS
@ L3GD20H_HIGH_PASS_FILTER_MODE_NORMAL
@ L3GD20H_DATA_FORMAT_LITTLE_ENDIAN
@ L3GD20H_HIGH_PASS_FILTER_CUT_OFF_FREQUENCY_0
@ L3GD20H_AXIS_X
@ L3GD20H_AXIS_Z
@ L3GD20H_AXIS_Y
@ L3GD20H_SELECTION_LPF1_HPF_LPF2
@ L3GD20H_MODE_NORMAL
@ L3GD20H_BOOL_FALSE
@ L3GD20H_BOOL_TRUE
@ L3GD20H_LOW_ODR_0_ODR_100HZ_BW_0_12P5HZ
uint8_t l3gd20h_set_stop_on_fifo_threshold(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable stop on fifo threshold
uint8_t l3gd20h_set_fifo_mode(l3gd20h_handle_t *handle, l3gd20h_fifo_mode_t fifo_mode)
set the fifo mode
uint8_t l3gd20h_set_fifo(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo
uint8_t l3gd20h_set_fifo_threshold(l3gd20h_handle_t *handle, uint8_t threshold)
set the fifo threshold
@ L3GD20H_FIFO_MODE_BYPASS
void l3gd20h_interface_debug_print(const char *const fmt,...)
interface print format data
uint8_t l3gd20h_interface_iic_deinit(void)
interface iic bus deinit
uint8_t l3gd20h_interface_spi_read(uint8_t reg, uint8_t *buf, uint16_t len)
interface spi bus read
uint8_t l3gd20h_interface_iic_init(void)
interface iic bus init
uint8_t l3gd20h_interface_iic_read(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
interface iic bus read
uint8_t l3gd20h_interface_spi_init(void)
interface spi bus init
uint8_t l3gd20h_interface_iic_write(uint8_t addr, uint8_t reg, uint8_t *buf, uint16_t len)
interface iic bus write
uint8_t l3gd20h_interface_spi_write(uint8_t reg, uint8_t *buf, uint16_t len)
interface spi bus write
uint8_t l3gd20h_interface_spi_deinit(void)
interface spi bus deinit
void l3gd20h_interface_delay_ms(uint32_t ms)
interface delay ms
uint8_t l3gd20h_set_interrupt_pin_type(l3gd20h_handle_t *handle, l3gd20h_pin_type_t pin_type)
set the interrupt pin type
uint8_t l3gd20h_set_data_ready_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the data ready on interrupt2
uint8_t l3gd20h_set_boot_on_interrupt1(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable boot on the interrupt1
uint8_t l3gd20h_set_x_interrupt_threshold(l3gd20h_handle_t *handle, uint16_t threshold)
set the x interrupt threshold
uint8_t l3gd20h_set_wait(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the wait
uint8_t l3gd20h_set_interrupt_event(l3gd20h_handle_t *handle, l3gd20h_interrupt_event_t interrupt_event, l3gd20h_bool_t enable)
set the interrupt event
uint8_t l3gd20h_set_duration(l3gd20h_handle_t *handle, uint8_t duration)
set the wait duration
uint8_t l3gd20h_set_fifo_threshold_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo threshold on interrupt2
uint8_t l3gd20h_set_data_ready_active_level(l3gd20h_handle_t *handle, l3gd20h_interrupt_active_level_t level)
set the data ready active level
uint8_t l3gd20h_set_counter_mode(l3gd20h_handle_t *handle, l3gd20h_counter_mode_t counter_mode)
set the counter mode
uint8_t l3gd20h_set_interrupt_active_level(l3gd20h_handle_t *handle, l3gd20h_interrupt_active_level_t level)
set the interrupt active level
uint8_t l3gd20h_set_fifo_overrun_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo overrun on interrupt2
uint8_t l3gd20h_interrupt_threshold_convert_to_register(l3gd20h_handle_t *handle, float dps, uint16_t *reg)
convert the interrupt threshold real data to the register raw data
uint8_t l3gd20h_set_interrupt_selection(l3gd20h_handle_t *handle, l3gd20h_selection_t selection)
set the interrupt selection
uint8_t l3gd20h_set_fifo_empty_on_interrupt2(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the fifo empty on interrupt2
uint8_t l3gd20h_set_z_interrupt_threshold(l3gd20h_handle_t *handle, uint16_t threshold)
set the z interrupt threshold
uint8_t l3gd20h_set_interrupt1(l3gd20h_handle_t *handle, l3gd20h_bool_t enable)
enable or disable the interrupt1
uint8_t l3gd20h_set_y_interrupt_threshold(l3gd20h_handle_t *handle, uint16_t threshold)
set the y interrupt threshold
@ L3GD20H_INTERRUPT_EVENT_Z_LOW_EVENT
@ L3GD20H_INTERRUPT_EVENT_Y_HIGH_EVENT
@ L3GD20H_INTERRUPT_EVENT_Y_LOW_EVENT
@ L3GD20H_INTERRUPT_EVENT_AND_OR_COMBINATION
@ L3GD20H_INTERRUPT_EVENT_LATCH
@ L3GD20H_INTERRUPT_EVENT_X_LOW_EVENT
@ L3GD20H_INTERRUPT_EVENT_Z_HIGH_EVENT
@ L3GD20H_INTERRUPT_EVENT_X_HIGH_EVENT
@ L3GD20H_INTERRUPT1_Y_HIGH
@ L3GD20H_INTERRUPT1_X_HIGH
@ L3GD20H_INTERRUPT1_Z_HIGH
@ L3GD20H_COUNTER_MODE_RESET
@ L3GD20H_INTERRUPT_ACTIVE_LEVEL_LOW
@ L3GD20H_PIN_PUSH_PULL
uint8_t l3gd20h_interrupt_test(l3gd20h_interface_t interface, l3gd20h_address_t addr_pin, float interrupt_threshold, uint32_t times)
interrupt test
uint8_t l3gd20h_interrupt_test_irq_handler(void)
interrupt test irq callback
uint32_t driver_version
char manufacturer_name[32]