LibDriver LLCC68  1.0.0
LLCC68 full-featured driver
driver_llcc68.c
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1 
37 #include "driver_llcc68.h"
38 #include <math.h>
39 
43 #define CHIP_NAME "Semtech LLCC68"
44 #define MANUFACTURER_NAME "Semtech"
45 #define SUPPLY_VOLTAGE_MIN 1.8f
46 #define SUPPLY_VOLTAGE_MAX 3.7f
47 #define MAX_CURRENT 118.0f
48 #define TEMPERATURE_MIN -40.0f
49 #define TEMPERATURE_MAX 85.0f
50 #define DRIVER_VERSION 1000
55 #define LLCC68_COMMAND_SET_SLEEP 0x84
56 #define LLCC68_COMMAND_SET_STANDBY 0x80
57 #define LLCC68_COMMAND_SET_FS 0xC1
58 #define LLCC68_COMMAND_SET_TX 0x83
59 #define LLCC68_COMMAND_SET_RX 0x82
60 #define LLCC68_COMMAND_STOP_TIMER_ON_PREAMBLE 0x9F
61 #define LLCC68_COMMAND_SET_RX_DUTY_CYCLE 0x94
62 #define LLCC68_COMMAND_SET_CAD 0xC5
63 #define LLCC68_COMMAND_SET_TX_CONTINUOUS_WAVE 0xD1
64 #define LLCC68_COMMAND_SET_TX_INFINITE_PREAMBLE 0xD2
65 #define LLCC68_COMMAND_SET_REGULATOR_MODE 0x96
66 #define LLCC68_COMMAND_SET_CALIBRATE 0x89
67 #define LLCC68_COMMAND_SET_CALIBRATE_IMAGE 0x98
68 #define LLCC68_COMMAND_SET_PA_CONFIG 0x95
69 #define LLCC68_COMMAND_SET_RX_TX_FALLBACK_MODE 0x93
70 #define LLCC68_COMMAND_WRITE_REGISTER 0x0D
71 #define LLCC68_COMMAND_READ_REGISTER 0x1D
72 #define LLCC68_COMMAND_WRITE_BUFFER 0x0E
73 #define LLCC68_COMMAND_READ_BUFFER 0x1E
74 #define LLCC68_COMMAND_SET_DIO_IRQ_PARAMS 0x08
75 #define LLCC68_COMMAND_GET_IRQ_STATUS 0x12
76 #define LLCC68_COMMAND_CLEAR_IRQ_STATUS 0x02
77 #define LLCC68_COMMAND_SET_DIO2_AS_RF_SWITCH_CTRL 0x9D
78 #define LLCC68_COMMAND_SET_DIO3_AS_TCXO_CTRL 0x97
79 #define LLCC68_COMMAND_SET_RF_FREQUENCY 0x86
80 #define LLCC68_COMMAND_SET_PACKET_TYPE 0x8A
81 #define LLCC68_COMMAND_GET_PACKET_TYPE 0x11
82 #define LLCC68_COMMAND_SET_TX_PARAMS 0x8E
83 #define LLCC68_COMMAND_SET_MODULATION_PARAMS 0x8B
84 #define LLCC68_COMMAND_SET_PACKET_PARAMS 0x8C
85 #define LLCC68_COMMAND_SET_CAD_PARAMS 0x88
86 #define LLCC68_COMMAND_SET_BUFFER_BASE_ADDRESS 0x8F
87 #define LLCC68_COMMAND_SET_LORA_SYMB_NUM_TIMEOUT 0xA0
88 #define LLCC68_COMMAND_GET_STATUS 0xC0
89 #define LLCC68_COMMAND_GET_RSSI_LNST 0x15
90 #define LLCC68_COMMAND_GET_RX_BUFFER_STATUS 0x13
91 #define LLCC68_COMMAND_GET_PACKET_STATUS 0x14
92 #define LLCC68_COMMAND_GET_DEVICE_ERRORS 0x17
93 #define LLCC68_COMMAND_CLEAR_DEVICE_ERRORS 0x07
94 #define LLCC68_COMMAND_GET_STATS 0x10
95 #define LLCC68_COMMAND_RESET_STATS 0x00
100 #define LLCC68_REG_DIOX_OUTPUT_ENABLE 0x0580
101 #define LLCC68_REG_DIOX_INPUT_ENABLE 0x0583
102 #define LLCC68_REG_DIOX_PULL_UP_CONTROL 0x0584
103 #define LLCC68_REG_DIOX_PULL_DOWN_CONTROL 0x0585
104 #define LLCC68_REG_WHITENING_INIT_VALUE_MSB 0x06B8
105 #define LLCC68_REG_WHITENING_INIT_VALUE_LSB 0x06B9
106 #define LLCC68_REG_CRC_INIT_VALUE_MSB 0x06BC
107 #define LLCC68_REG_CRC_INIT_VALUE_LSB 0x06BD
108 #define LLCC68_REG_CRC_POLYNOMIAL_VALUE_MSB 0x06BE
109 #define LLCC68_REG_CRC_POLYNOMIAL_VALUE_LSB 0x06BF
110 #define LLCC68_REG_SYNC_WORD_0 0x06C0
111 #define LLCC68_REG_SYNC_WORD_1 0x06C1
112 #define LLCC68_REG_SYNC_WORD_2 0x06C2
113 #define LLCC68_REG_SYNC_WORD_3 0x06C3
114 #define LLCC68_REG_SYNC_WORD_4 0x06C4
115 #define LLCC68_REG_SYNC_WORD_5 0x06C5
116 #define LLCC68_REG_SYNC_WORD_6 0x06C6
117 #define LLCC68_REG_SYNC_WORD_7 0x06C7
118 #define LLCC68_REG_NODE_ADDRESS 0x06CD
119 #define LLCC68_REG_BROADCAST_ADDRESS 0x06CE
120 #define LLCC68_REG_IQ_POLARITY_SETUP 0x0736
121 #define LLCC68_REG_LORA_SYNC_WORD_MSB 0x0740
122 #define LLCC68_REG_LORA_SYNC_WORD_LSB 0x0741
123 #define LLCC68_REG_RANDOM_NUMBER_GEN_0 0x0819
124 #define LLCC68_REG_RANDOM_NUMBER_GEN_1 0x081A
125 #define LLCC68_REG_RANDOM_NUMBER_GEN_2 0x081B
126 #define LLCC68_REG_RANDOM_NUMBER_GEN_3 0x081C
127 #define LLCC68_REG_TX_MODULATION 0x0889
128 #define LLCC68_REG_RX_GAIN 0x08AC
129 #define LLCC68_REG_TX_CLAMP_CONFIG 0x08D8
130 #define LLCC68_REG_OCP_CONFIGURATION 0x08E7
131 #define LLCC68_REG_RTC_CONTROL 0x0902
132 #define LLCC68_REG_XTA_TRIM 0x0911
133 #define LLCC68_REG_XTB_TRIM 0x0912
134 #define LLCC68_REG_DIO3_OUTPUT_CONTROL 0x0920
135 #define LLCC68_REG_EVENT_MASK 0x0944
148 static uint8_t a_llcc68_spi_read(llcc68_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
149 {
150  if (handle->spi_write_read(&reg, 1, buf, len) != 0) /* spi read */
151  {
152  return 1; /* return error */
153  }
154  else
155  {
156  return 0; /* success return 0 */
157  }
158 }
159 
172 static uint8_t a_llcc68_spi_write(llcc68_handle_t *handle, uint8_t reg, uint8_t *buf, uint16_t len)
173 {
174  if (len > (384 - 1)) /* check the length */
175  {
176  handle->debug_print("llcc68: len is over 383.\n"); /* len is over 383 */
177 
178  return 2; /* return error */
179  }
180 
181  memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
182  handle->buf[0] = reg; /* set the reg */
183  memcpy(&handle->buf[1], buf, len); /* copy the buffer */
184  if (handle->spi_write_read(handle->buf, len + 1, NULL, 0) != 0) /* spi write */
185  {
186  return 1; /* return error */
187  }
188  else
189  {
190  return 0; /* success return 0 */
191  }
192 }
193 
206 static uint8_t a_llcc68_spi_read_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
207 {
208  uint8_t reg_buf[3];
209 
210  if (len > (384 - 1)) /* check the length */
211  {
212  handle->debug_print("llcc68: len is over 383.\n"); /* len is over 383 */
213 
214  return 2; /* return error */
215  }
216 
217  memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
218  reg_buf[0] = LLCC68_COMMAND_READ_REGISTER; /* set the command */
219  reg_buf[1] = (reg >> 8) & 0xFF; /* set msb */
220  reg_buf[2] = (reg >> 0) & 0xFF; /* set lsb */
221  if (handle->spi_write_read((uint8_t *)reg_buf, 3, handle->buf, len + 1) != 0) /* spi read */
222  {
223  return 1; /* return error */
224  }
225  else
226  {
227  memcpy(buf, handle->buf + 1, len); /* copy the data */
228 
229  return 0; /* success return 0 */
230  }
231 }
232 
245 static uint8_t a_llcc68_spi_write_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
246 {
247  if (len > (384 - 3)) /* check the length */
248  {
249  handle->debug_print("llcc68: len is over 381.\n"); /* len is over 381 */
250 
251  return 2; /* return error */
252  }
253 
254  memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
255  handle->buf[0] = LLCC68_COMMAND_WRITE_REGISTER; /* set the command */
256  handle->buf[1] = (reg >> 8) & 0xFF; /* set reg msb */
257  handle->buf[2] = (reg >> 0) & 0xFF; /* set reg lsb */
258  memcpy(&handle->buf[3], buf, len); /* copy the buffer */
259  if (handle->spi_write_read(handle->buf, len + 3, NULL, 0) != 0) /* spi write */
260  {
261  return 1; /* return error */
262  }
263  else
264  {
265  return 0; /* success return 0 */
266  }
267 }
268 
281 static uint8_t a_llcc68_spi_write_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
282 {
283  if (len > (384 - 2)) /* check the length */
284  {
285  handle->debug_print("llcc68: len is over 382.\n"); /* len is over 382 */
286 
287  return 2; /* return error */
288  }
289 
290  memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
291  handle->buf[0] = LLCC68_COMMAND_WRITE_BUFFER; /* set the command */
292  handle->buf[1] = offset; /* set reg msb */
293  memcpy(&handle->buf[2], buf, len); /* copy the buffer */
294  if (handle->spi_write_read(handle->buf, len + 2, NULL, 0) != 0) /* spi write */
295  {
296  return 1; /* return error */
297  }
298  else
299  {
300  return 0; /* success return 0 */
301  }
302 }
303 
316 static uint8_t a_llcc68_spi_read_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
317 {
318  uint8_t reg_buf[2];
319 
320  if (len > (384 - 1)) /* check the length */
321  {
322  handle->debug_print("llcc68: len is over 383.\n"); /* len is over 383 */
323 
324  return 2; /* return error */
325  }
326 
327  memset(handle->buf, 0, sizeof(uint8_t) * 384); /* clear the buffer */
328  reg_buf[0] = LLCC68_COMMAND_READ_BUFFER ; /* set the command */
329  reg_buf[1] = offset; /* set msb */
330  if (handle->spi_write_read((uint8_t *)reg_buf, 2, handle->buf, len + 1) != 0) /* spi write */
331  {
332  return 1; /* return error */
333  }
334  else
335  {
336  memcpy(buf, handle->buf + 1, len); /* copy the data */
337 
338  return 0; /* success return 0 */
339  }
340 }
341 
350 static uint8_t a_llcc68_check_busy(llcc68_handle_t *handle)
351 {
352  uint8_t level;
353  uint8_t timeout;
354 
355  timeout = 100; /* set max 100 */
356 
357  while (1) /* loop */
358  {
359  if (handle->busy_gpio_read((uint8_t *)&level) != 0) /* read busy gpio */
360  {
361  return 1; /* return error */
362  }
363  else
364  {
365  if (level == 0) /* check level */
366  {
367  return 0; /* success return 0 */
368  }
369  else if ((level == 1) && (timeout != 0)) /* check level and timeout */
370  {
371  handle->delay_ms(10); /* delay 10 ms */
372  timeout--; /* timeout-- */
373  if (timeout != 0) /* check timeout */
374  {
375  continue; /* continue */
376  }
377  else
378  {
379  return 1; /* return error */
380  }
381  }
382  else
383  {
384  return 1; /* return error */
385  }
386  }
387  }
388 }
389 
400 uint8_t llcc68_irq_handler(llcc68_handle_t *handle)
401 {
402  uint8_t res;
403  uint8_t buf[3];
404  uint16_t status;
405 
406  if (handle == NULL) /* check handle */
407  {
408  return 2; /* return error */
409  }
410  if (handle->inited != 1) /* check handle initialization */
411  {
412  return 3; /* return error */
413  }
414 
415  memset(buf, 0, sizeof(uint8_t) * 3); /* clear the buffer */
416  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_IRQ_STATUS, (uint8_t *)buf, 3); /* read command */
417  if (res != 0) /* check result */
418  {
419  handle->debug_print("llcc68: get irq status failed.\n"); /* get irq status failed */
420 
421  return 1; /* return error */
422  }
423  status = ((uint16_t)buf[1] << 8) | buf[2]; /* set status */
424  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)&buf[1], 2); /* write command */
425  if (res != 0) /* check result */
426  {
427  handle->debug_print("llcc68: clear irq status failed.\n"); /* clear irq status failed */
428 
429  return 1; /* return error */
430  }
431 
432  handle->crc_error = 0; /* clear crc error */
433  if ((status & LLCC68_IRQ_PREAMBLE_DETECTED) != 0) /* if preamble detected */
434  {
435  if (handle->receive_callback != NULL) /* if receive callback */
436  {
437  handle->receive_callback(LLCC68_IRQ_PREAMBLE_DETECTED, NULL, 0); /* run callback */
438  }
439  }
440  if ((status & LLCC68_IRQ_SYNC_WORD_VALID) != 0) /* if valid sync word detected */
441  {
442  if (handle->receive_callback != NULL) /* if receive callback */
443  {
444  handle->receive_callback(LLCC68_IRQ_SYNC_WORD_VALID, NULL, 0); /* run callback */
445  }
446  }
447  if ((status & LLCC68_IRQ_HEADER_VALID) != 0) /* if valid header */
448  {
449  if (handle->receive_callback != NULL) /* if receive callback */
450  {
451  handle->receive_callback(LLCC68_IRQ_HEADER_VALID, NULL, 0); /* run callback */
452  }
453  }
454  if ((status & LLCC68_IRQ_HEADER_ERR) != 0) /* if header error */
455  {
456  if (handle->receive_callback != NULL) /* if receive callback */
457  {
458  handle->receive_callback(LLCC68_IRQ_HEADER_ERR, NULL, 0); /* run callback */
459  }
460  }
461  if ((status & LLCC68_IRQ_CRC_ERR) != 0) /* if crc error */
462  {
463  if (handle->receive_callback != NULL) /* if receive callback */
464  {
465  handle->receive_callback(LLCC68_IRQ_CRC_ERR, NULL, 0); /* run callback */
466  }
467  handle->crc_error = 1; /* set crc error */
468  }
469  if ((status & LLCC68_IRQ_CAD_DONE) != 0) /* if cad done */
470  {
471  if (handle->receive_callback != NULL) /* if receive callback */
472  {
473  handle->receive_callback(LLCC68_IRQ_CAD_DONE, NULL, 0); /* run callback */
474  }
475  handle->cad_done = 1; /* set cad done */
476  }
477  if ((status & LLCC68_IRQ_CAD_DETECTED) != 0) /* if cad detected */
478  {
479  if (handle->receive_callback != NULL) /* if receive callback */
480  {
481  handle->receive_callback(LLCC68_IRQ_CAD_DETECTED, NULL, 0); /* run callback */
482  }
483  handle->cad_detected = 1; /* set detected */
484  }
485  if ((status & LLCC68_IRQ_TIMEOUT) != 0) /* if timeout */
486  {
487  uint8_t control;
488  uint8_t mask;
489 
490  control = 0x00;
491  res = a_llcc68_spi_write_register(handle, LLCC68_REG_DIO3_OUTPUT_CONTROL, (uint8_t *)&control, 1); /* write register */
492  if (res != 0) /* check result */
493  {
494  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
495 
496  return 1; /* return error */
497  }
498 
499  /* read mask */
500  res = a_llcc68_spi_read_register(handle, LLCC68_REG_EVENT_MASK, (uint8_t *)&mask, 1); /* read register */
501  if (res != 0) /* check result */
502  {
503  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
504 
505  return 1; /* return error */
506  }
507  mask |= 0x02; /* set mask */
508  res = a_llcc68_spi_write_register(handle, LLCC68_REG_EVENT_MASK, (uint8_t *)&mask, 1); /* write register */
509  if (res != 0) /* check result */
510  {
511  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
512 
513  return 1; /* return error */
514  }
515 
516  if (handle->receive_callback != NULL) /* if receive callback */
517  {
518  handle->receive_callback(LLCC68_IRQ_TIMEOUT, NULL, 0); /* run callback */
519  }
520  handle->timeout = 1; /* flag timeout */
521  }
522  if ((status & LLCC68_IRQ_TX_DONE) != 0) /* if tx done */
523  {
524  if (handle->receive_callback != NULL) /* if receive callback */
525  {
526  handle->receive_callback(LLCC68_IRQ_TX_DONE, NULL, 0); /* run callback */
527  }
528  handle->tx_done = 1; /* flag tx done */
529  }
530  if ((status & LLCC68_IRQ_RX_DONE) != 0) /* if rx done */
531  {
532  uint8_t payload_length_rx;
533  uint8_t rx_start_buffer_pointer;
534 
535  memset(buf, 0, sizeof(uint8_t) * 3); /* clear the buffer */
536  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_RX_BUFFER_STATUS, (uint8_t *)buf, 3); /* read command */
537  if (res != 0) /* check result */
538  {
539  handle->debug_print("llcc68: get rx buffer status failed.\n"); /* get rx buffer status failed */
540 
541  return 1; /* return error */
542  }
543  payload_length_rx = buf[1]; /* set status */
544  rx_start_buffer_pointer = buf[2]; /* set status */
545 
546  res = a_llcc68_spi_read_buffer(handle, rx_start_buffer_pointer, handle->receive_buf,
547  payload_length_rx); /* read buffer */
548  if (res != 0) /* check result */
549  {
550  handle->debug_print("llcc68: read buffer failed.\n"); /* read buffer failed */
551 
552  return 1; /* return error */
553  }
554  if (handle->receive_callback != NULL) /* if receive callback */
555  {
556  if (handle->crc_error == 0) /* check crc error */
557  {
558  handle->receive_callback(LLCC68_IRQ_RX_DONE, handle->receive_buf, payload_length_rx); /* run callback */
559  }
560  else
561  {
562  handle->receive_callback(LLCC68_IRQ_RX_DONE, NULL, 0); /* run callback */
563  }
564  }
565  }
566 
567  return 0; /* success return 0 */
568 }
569 
583 uint8_t llcc68_init(llcc68_handle_t *handle)
584 {
585  uint8_t buf[1];
586  uint8_t prev;
587 
588  if (handle == NULL) /* check handle */
589  {
590  return 2; /* return error */
591  }
592  if (handle->debug_print == NULL) /* check debug_print */
593  {
594  return 3; /* return error */
595  }
596  if (handle->spi_init == NULL) /* check spi_init */
597  {
598  handle->debug_print("llcc68: spi_init is null.\n"); /* spi_init is null */
599 
600  return 3; /* return error */
601  }
602  if (handle->spi_deinit == NULL) /* check spi_deinit */
603  {
604  handle->debug_print("llcc68: spi_deinit is null.\n"); /* spi_deinit is null */
605 
606  return 3; /* return error */
607  }
608  if (handle->spi_write_read == NULL) /* check spi_write_read */
609  {
610  handle->debug_print("llcc68: spi_write_read is null.\n"); /* spi_write_read is null */
611 
612  return 3; /* return error */
613  }
614  if (handle->reset_gpio_init == NULL) /* check reset_gpio_init */
615  {
616  handle->debug_print("llcc68: reset_gpio_init is null.\n"); /* reset_gpio_init is null */
617 
618  return 3; /* return error */
619  }
620  if (handle->reset_gpio_deinit == NULL) /* check reset_gpio_deinit */
621  {
622  handle->debug_print("llcc68: reset_gpio_deinit is null.\n"); /* reset_gpio_deinit is null */
623 
624  return 3; /* return error */
625  }
626  if (handle->reset_gpio_write == NULL) /* check reset_gpio_write */
627  {
628  handle->debug_print("llcc68: reset_gpio_write is null.\n"); /* reset_gpio_write is null */
629 
630  return 3; /* return error */
631  }
632  if (handle->busy_gpio_init == NULL) /* check busy_gpio_init */
633  {
634  handle->debug_print("llcc68: busy_gpio_init is null.\n"); /* busy_gpio_init is null */
635 
636  return 3; /* return error */
637  }
638  if (handle->busy_gpio_deinit == NULL) /* check busy_gpio_deinit */
639  {
640  handle->debug_print("llcc68: busy_gpio_deinit is null.\n"); /* busy_gpio_deinit is null */
641 
642  return 3; /* return error */
643  }
644  if (handle->busy_gpio_read == NULL) /* check busy_gpio_read */
645  {
646  handle->debug_print("llcc68: busy_gpio_read is null.\n"); /* busy_gpio_read is null */
647 
648  return 3; /* return error */
649  }
650  if (handle->delay_ms == NULL) /* check delay_ms */
651  {
652  handle->debug_print("llcc68: delay_ms is null.\n"); /* delay_ms is null */
653 
654  return 3; /* return error */
655  }
656  if (handle->receive_callback == NULL) /* check receive_callback */
657  {
658  handle->debug_print("llcc68: receive_callback is null.\n"); /* receive_callback is null */
659 
660  return 3; /* return error */
661  }
662 
663  if (handle->spi_init() != 0) /* spi initialization */
664  {
665  handle->debug_print("llcc68: spi initialization failed.\n"); /* spi initialization failed */
666 
667  return 1; /* return error */
668  }
669  if (handle->reset_gpio_init() != 0) /* reset gpio initialization */
670  {
671  handle->debug_print("llcc68: reset gpio initialization failed.\n"); /* reset gpio initialization failed */
672  (void)handle->spi_deinit(); /* spi deinit */
673 
674  return 4; /* return error */
675  }
676  if (handle->busy_gpio_init() != 0) /* busy gpio initialization */
677  {
678  handle->debug_print("llcc68: busy gpio initialization failed.\n"); /* busy gpio initialization failed */
679  (void)handle->spi_deinit(); /* spi deinit */
680  (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
681 
682  return 5; /* return error */
683  }
684 
685  if (handle->reset_gpio_write(1) != 0) /* set high */
686  {
687  handle->debug_print("llcc68: reset chip failed.\n"); /* reset chip failed */
688  (void)handle->spi_deinit(); /* spi deinit */
689  (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
690  (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
691 
692  return 6; /* return error */
693  }
694  handle->delay_ms(5); /* delay 5 ms */
695  if (handle->reset_gpio_write(0) != 0) /* set low */
696  {
697  handle->debug_print("llcc68: reset chip failed.\n"); /* reset chip failed */
698  (void)handle->spi_deinit(); /* spi deinit */
699  (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
700  (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
701 
702  return 6; /* return error */
703  }
704  handle->delay_ms(10); /* delay 10 ms */
705  if (handle->reset_gpio_write(1) != 0) /* set high */
706  {
707  handle->debug_print("llcc68: reset chip failed.\n"); /* reset chip failed */
708  (void)handle->spi_deinit(); /* spi deinit */
709  (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
710  (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
711 
712  return 6; /* return error */
713  }
714  handle->delay_ms(5); /* delay 5 ms */
715 
716  if (a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_STATUS, (uint8_t *)buf, 1) != 0) /* read command */
717  {
718  handle->debug_print("llcc68: get status failed.\n"); /* get status failed */
719  (void)handle->spi_deinit(); /* spi deinit */
720  (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
721  (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
722 
723  return 6; /* return error */
724  }
725  prev = 0x00;
726  if (a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_STANDBY, (uint8_t *)&prev, 1) != 0) /* write command */
727  {
728  handle->debug_print("llcc68: set standby failed.\n"); /* set standby failed */
729  (void)handle->spi_deinit(); /* spi deinit */
730  (void)handle->reset_gpio_deinit(); /* reset gpio deinit */
731  (void)handle->busy_gpio_deinit(); /* busy gpio deinit */
732 
733  return 6; /* return error */
734  }
735  handle->inited = 1; /* flag finish initialization */
736 
737  return 0; /* success return 0 */
738 }
739 
754 uint8_t llcc68_deinit(llcc68_handle_t *handle)
755 {
756  uint8_t res, prev;
757 
758  if (handle == NULL) /* check handle */
759  {
760  return 2; /* return error */
761  }
762  if (handle->inited != 1) /* check handle initialization */
763  {
764  return 3; /* return error */
765  }
766 
767  res = a_llcc68_check_busy(handle); /* check busy */
768  if (res != 0) /* check result */
769  {
770  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
771 
772  return 4; /* return error */
773  }
774 
775  prev = 0x00; /* set power down */
776  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_SLEEP, (uint8_t *)&prev, 1); /* write command */
777  if (res != 0) /* check result */
778  {
779  handle->debug_print("llcc68: power down failed.\n"); /* power down failed */
780 
781  return 5; /* return error */
782  }
783 
784  res = handle->busy_gpio_deinit(); /* busy gpio deinit */
785  if (res != 0) /* check result */
786  {
787  handle->debug_print("llcc68: busy gpio deinit failed.\n"); /* busy gpio deinit failed */
788 
789  return 6; /* return error */
790  }
791  res = handle->reset_gpio_deinit(); /* reset gpio deinit */
792  if (res != 0) /* check result */
793  {
794  handle->debug_print("llcc68: reset gpio deinit failed.\n"); /* reset gpio deinit failed */
795 
796  return 7; /* return error */
797  }
798  res = handle->spi_deinit(); /* spi deinit */
799  if (res != 0) /* check result */
800  {
801  handle->debug_print("llcc68: spi deinit failed.\n"); /* spi deinit failed */
802 
803  return 1; /* return error */
804  }
805 
806  return 0; /* success return 0 */
807 }
808 
821 uint8_t llcc68_single_receive(llcc68_handle_t *handle, double us)
822 {
823  uint8_t res;
824  uint8_t buf[3];
825  uint16_t clear_irq_param;
826  uint32_t timeout;
827 
828  if (handle == NULL) /* check handle */
829  {
830  return 2; /* return error */
831  }
832  if (handle->inited != 1) /* check handle initialization */
833  {
834  return 3; /* return error */
835  }
836 
837  res = a_llcc68_check_busy(handle); /* check busy */
838  if (res != 0) /* check result */
839  {
840  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
841 
842  return 4; /* return error */
843  }
844 
845  clear_irq_param = 0x03FF; /* set mask */
846  buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
847  buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
848  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
849  if (res != 0) /* check result */
850  {
851  handle->debug_print("llcc68: clear irq status failed.\n"); /* clear irq status failed */
852 
853  return 1; /* return error */
854  }
855 
856  res = a_llcc68_check_busy(handle); /* check busy */
857  if (res != 0) /* check result */
858  {
859  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
860 
861  return 4; /* return error */
862  }
863 
864  timeout = (uint32_t)(us / 15.625); /* convert real data to register data */
865  buf[0] = (timeout >> 16) & 0xFF; /* bit 23 : 16 */
866  buf[1] = (timeout >> 8) & 0xFF; /* bit 15 : 8 */
867  buf[2] = (timeout >> 0) & 0xFF; /* bit 7 : 0 */
868  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_RX, (uint8_t *)buf, 3); /* write command */
869  if (res != 0) /* check result */
870  {
871  handle->debug_print("llcc68: set rx failed.\n"); /* set rx failed */
872 
873  return 1; /* return error */
874  }
875 
876  return 0; /* success return 0 */
877 }
878 
890 uint8_t llcc68_continuous_receive(llcc68_handle_t *handle)
891 {
892  uint8_t res;
893  uint16_t clear_irq_param;
894  uint8_t buf[3];
895 
896  if (handle == NULL) /* check handle */
897  {
898  return 2; /* return error */
899  }
900  if (handle->inited != 1) /* check handle initialization */
901  {
902  return 3; /* return error */
903  }
904 
905  res = a_llcc68_check_busy(handle); /* check busy */
906  if (res != 0) /* check result */
907  {
908  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
909 
910  return 4; /* return error */
911  }
912 
913  clear_irq_param = 0x03FF; /* set mask */
914  buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
915  buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
916  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
917  if (res != 0) /* check result */
918  {
919  handle->debug_print("llcc68: clear irq status failed.\n"); /* clear irq status failed */
920 
921  return 1; /* return error */
922  }
923 
924  res = a_llcc68_check_busy(handle); /* check busy */
925  if (res != 0) /* check result */
926  {
927  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
928 
929  return 4; /* return error */
930  }
931 
932  buf[0] = 0xFF; /* bit 23 : 16 */
933  buf[1] = 0xFF; /* bit 15 : 8 */
934  buf[2] = 0xFF; /* bit 7 : 0 */
935  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_RX, (uint8_t *)buf, 3); /* write command */
936  if (res != 0) /* check result */
937  {
938  handle->debug_print("llcc68: set rx failed.\n"); /* set rx failed */
939 
940  return 1; /* return error */
941  }
942 
943  return 0; /* success return 0 */
944 }
945 
959 uint8_t llcc68_lora_cad(llcc68_handle_t *handle, llcc68_bool_t *enable)
960 {
961  uint8_t res;
962  uint16_t clear_irq_param;
963  uint8_t buf[2];
964  uint16_t timeout;
965 
966  if (handle == NULL) /* check handle */
967  {
968  return 2; /* return error */
969  }
970  if (handle->inited != 1) /* check handle initialization */
971  {
972  return 3; /* return error */
973  }
974 
975  res = a_llcc68_check_busy(handle); /* check busy */
976  if (res != 0) /* check result */
977  {
978  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
979 
980  return 4; /* return error */
981  }
982 
983  clear_irq_param = 0x03FF; /* set mask */
984  buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
985  buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
986  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
987  if (res != 0) /* check result */
988  {
989  handle->debug_print("llcc68: clear irq status failed.\n"); /* clear irq status failed */
990 
991  return 1; /* return error */
992  }
993 
994  res = a_llcc68_check_busy(handle); /* check busy */
995  if (res != 0) /* check result */
996  {
997  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
998 
999  return 4; /* return error */
1000  }
1001 
1002  handle->cad_done = 0; /* clear cad done */
1003  handle->cad_detected = 0; /* clear cad done */
1004  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_CAD, NULL, 0); /* write command */
1005  if (res != 0) /* check result */
1006  {
1007  handle->debug_print("llcc68: set cad failed.\n"); /* set cad failed */
1008 
1009  return 1; /* return error */
1010  }
1011 
1012  timeout = 10000; /* set timeout */
1013  while ((timeout != 0) && (handle->cad_done == 0)) /* wait */
1014  {
1015  handle->delay_ms(1); /* delay 1 ms */
1016  timeout--; /* timeout-- */
1017  }
1018  if (timeout == 0) /* check timeout */
1019  {
1020  handle->debug_print("llcc68: cad timeout.\n"); /* cad timeout */
1021 
1022  return 5; /* return error */
1023  }
1024  if (handle->cad_detected == 1) /* set cad */
1025  {
1026  *enable = LLCC68_BOOL_TRUE; /* enable */
1027  }
1028  else
1029  {
1030  *enable = LLCC68_BOOL_FALSE; /* disable */
1031  }
1032 
1033  return 0; /* success return 0 */
1034 }
1035 
1046 uint8_t llcc68_check_packet_error(llcc68_handle_t *handle, llcc68_bool_t *enable)
1047 {
1048  if (handle == NULL) /* check handle */
1049  {
1050  return 2; /* return error */
1051  }
1052  if (handle->inited != 1) /* check handle initialization */
1053  {
1054  return 3; /* return error */
1055  }
1056 
1057  *enable = (llcc68_bool_t)(handle->crc_error); /* check error */
1058 
1059  return 0; /* success return 0 */
1060 }
1061 
1084 uint8_t llcc68_lora_transmit(llcc68_handle_t *handle, llcc68_clock_source_t standby_src,
1085  uint16_t preamble_length, llcc68_lora_header_t header_type,
1086  llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable,
1087  uint8_t *buf, uint16_t len, uint32_t us)
1088 {
1089  uint8_t res;
1090  uint8_t prev;
1091  uint8_t buffer[6];
1092  uint16_t clear_irq_param;
1093  uint32_t ms;
1094  uint32_t reg;
1095 
1096  if (handle == NULL) /* check handle */
1097  {
1098  return 2; /* return error */
1099  }
1100  if (handle->inited != 1) /* check handle initialization */
1101  {
1102  return 3; /* return error */
1103  }
1104 
1105  res = a_llcc68_check_busy(handle); /* check busy */
1106  if (res != 0) /* check result */
1107  {
1108  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1109 
1110  return 4; /* return error */
1111  }
1112 
1113  clear_irq_param = 0x03FF; /* set mask */
1114  buffer[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
1115  buffer[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
1116  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buffer, 2); /* write command */
1117  if (res != 0) /* check result */
1118  {
1119  handle->debug_print("llcc68: clear irq status failed.\n"); /* clear irq status failed */
1120 
1121  return 1; /* return error */
1122  }
1123 
1124  res = a_llcc68_check_busy(handle); /* check busy */
1125  if (res != 0) /* check result */
1126  {
1127  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1128 
1129  return 4; /* return error */
1130  }
1131 
1132  prev = standby_src; /* set param */
1133  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_STANDBY, (uint8_t *)&prev, 1); /* write command */
1134  if (res != 0) /* check result */
1135  {
1136  handle->debug_print("llcc68: set standby failed.\n"); /* set standby failed */
1137 
1138  return 1; /* return error */
1139  }
1140 
1141  res = a_llcc68_check_busy(handle); /* check busy */
1142  if (res != 0) /* check result */
1143  {
1144  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1145 
1146  return 4; /* return error */
1147  }
1148 
1149  buffer[0] = (preamble_length >> 8) & 0xFF; /* set param */
1150  buffer[1] = (preamble_length >> 0) & 0xFF; /* set param */
1151  buffer[2] = header_type; /* set param */
1152  buffer[3] = (uint8_t)len; /* set param */
1153  buffer[4] = crc_type; /* set param */
1154  buffer[5] = invert_iq_enable; /* set param */
1155  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_PACKET_PARAMS, (uint8_t *)buffer, 6); /* write command */
1156  if (res != 0) /* check result */
1157  {
1158  handle->debug_print("llcc68: set lora modulation params failed.\n"); /* set lora modulation params failed */
1159 
1160  return 1; /* return error */
1161  }
1162 
1163  if (invert_iq_enable == LLCC68_BOOL_FALSE) /* not invert iq */
1164  {
1165  uint8_t setup;
1166 
1167  res = a_llcc68_check_busy(handle); /* check busy */
1168  if (res != 0) /* check result */
1169  {
1170  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1171 
1172  return 4; /* return error */
1173  }
1174 
1175  res = a_llcc68_spi_read_register(handle, LLCC68_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1176  if (res != 0) /* check result */
1177  {
1178  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
1179 
1180  return 1; /* return error */
1181  }
1182 
1183  setup |= (1 << 2); /* set bit 2 */
1184  res = a_llcc68_spi_write_register(handle, LLCC68_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1185  if (res != 0) /* check result */
1186  {
1187  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
1188 
1189  return 1; /* return error */
1190  }
1191  }
1192  else
1193  {
1194  uint8_t setup;
1195 
1196  res = a_llcc68_check_busy(handle); /* check busy */
1197  if (res != 0) /* check result */
1198  {
1199  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1200 
1201  return 4; /* return error */
1202  }
1203 
1204  res = a_llcc68_spi_read_register(handle, LLCC68_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1205  if (res != 0) /* check result */
1206  {
1207  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
1208 
1209  return 1; /* return error */
1210  }
1211 
1212  setup &= ~(1 << 2); /* clear bit 2 */
1213  res = a_llcc68_spi_write_register(handle, LLCC68_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* read register */
1214  if (res != 0) /* check result */
1215  {
1216  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
1217 
1218  return 1; /* return error */
1219  }
1220  }
1221 
1222  res = a_llcc68_check_busy(handle); /* check busy */
1223  if (res != 0) /* check result */
1224  {
1225  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1226 
1227  return 4; /* return error */
1228  }
1229 
1230  if (a_llcc68_spi_write_buffer(handle, 0x00, buf, len) != 0) /* write buffer */
1231  {
1232  handle->debug_print("llcc68: write buffer failed.\n"); /* write buffer failed */
1233 
1234  return 1; /* return error */
1235  }
1236 
1237  res = a_llcc68_check_busy(handle); /* check busy */
1238  if (res != 0) /* check result */
1239  {
1240  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1241 
1242  return 4; /* return error */
1243  }
1244 
1245  reg = (uint32_t)(us / 15.625); /* convert the timeout */
1246  buffer[0] = (reg >> 16) & 0xFF; /* bit 23 : 16 */
1247  buffer[1] = (reg >> 8) & 0xFF; /* bit 15 : 8 */
1248  buffer[2] = (reg >> 0) & 0xFF; /* bit 7 : 0 */
1249  handle->tx_done = 0; /* flag 0 */
1250  handle->timeout = 0; /* flag 0 */
1251  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_TX, (uint8_t *)buffer, 3); /* write command */
1252  if (res != 0) /* check result */
1253  {
1254  handle->debug_print("llcc68: set tx failed.\n"); /* set tx failed */
1255 
1256  return 1; /* return error */
1257  }
1258  ms = us / 1000 + 10000; /* set timeout */
1259  while ((ms != 0) && (handle->tx_done == 0) && (handle->timeout == 0)) /* check timeout */
1260  {
1261  handle->delay_ms(1); /* delay 1 ms */
1262  ms--; /* ms-- */
1263  }
1264  if ((ms != 0) && (handle->tx_done == 1)) /* check the result */
1265  {
1266  return 0; /* success return 0 */
1267  }
1268  else if ((ms == 0) && (handle->tx_done == 0)) /* check the result */
1269  {
1270  handle->debug_print("llcc68: send timeout.\n"); /* send timeout */
1271 
1272  return 5; /* return error */
1273  }
1274  else if (handle->timeout == 1) /* check the result */
1275  {
1276  handle->debug_print("llcc68: irq timeout.\n"); /* irq timeout */
1277 
1278  return 6; /* return error */
1279  }
1280  else
1281  {
1282  handle->debug_print("llcc68: unknown result.\n"); /* unknown result */
1283 
1284  return 7; /* return error */
1285  }
1286 }
1287 
1302 uint8_t llcc68_write_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
1303 {
1304  uint8_t res;
1305 
1306  if (handle == NULL) /* check handle */
1307  {
1308  return 2; /* return error */
1309  }
1310  if (handle->inited != 1) /* check handle initialization */
1311  {
1312  return 3; /* return error */
1313  }
1314 
1315  res = a_llcc68_check_busy(handle); /* check busy */
1316  if (res != 0) /* check result */
1317  {
1318  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1319 
1320  return 4; /* return error */
1321  }
1322 
1323  if (a_llcc68_spi_write_register(handle, reg, buf, len) != 0) /* write register */
1324  {
1325  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
1326 
1327  return 1; /* return error */
1328  }
1329 
1330  return 0; /* success return 0 */
1331 }
1332 
1347 uint8_t llcc68_read_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
1348 {
1349  uint8_t res;
1350 
1351  if (handle == NULL) /* check handle */
1352  {
1353  return 2; /* return error */
1354  }
1355  if (handle->inited != 1) /* check handle initialization */
1356  {
1357  return 3; /* return error */
1358  }
1359 
1360  res = a_llcc68_check_busy(handle); /* check busy */
1361  if (res != 0) /* check result */
1362  {
1363  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1364 
1365  return 4; /* return error */
1366  }
1367 
1368  if (a_llcc68_spi_read_register(handle, reg, buf, len) != 0) /* read register */
1369  {
1370  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
1371 
1372  return 1; /* return error */
1373  }
1374 
1375  return 0; /* success return 0 */
1376 }
1377 
1392 uint8_t llcc68_write_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
1393 {
1394  uint8_t res;
1395 
1396  if (handle == NULL) /* check handle */
1397  {
1398  return 2; /* return error */
1399  }
1400  if (handle->inited != 1) /* check handle initialization */
1401  {
1402  return 3; /* return error */
1403  }
1404 
1405  res = a_llcc68_check_busy(handle); /* check busy */
1406  if (res != 0) /* check result */
1407  {
1408  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1409 
1410  return 4; /* return error */
1411  }
1412 
1413  if (a_llcc68_spi_write_buffer(handle, offset, buf, len) != 0) /* write buffer */
1414  {
1415  handle->debug_print("llcc68: write buffer failed.\n"); /* write buffer failed */
1416 
1417  return 1; /* return error */
1418  }
1419 
1420  return 0; /* success return 0 */
1421 }
1422 
1437 uint8_t llcc68_read_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
1438 {
1439  uint8_t res;
1440 
1441  if (handle == NULL) /* check handle */
1442  {
1443  return 2; /* return error */
1444  }
1445  if (handle->inited != 1) /* check handle initialization */
1446  {
1447  return 3; /* return error */
1448  }
1449 
1450  res = a_llcc68_check_busy(handle); /* check busy */
1451  if (res != 0) /* check result */
1452  {
1453  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1454 
1455  return 4; /* return error */
1456  }
1457 
1458  if (a_llcc68_spi_read_buffer(handle, offset, buf, len) != 0) /* read buffer */
1459  {
1460  handle->debug_print("llcc68: read buffer failed.\n"); /* read buffer failed */
1461 
1462  return 1; /* return error */
1463  }
1464 
1465  return 0; /* success return 0 */
1466 }
1467 
1481 uint8_t llcc68_set_sleep(llcc68_handle_t *handle, llcc68_start_mode_t mode, llcc68_bool_t rtc_wake_up_enable)
1482 {
1483  uint8_t res;
1484  uint8_t prev;
1485 
1486  if (handle == NULL) /* check handle */
1487  {
1488  return 2; /* return error */
1489  }
1490  if (handle->inited != 1) /* check handle initialization */
1491  {
1492  return 3; /* return error */
1493  }
1494 
1495  res = a_llcc68_check_busy(handle); /* check busy */
1496  if (res != 0) /* check result */
1497  {
1498  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1499 
1500  return 4; /* return error */
1501  }
1502 
1503  prev = (uint8_t)((mode << 2) | (rtc_wake_up_enable << 0)); /* set param */
1504  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_SLEEP, (uint8_t *)&prev, 1); /* write command */
1505  if (res != 0) /* check result */
1506  {
1507  handle->debug_print("llcc68: set sleep failed.\n"); /* set sleep failed */
1508 
1509  return 1; /* return error */
1510  }
1511 
1512  return 0; /* success return 0 */
1513 }
1514 
1527 uint8_t llcc68_set_standby(llcc68_handle_t *handle, llcc68_clock_source_t src)
1528 {
1529  uint8_t res;
1530  uint8_t prev;
1531 
1532  if (handle == NULL) /* check handle */
1533  {
1534  return 2; /* return error */
1535  }
1536  if (handle->inited != 1) /* check handle initialization */
1537  {
1538  return 3; /* return error */
1539  }
1540 
1541  res = a_llcc68_check_busy(handle); /* check busy */
1542  if (res != 0) /* check result */
1543  {
1544  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1545 
1546  return 4; /* return error */
1547  }
1548 
1549  prev = src; /* set param */
1550  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_STANDBY, (uint8_t *)&prev, 1); /* write command */
1551  if (res != 0) /* check result */
1552  {
1553  handle->debug_print("llcc68: set standby failed.\n"); /* set standby failed */
1554 
1555  return 1; /* return error */
1556  }
1557 
1558  return 0; /* success return 0 */
1559 }
1560 
1572 uint8_t llcc68_set_frequency_synthesis(llcc68_handle_t *handle)
1573 {
1574  uint8_t res;
1575 
1576  if (handle == NULL) /* check handle */
1577  {
1578  return 2; /* return error */
1579  }
1580  if (handle->inited != 1) /* check handle initialization */
1581  {
1582  return 3; /* return error */
1583  }
1584 
1585  res = a_llcc68_check_busy(handle); /* check busy */
1586  if (res != 0) /* check result */
1587  {
1588  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1589 
1590  return 4; /* return error */
1591  }
1592 
1593  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_FS, NULL, 0); /* write command */
1594  if (res != 0) /* check result */
1595  {
1596  handle->debug_print("llcc68: set fs failed.\n"); /* set fs failed */
1597 
1598  return 1; /* return error */
1599  }
1600 
1601  return 0; /* success return 0 */
1602 }
1603 
1616 uint8_t llcc68_set_tx(llcc68_handle_t *handle, uint32_t timeout)
1617 {
1618  uint8_t res;
1619  uint8_t buf[3];
1620 
1621  if (handle == NULL) /* check handle */
1622  {
1623  return 2; /* return error */
1624  }
1625  if (handle->inited != 1) /* check handle initialization */
1626  {
1627  return 3; /* return error */
1628  }
1629 
1630  res = a_llcc68_check_busy(handle); /* check busy */
1631  if (res != 0) /* check result */
1632  {
1633  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1634 
1635  return 4; /* return error */
1636  }
1637 
1638  buf[0] = (timeout >> 16) & 0xFF; /* bit 23 : 16 */
1639  buf[1] = (timeout >> 8) & 0xFF; /* bit 15 : 8 */
1640  buf[2] = (timeout >> 0) & 0xFF; /* bit 7 : 0 */
1641  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_TX, (uint8_t *)buf, 3); /* write command */
1642  if (res != 0) /* check result */
1643  {
1644  handle->debug_print("llcc68: set tx failed.\n"); /* set tx failed */
1645 
1646  return 1; /* return error */
1647  }
1648 
1649  return 0; /* success return 0 */
1650 }
1651 
1665 uint8_t llcc68_set_rx(llcc68_handle_t *handle, uint32_t timeout)
1666 {
1667  uint8_t res;
1668  uint8_t buf[3];
1669 
1670  if (handle == NULL) /* check handle */
1671  {
1672  return 2; /* return error */
1673  }
1674  if (handle->inited != 1) /* check handle initialization */
1675  {
1676  return 3; /* return error */
1677  }
1678 
1679  res = a_llcc68_check_busy(handle); /* check busy */
1680  if (res != 0) /* check result */
1681  {
1682  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1683 
1684  return 4; /* return error */
1685  }
1686 
1687  buf[0] = (timeout >> 16) & 0xFF; /* bit 23 : 16 */
1688  buf[1] = (timeout >> 8) & 0xFF; /* bit 15 : 8 */
1689  buf[2] = (timeout >> 0) & 0xFF; /* bit 7 : 0 */
1690  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_RX, (uint8_t *)buf, 3); /* write command */
1691  if (res != 0) /* check result */
1692  {
1693  handle->debug_print("llcc68: set rx failed.\n"); /* set rx failed */
1694 
1695  return 1; /* return error */
1696  }
1697 
1698  return 0; /* success return 0 */
1699 }
1700 
1712 uint8_t llcc68_timeout_convert_to_register(llcc68_handle_t *handle, double us, uint32_t *reg)
1713 {
1714  if (handle == NULL) /* check handle */
1715  {
1716  return 2; /* return error */
1717  }
1718  if (handle->inited != 1) /* check handle initialization */
1719  {
1720  return 3; /* return error */
1721  }
1722 
1723  *reg = (uint32_t)(us / 15.625); /* convert real data to register data */
1724 
1725  return 0; /* success return 0 */
1726 }
1727 
1739 uint8_t llcc68_timeout_convert_to_data(llcc68_handle_t *handle, uint32_t reg, double *us)
1740 {
1741  if (handle == NULL) /* check handle */
1742  {
1743  return 2; /* return error */
1744  }
1745  if (handle->inited != 1) /* check handle initialization */
1746  {
1747  return 3; /* return error */
1748  }
1749 
1750  *us = (double)(reg) * 15.625; /* convert raw data to real data */
1751 
1752  return 0; /* success return 0 */
1753 }
1754 
1767 uint8_t llcc68_set_stop_timer_on_preamble(llcc68_handle_t *handle, llcc68_bool_t enable)
1768 {
1769  uint8_t res;
1770  uint8_t prev;
1771 
1772  if (handle == NULL) /* check handle */
1773  {
1774  return 2; /* return error */
1775  }
1776  if (handle->inited != 1) /* check handle initialization */
1777  {
1778  return 3; /* return error */
1779  }
1780 
1781  res = a_llcc68_check_busy(handle); /* check busy */
1782  if (res != 0) /* check result */
1783  {
1784  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1785 
1786  return 4; /* return error */
1787  }
1788 
1789  prev = enable; /* set param */
1790  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_STOP_TIMER_ON_PREAMBLE, (uint8_t *)&prev, 1); /* write command */
1791  if (res != 0) /* check result */
1792  {
1793  handle->debug_print("llcc68: set stop timer on preamble failed.\n"); /* set stop timer on preamble failed */
1794 
1795  return 1; /* return error */
1796  }
1797 
1798  return 0; /* success return 0 */
1799 }
1800 
1814 uint8_t llcc68_set_rx_duty_cycle(llcc68_handle_t *handle, uint32_t rx_period, uint32_t sleep_period)
1815 {
1816  uint8_t res;
1817  uint8_t buf[6];
1818 
1819  if (handle == NULL) /* check handle */
1820  {
1821  return 2; /* return error */
1822  }
1823  if (handle->inited != 1) /* check handle initialization */
1824  {
1825  return 3; /* return error */
1826  }
1827 
1828  res = a_llcc68_check_busy(handle); /* check busy */
1829  if (res != 0) /* check result */
1830  {
1831  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1832 
1833  return 4; /* return error */
1834  }
1835 
1836  buf[0] = (rx_period >> 16) & 0xFF; /* bit 23 : 16 */
1837  buf[1] = (rx_period >> 8) & 0xFF; /* bit 15 : 8 */
1838  buf[2] = (rx_period >> 0) & 0xFF; /* bit 7 : 0 */
1839  buf[3] = (sleep_period >> 16) & 0xFF; /* bit 23 : 16 */
1840  buf[4] = (sleep_period >> 8) & 0xFF; /* bit 15 : 8 */
1841  buf[5] = (sleep_period >> 0) & 0xFF; /* bit 7 : 0 */
1842  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_RX_DUTY_CYCLE, (uint8_t *)buf, 6); /* write command */
1843  if (res != 0) /* check result */
1844  {
1845  handle->debug_print("llcc68: set rx duty cycle failed.\n"); /* set rx duty cycle failed */
1846 
1847  return 1; /* return error */
1848  }
1849 
1850  return 0; /* success return 0 */
1851 }
1852 
1864 uint8_t llcc68_set_cad(llcc68_handle_t *handle)
1865 {
1866  uint8_t res;
1867 
1868  if (handle == NULL) /* check handle */
1869  {
1870  return 2; /* return error */
1871  }
1872  if (handle->inited != 1) /* check handle initialization */
1873  {
1874  return 3; /* return error */
1875  }
1876 
1877  res = a_llcc68_check_busy(handle); /* check busy */
1878  if (res != 0) /* check result */
1879  {
1880  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1881 
1882  return 4; /* return error */
1883  }
1884 
1885  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_CAD, NULL, 0); /* write command */
1886  if (res != 0) /* check result */
1887  {
1888  handle->debug_print("llcc68: set cad failed.\n"); /* set cad failed */
1889 
1890  return 1; /* return error */
1891  }
1892 
1893  return 0; /* success return 0 */
1894 }
1895 
1907 uint8_t llcc68_set_tx_continuous_wave(llcc68_handle_t *handle)
1908 {
1909  uint8_t res;
1910 
1911  if (handle == NULL) /* check handle */
1912  {
1913  return 2; /* return error */
1914  }
1915  if (handle->inited != 1) /* check handle initialization */
1916  {
1917  return 3; /* return error */
1918  }
1919 
1920  res = a_llcc68_check_busy(handle); /* check busy */
1921  if (res != 0) /* check result */
1922  {
1923  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1924 
1925  return 4; /* return error */
1926  }
1927 
1928  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_TX_CONTINUOUS_WAVE, NULL, 0); /* write command */
1929  if (res != 0) /* check result */
1930  {
1931  handle->debug_print("llcc68: set tx continuous wave failed.\n"); /* set tx continuous wave failed */
1932 
1933  return 1; /* return error */
1934  }
1935 
1936  return 0; /* success return 0 */
1937 }
1938 
1950 uint8_t llcc68_set_tx_infinite_preamble(llcc68_handle_t *handle)
1951 {
1952  uint8_t res;
1953 
1954  if (handle == NULL) /* check handle */
1955  {
1956  return 2; /* return error */
1957  }
1958  if (handle->inited != 1) /* check handle initialization */
1959  {
1960  return 3; /* return error */
1961  }
1962 
1963  res = a_llcc68_check_busy(handle); /* check busy */
1964  if (res != 0) /* check result */
1965  {
1966  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
1967 
1968  return 4; /* return error */
1969  }
1970 
1971  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_TX_INFINITE_PREAMBLE, NULL, 0); /* write command */
1972  if (res != 0) /* check result */
1973  {
1974  handle->debug_print("llcc68: set tx infinite preamble failed.\n"); /* set tx infinite preamble failed */
1975 
1976  return 1; /* return error */
1977  }
1978 
1979  return 0; /* success return 0 */
1980 }
1981 
1994 uint8_t llcc68_set_regulator_mode(llcc68_handle_t *handle, llcc68_regulator_mode_t mode)
1995 {
1996  uint8_t res;
1997  uint8_t prev;
1998 
1999  if (handle == NULL) /* check handle */
2000  {
2001  return 2; /* return error */
2002  }
2003  if (handle->inited != 1) /* check handle initialization */
2004  {
2005  return 3; /* return error */
2006  }
2007 
2008  res = a_llcc68_check_busy(handle); /* check busy */
2009  if (res != 0) /* check result */
2010  {
2011  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2012 
2013  return 4; /* return error */
2014  }
2015 
2016  prev = mode; /* set param */
2017  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_REGULATOR_MODE, (uint8_t *)&prev, 1); /* write command */
2018  if (res != 0) /* check result */
2019  {
2020  handle->debug_print("llcc68: set regulator mode failed.\n"); /* set regulator mode failed */
2021 
2022  return 1; /* return error */
2023  }
2024 
2025  return 0; /* success return 0 */
2026 }
2027 
2040 uint8_t llcc68_set_calibration(llcc68_handle_t *handle, uint8_t settings)
2041 {
2042  uint8_t res;
2043  uint8_t prev;
2044 
2045  if (handle == NULL) /* check handle */
2046  {
2047  return 2; /* return error */
2048  }
2049  if (handle->inited != 1) /* check handle initialization */
2050  {
2051  return 3; /* return error */
2052  }
2053 
2054  res = a_llcc68_check_busy(handle); /* check busy */
2055  if (res != 0) /* check result */
2056  {
2057  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2058 
2059  return 4; /* return error */
2060  }
2061 
2062  prev = settings; /* set param */
2063  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_CALIBRATE, (uint8_t *)&prev, 1); /* write command */
2064  if (res != 0) /* check result */
2065  {
2066  handle->debug_print("llcc68: set calibration failed.\n"); /* set calibration failed */
2067 
2068  return 1; /* return error */
2069  }
2070 
2071  return 0; /* success return 0 */
2072 }
2073 
2087 uint8_t llcc68_set_calibration_image(llcc68_handle_t *handle, uint8_t freq1, uint8_t freq2)
2088 {
2089  uint8_t res;
2090  uint8_t buf[2];
2091 
2092  if (handle == NULL) /* check handle */
2093  {
2094  return 2; /* return error */
2095  }
2096  if (handle->inited != 1) /* check handle initialization */
2097  {
2098  return 3; /* return error */
2099  }
2100 
2101  res = a_llcc68_check_busy(handle); /* check busy */
2102  if (res != 0) /* check result */
2103  {
2104  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2105 
2106  return 4; /* return error */
2107  }
2108 
2109  buf[0] = freq1; /* set param */
2110  buf[1] = freq2; /* set param */
2111  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_CALIBRATE_IMAGE, (uint8_t *)buf, 2); /* write command */
2112  if (res != 0) /* check result */
2113  {
2114  handle->debug_print("llcc68: set calibration image failed.\n"); /* set calibration image failed */
2115 
2116  return 1; /* return error */
2117  }
2118 
2119  return 0; /* success return 0 */
2120 }
2121 
2135 uint8_t llcc68_set_pa_config(llcc68_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max)
2136 {
2137  uint8_t res;
2138  uint8_t buf[4];
2139 
2140  if (handle == NULL) /* check handle */
2141  {
2142  return 2; /* return error */
2143  }
2144  if (handle->inited != 1) /* check handle initialization */
2145  {
2146  return 3; /* return error */
2147  }
2148 
2149  res = a_llcc68_check_busy(handle); /* check busy */
2150  if (res != 0) /* check result */
2151  {
2152  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2153 
2154  return 4; /* return error */
2155  }
2156 
2157  buf[0] = pa_duty_cycle; /* set param */
2158  buf[1] = hp_max; /* set param */
2159  buf[2] = 0x00; /* set param */
2160  buf[3] = 0x01; /* set param */
2161  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_PA_CONFIG, (uint8_t *)buf, 4); /* write command */
2162  if (res != 0) /* check result */
2163  {
2164  handle->debug_print("llcc68: set pa config failed.\n"); /* set pa config failed */
2165 
2166  return 1; /* return error */
2167  }
2168 
2169  return 0; /* success return 0 */
2170 }
2171 
2184 uint8_t llcc68_set_rx_tx_fallback_mode(llcc68_handle_t *handle, llcc68_rx_tx_fallback_mode_t mode)
2185 {
2186  uint8_t res;
2187  uint8_t prev;
2188 
2189  if (handle == NULL) /* check handle */
2190  {
2191  return 2; /* return error */
2192  }
2193  if (handle->inited != 1) /* check handle initialization */
2194  {
2195  return 3; /* return error */
2196  }
2197 
2198  res = a_llcc68_check_busy(handle); /* check busy */
2199  if (res != 0) /* check result */
2200  {
2201  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2202 
2203  return 4; /* return error */
2204  }
2205 
2206  prev = mode; /* set param */
2207  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_RX_TX_FALLBACK_MODE, (uint8_t *)&prev, 1); /* write command */
2208  if (res != 0) /* check result */
2209  {
2210  handle->debug_print("llcc68: set rx tx fallback mode failed.\n"); /* set rx tx fallback mode failed */
2211 
2212  return 1; /* return error */
2213  }
2214 
2215  return 0; /* success return 0 */
2216 }
2217 
2233 uint8_t llcc68_set_dio_irq_params(llcc68_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask,
2234  uint16_t dio2_mask, uint16_t dio3_mask)
2235 {
2236  uint8_t res;
2237  uint8_t buf[8];
2238 
2239  if (handle == NULL) /* check handle */
2240  {
2241  return 2; /* return error */
2242  }
2243  if (handle->inited != 1) /* check handle initialization */
2244  {
2245  return 3; /* return error */
2246  }
2247 
2248  res = a_llcc68_check_busy(handle); /* check busy */
2249  if (res != 0) /* check result */
2250  {
2251  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2252 
2253  return 4; /* return error */
2254  }
2255 
2256  buf[0] = (irq_mask >> 8) & 0xFF; /* set param */
2257  buf[1] = (irq_mask >> 0) & 0xFF; /* set param */
2258  buf[2] = (dio1_mask >> 8) & 0xFF; /* set param */
2259  buf[3] = (dio1_mask >> 0) & 0xFF; /* set param */
2260  buf[4] = (dio2_mask >> 8) & 0xFF; /* set param */
2261  buf[5] = (dio2_mask >> 0) & 0xFF; /* set param */
2262  buf[6] = (dio3_mask >> 8) & 0xFF; /* set param */
2263  buf[7] = (dio3_mask >> 0) & 0xFF; /* set param */
2264 
2265  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_DIO_IRQ_PARAMS, (uint8_t *)buf, 8); /* write command */
2266  if (res != 0) /* check result */
2267  {
2268  handle->debug_print("llcc68: set dio irq params failed.\n"); /* set dio irq params failed */
2269 
2270  return 1; /* return error */
2271  }
2272 
2273  return 0; /* success return 0 */
2274 }
2275 
2288 uint8_t llcc68_get_irq_status(llcc68_handle_t *handle, uint16_t *status)
2289 {
2290  uint8_t res;
2291  uint8_t buf[3];
2292 
2293  if (handle == NULL) /* check handle */
2294  {
2295  return 2; /* return error */
2296  }
2297  if (handle->inited != 1) /* check handle initialization */
2298  {
2299  return 3; /* return error */
2300  }
2301 
2302  res = a_llcc68_check_busy(handle); /* check busy */
2303  if (res != 0) /* check result */
2304  {
2305  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2306 
2307  return 4; /* return error */
2308  }
2309 
2310  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_IRQ_STATUS, (uint8_t *)buf, 3); /* read command */
2311  if (res != 0) /* check result */
2312  {
2313  handle->debug_print("llcc68: get irq status failed.\n"); /* get irq status failed */
2314 
2315  return 1; /* return error */
2316  }
2317  *status = ((uint16_t)buf[1] << 8) | buf[2]; /* set status */
2318 
2319  return 0; /* success return 0 */
2320 }
2321 
2334 uint8_t llcc68_clear_irq_status(llcc68_handle_t *handle, uint16_t clear_irq_param)
2335 {
2336  uint8_t res;
2337  uint8_t buf[2];
2338 
2339  if (handle == NULL) /* check handle */
2340  {
2341  return 2; /* return error */
2342  }
2343  if (handle->inited != 1) /* check handle initialization */
2344  {
2345  return 3; /* return error */
2346  }
2347 
2348  res = a_llcc68_check_busy(handle); /* check busy */
2349  if (res != 0) /* check result */
2350  {
2351  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2352 
2353  return 4; /* return error */
2354  }
2355 
2356  buf[0] = (clear_irq_param >> 8) & 0xFF; /* set param */
2357  buf[1] = (clear_irq_param >> 0) & 0xFF; /* set param */
2358  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_CLEAR_IRQ_STATUS, (uint8_t *)buf, 2); /* write command */
2359  if (res != 0) /* check result */
2360  {
2361  handle->debug_print("llcc68: clear irq status failed.\n"); /* clear irq status failed */
2362 
2363  return 1; /* return error */
2364  }
2365 
2366  return 0; /* success return 0 */
2367 }
2368 
2381 uint8_t llcc68_set_dio2_as_rf_switch_ctrl(llcc68_handle_t *handle, llcc68_bool_t enable)
2382 {
2383  uint8_t res;
2384  uint8_t prev;
2385 
2386  if (handle == NULL) /* check handle */
2387  {
2388  return 2; /* return error */
2389  }
2390  if (handle->inited != 1) /* check handle initialization */
2391  {
2392  return 3; /* return error */
2393  }
2394 
2395  res = a_llcc68_check_busy(handle); /* check busy */
2396  if (res != 0) /* check result */
2397  {
2398  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2399 
2400  return 4; /* return error */
2401  }
2402 
2403  prev = enable; /* set param */
2404  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_DIO2_AS_RF_SWITCH_CTRL, (uint8_t *)&prev, 1); /* write command */
2405  if (res != 0) /* check result */
2406  {
2407  handle->debug_print("llcc68: set dio2 as rf switch ctrl failed.\n"); /* set dio2 as rf switch ctrl failed */
2408 
2409  return 1; /* return error */
2410  }
2411 
2412  return 0; /* success return 0 */
2413 }
2414 
2428 uint8_t llcc68_set_dio3_as_tcxo_ctrl(llcc68_handle_t *handle, llcc68_tcxo_voltage_t voltage, uint32_t delay)
2429 {
2430  uint8_t res;
2431  uint8_t buf[4];
2432 
2433  if (handle == NULL) /* check handle */
2434  {
2435  return 2; /* return error */
2436  }
2437  if (handle->inited != 1) /* check handle initialization */
2438  {
2439  return 3; /* return error */
2440  }
2441 
2442  res = a_llcc68_check_busy(handle); /* check busy */
2443  if (res != 0) /* check result */
2444  {
2445  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2446 
2447  return 4; /* return error */
2448  }
2449 
2450  buf[0] = voltage; /* set param */
2451  buf[1] = (delay >> 16) & 0xFF; /* set param */
2452  buf[2] = (delay >> 8) & 0xFF; /* set param */
2453  buf[3] = (delay >> 0) & 0xFF; /* set param */
2454  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_DIO3_AS_TCXO_CTRL, (uint8_t *)buf, 4); /* write command */
2455  if (res != 0) /* check result */
2456  {
2457  handle->debug_print("llcc68: set dio3 as tcxo ctrl status failed.\n"); /* set dio3 as tcxo ctrl status failed */
2458 
2459  return 1; /* return error */
2460  }
2461 
2462  return 0; /* success return 0 */
2463 }
2464 
2476 uint8_t llcc68_frequency_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
2477 {
2478  if (handle == NULL) /* check handle */
2479  {
2480  return 2; /* return error */
2481  }
2482  if (handle->inited != 1) /* check handle initialization */
2483  {
2484  return 3; /* return error */
2485  }
2486 
2487  *reg = (uint32_t)(powf(2.0f, 25.0f) / (32 * powf(10.f, 6.0f)) * freq); /* convert real data to register data */
2488 
2489  return 0; /* success return 0 */
2490 }
2491 
2503 uint8_t llcc68_frequency_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq)
2504 {
2505  if (handle == NULL) /* check handle */
2506  {
2507  return 2; /* return error */
2508  }
2509  if (handle->inited != 1) /* check handle initialization */
2510  {
2511  return 3; /* return error */
2512  }
2513 
2514  *freq = (uint32_t)(32 * powf(10.f, 6.0f) / powf(2.0f, 25.0f) * reg); /* convert real data to register data */
2515 
2516  return 0; /* success return 0 */
2517 }
2518 
2531 uint8_t llcc68_set_rf_frequency(llcc68_handle_t *handle, uint32_t reg)
2532 {
2533  uint8_t res;
2534  uint8_t buf[4];
2535 
2536  if (handle == NULL) /* check handle */
2537  {
2538  return 2; /* return error */
2539  }
2540  if (handle->inited != 1) /* check handle initialization */
2541  {
2542  return 3; /* return error */
2543  }
2544 
2545  res = a_llcc68_check_busy(handle); /* check busy */
2546  if (res != 0) /* check result */
2547  {
2548  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2549 
2550  return 4; /* return error */
2551  }
2552 
2553  buf[0] = (reg >> 24) & 0xFF; /* set param */
2554  buf[1] = (reg >> 16) & 0xFF; /* set param */
2555  buf[2] = (reg >> 8) & 0xFF; /* set param */
2556  buf[3] = (reg >> 0) & 0xFF; /* set param */
2557  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_RF_FREQUENCY, (uint8_t *)buf, 4); /* write command */
2558  if (res != 0) /* check result */
2559  {
2560  handle->debug_print("llcc68: set rf frequency failed.\n"); /* set rf frequency failed */
2561 
2562  return 1; /* return error */
2563  }
2564 
2565  return 0; /* success return 0 */
2566 }
2567 
2580 uint8_t llcc68_set_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t type)
2581 {
2582  uint8_t res;
2583  uint8_t prev;
2584 
2585  if (handle == NULL) /* check handle */
2586  {
2587  return 2; /* return error */
2588  }
2589  if (handle->inited != 1) /* check handle initialization */
2590  {
2591  return 3; /* return error */
2592  }
2593 
2594  res = a_llcc68_check_busy(handle); /* check busy */
2595  if (res != 0) /* check result */
2596  {
2597  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2598 
2599  return 4; /* return error */
2600  }
2601 
2602  prev = type; /* set param */
2603  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_PACKET_TYPE, (uint8_t *)&prev, 1); /* write command */
2604  if (res != 0) /* check result */
2605  {
2606  handle->debug_print("llcc68: set packet type failed.\n"); /* set packet type failed */
2607 
2608  return 1; /* return error */
2609  }
2610 
2611  return 0; /* success return 0 */
2612 }
2613 
2626 uint8_t llcc68_get_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t *type)
2627 {
2628  uint8_t res;
2629  uint8_t buf[2];
2630 
2631  if (handle == NULL) /* check handle */
2632  {
2633  return 2; /* return error */
2634  }
2635  if (handle->inited != 1) /* check handle initialization */
2636  {
2637  return 3; /* return error */
2638  }
2639 
2640  res = a_llcc68_check_busy(handle); /* check busy */
2641  if (res != 0) /* check result */
2642  {
2643  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2644 
2645  return 4; /* return error */
2646  }
2647 
2648  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_PACKET_TYPE, (uint8_t *)buf, 2); /* write command */
2649  if (res != 0) /* check result */
2650  {
2651  handle->debug_print("llcc68: get packet type failed.\n"); /* get packet type failed */
2652 
2653  return 1; /* return error */
2654  }
2655  *type = (llcc68_packet_type_t)(buf[1]); /* get type */
2656 
2657  return 0; /* success return 0 */
2658 }
2659 
2673 uint8_t llcc68_set_tx_params(llcc68_handle_t *handle, int8_t dbm, llcc68_ramp_time_t t)
2674 {
2675  uint8_t res;
2676  uint8_t buf[2];
2677 
2678  if (handle == NULL) /* check handle */
2679  {
2680  return 2; /* return error */
2681  }
2682  if (handle->inited != 1) /* check handle initialization */
2683  {
2684  return 3; /* return error */
2685  }
2686 
2687  res = a_llcc68_check_busy(handle); /* check busy */
2688  if (res != 0) /* check result */
2689  {
2690  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2691 
2692  return 4; /* return error */
2693  }
2694 
2695  buf[0] = dbm; /* set param */
2696  buf[1] = t; /* set param */
2697  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_TX_PARAMS, (uint8_t *)buf, 2); /* write command */
2698  if (res != 0) /* check result */
2699  {
2700  handle->debug_print("llcc68: set tx params failed.\n"); /* set tx params failed */
2701 
2702  return 1; /* return error */
2703  }
2704 
2705  return 0; /* success return 0 */
2706 }
2707 
2723 uint8_t llcc68_set_gfsk_modulation_params(llcc68_handle_t *handle, uint32_t br, llcc68_gfsk_pulse_shape_t shape,
2724  llcc68_gfsk_bandwidth_t bw, uint32_t fdev)
2725 {
2726  uint8_t res;
2727  uint8_t buf[8];
2728 
2729  if (handle == NULL) /* check handle */
2730  {
2731  return 2; /* return error */
2732  }
2733  if (handle->inited != 1) /* check handle initialization */
2734  {
2735  return 3; /* return error */
2736  }
2737 
2738  res = a_llcc68_check_busy(handle); /* check busy */
2739  if (res != 0) /* check result */
2740  {
2741  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2742 
2743  return 4; /* return error */
2744  }
2745 
2746  buf[0] = (br >> 16) & 0xFF; /* set param */
2747  buf[1] = (br >> 8) & 0xFF; /* set param */
2748  buf[2] = (br >> 0) & 0xFF; /* set param */
2749  buf[3] = shape; /* set param */
2750  buf[4] = bw; /* set param */
2751  buf[5] = (fdev >> 16) & 0xFF; /* set param */
2752  buf[6] = (fdev >> 8) & 0xFF; /* set param */
2753  buf[7] = (fdev >> 0) & 0xFF; /* set param */
2754  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_MODULATION_PARAMS, (uint8_t *)buf, 8); /* write command */
2755  if (res != 0) /* check result */
2756  {
2757  handle->debug_print("llcc68: set gfsk modulation params failed.\n"); /* set gfsk modulation params failed */
2758 
2759  return 1; /* return error */
2760  }
2761 
2762  return 0; /* success return 0 */
2763 }
2764 
2776 uint8_t llcc68_gfsk_bit_rate_convert_to_register(llcc68_handle_t *handle, uint32_t br, uint32_t *reg)
2777 {
2778  if (handle == NULL) /* check handle */
2779  {
2780  return 2; /* return error */
2781  }
2782  if (handle->inited != 1) /* check handle initialization */
2783  {
2784  return 3; /* return error */
2785  }
2786 
2787  *reg = (uint32_t)(32 * (32 * powf(10.f, 6.0f))) / br; /* convert real data to register data */
2788 
2789  return 0; /* success return 0 */
2790 }
2791 
2803 uint8_t llcc68_gfsk_bit_rate_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *br)
2804 {
2805  if (handle == NULL) /* check handle */
2806  {
2807  return 2; /* return error */
2808  }
2809  if (handle->inited != 1) /* check handle initialization */
2810  {
2811  return 3; /* return error */
2812  }
2813 
2814  *br = (uint32_t)(32 * 32 * powf(10.f, 6.0f) / reg); /* convert real data to register data */
2815 
2816  return 0; /* success return 0 */
2817 }
2818 
2830 uint8_t llcc68_gfsk_frequency_deviation_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
2831 {
2832  if (handle == NULL) /* check handle */
2833  {
2834  return 2; /* return error */
2835  }
2836  if (handle->inited != 1) /* check handle initialization */
2837  {
2838  return 3; /* return error */
2839  }
2840 
2841  *reg = (uint32_t)(powf(2.0f, 25.0f) * freq / (32 * powf(10.f, 6.0f))); /* convert real data to register data */
2842 
2843  return 0; /* success return 0 */
2844 }
2845 
2857 uint8_t llcc68_gfsk_frequency_deviation_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq)
2858 {
2859  if (handle == NULL) /* check handle */
2860  {
2861  return 2; /* return error */
2862  }
2863  if (handle->inited != 1) /* check handle initialization */
2864  {
2865  return 3; /* return error */
2866  }
2867 
2868  *freq = (uint32_t)(32 * powf(10.f, 6.0f) / powf(2.0f, 25.0f) * reg); /* convert real data to register data */
2869 
2870  return 0; /* success return 0 */
2871 }
2872 
2888 uint8_t llcc68_set_lora_modulation_params(llcc68_handle_t *handle, llcc68_lora_sf_t sf, llcc68_lora_bandwidth_t bw,
2889  llcc68_lora_cr_t cr, llcc68_bool_t low_data_rate_optimize_enable)
2890 {
2891  uint8_t res;
2892  uint8_t buf[4];
2893 
2894  if (handle == NULL) /* check handle */
2895  {
2896  return 2; /* return error */
2897  }
2898  if (handle->inited != 1) /* check handle initialization */
2899  {
2900  return 3; /* return error */
2901  }
2902 
2903  res = a_llcc68_check_busy(handle); /* check busy */
2904  if (res != 0) /* check result */
2905  {
2906  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2907 
2908  return 4; /* return error */
2909  }
2910 
2911  buf[0] = sf; /* set param */
2912  buf[1] = bw; /* set param */
2913  buf[2] = cr; /* set param */
2914  buf[3] = low_data_rate_optimize_enable; /* set param */
2915  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_MODULATION_PARAMS, (uint8_t *)buf, 4); /* write command */
2916  if (res != 0) /* check result */
2917  {
2918  handle->debug_print("llcc68: set lora modulation params failed.\n"); /* set lora modulation params failed */
2919 
2920  return 1; /* return error */
2921  }
2922 
2923  return 0; /* success return 0 */
2924 }
2925 
2946 uint8_t llcc68_set_gfsk_packet_params(llcc68_handle_t *handle, uint16_t preamble_length,
2947  llcc68_gfsk_preamble_detector_length_t detector_length,
2948  uint8_t sync_word_length, llcc68_gfsk_addr_filter_t filter,
2949  llcc68_gfsk_packet_type_t packet_type, uint8_t payload_length,
2950  llcc68_gfsk_crc_type_t crc_type, llcc68_bool_t whitening_enable)
2951 {
2952  uint8_t res;
2953  uint8_t buf[9];
2954 
2955  if (handle == NULL) /* check handle */
2956  {
2957  return 2; /* return error */
2958  }
2959  if (handle->inited != 1) /* check handle initialization */
2960  {
2961  return 3; /* return error */
2962  }
2963  if (sync_word_length > 0x40) /* check sync word length */
2964  {
2965  handle->debug_print("llcc68: sync word length is over 0x40.\n"); /* chip is busy */
2966 
2967  return 5; /* return error */
2968  }
2969 
2970  res = a_llcc68_check_busy(handle); /* check busy */
2971  if (res != 0) /* check result */
2972  {
2973  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
2974 
2975  return 4; /* return error */
2976  }
2977 
2978  buf[0] = (preamble_length >> 8) & 0xFF; /* set param */
2979  buf[1] = (preamble_length >> 0) & 0xFF; /* set param */
2980  buf[2] = detector_length; /* set param */
2981  buf[3] = sync_word_length; /* set param */
2982  buf[4] = filter; /* set param */
2983  buf[5] = packet_type; /* set param */
2984  buf[6] = payload_length; /* set param */
2985  buf[7] = crc_type; /* set param */
2986  buf[8] = whitening_enable; /* set param */
2987  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_PACKET_PARAMS, (uint8_t *)buf, 9); /* write command */
2988  if (res != 0) /* check result */
2989  {
2990  handle->debug_print("llcc68: set gfsk modulation params failed.\n"); /* set gfsk modulation params failed */
2991 
2992  return 1; /* return error */
2993  }
2994 
2995  return 0; /* success return 0 */
2996 }
2997 
3014 uint8_t llcc68_set_lora_packet_params(llcc68_handle_t *handle, uint16_t preamble_length,
3015  llcc68_lora_header_t header_type, uint8_t payload_length,
3016  llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable)
3017 {
3018  uint8_t res;
3019  uint8_t buf[6];
3020 
3021  if (handle == NULL) /* check handle */
3022  {
3023  return 2; /* return error */
3024  }
3025  if (handle->inited != 1) /* check handle initialization */
3026  {
3027  return 3; /* return error */
3028  }
3029 
3030  res = a_llcc68_check_busy(handle); /* check busy */
3031  if (res != 0) /* check result */
3032  {
3033  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3034 
3035  return 4; /* return error */
3036  }
3037 
3038  buf[0] = (preamble_length >> 8) & 0xFF; /* set param */
3039  buf[1] = (preamble_length >> 0) & 0xFF; /* set param */
3040  buf[2] = header_type; /* set param */
3041  buf[3] = payload_length; /* set param */
3042  buf[4] = crc_type; /* set param */
3043  buf[5] = invert_iq_enable; /* set param */
3044  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_PACKET_PARAMS, (uint8_t *)buf, 6); /* write command */
3045  if (res != 0) /* check result */
3046  {
3047  handle->debug_print("llcc68: set lora modulation params failed.\n"); /* set lora modulation params failed */
3048 
3049  return 1; /* return error */
3050  }
3051 
3052  return 0; /* success return 0 */
3053 }
3054 
3071 uint8_t llcc68_set_cad_params(llcc68_handle_t *handle, llcc68_lora_cad_symbol_num_t num,
3072  uint8_t cad_det_peak, uint8_t cad_det_min, llcc68_lora_cad_exit_mode_t mode,
3073  uint32_t timeout)
3074 {
3075  uint8_t res;
3076  uint8_t buf[7];
3077 
3078  if (handle == NULL) /* check handle */
3079  {
3080  return 2; /* return error */
3081  }
3082  if (handle->inited != 1) /* check handle initialization */
3083  {
3084  return 3; /* return error */
3085  }
3086 
3087  res = a_llcc68_check_busy(handle); /* check busy */
3088  if (res != 0) /* check result */
3089  {
3090  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3091 
3092  return 4; /* return error */
3093  }
3094 
3095  buf[0] = num; /* set param */
3096  buf[1] = cad_det_peak; /* set param */
3097  buf[2] = cad_det_min; /* set param */
3098  buf[3] = mode; /* set param */
3099  buf[4] = (timeout >> 16) & 0xFF; /* set param */
3100  buf[5] = (timeout >> 8) & 0xFF; /* set param */
3101  buf[6] = (timeout >> 0) & 0xFF; /* set param */
3102  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_CAD_PARAMS, (uint8_t *)buf, 7); /* write command */
3103  if (res != 0) /* check result */
3104  {
3105  handle->debug_print("llcc68: set cad params failed.\n"); /* set cad params failed */
3106 
3107  return 1; /* return error */
3108  }
3109 
3110  return 0; /* success return 0 */
3111 }
3112 
3126 uint8_t llcc68_set_buffer_base_address(llcc68_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr)
3127 {
3128  uint8_t res;
3129  uint8_t buf[2];
3130 
3131  if (handle == NULL) /* check handle */
3132  {
3133  return 2; /* return error */
3134  }
3135  if (handle->inited != 1) /* check handle initialization */
3136  {
3137  return 3; /* return error */
3138  }
3139 
3140  res = a_llcc68_check_busy(handle); /* check busy */
3141  if (res != 0) /* check result */
3142  {
3143  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3144 
3145  return 4; /* return error */
3146  }
3147 
3148  buf[0] = tx_base_addr; /* set param */
3149  buf[1] = rx_base_addr; /* set param */
3150  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_BUFFER_BASE_ADDRESS, (uint8_t *)buf, 2); /* write command */
3151  if (res != 0) /* check result */
3152  {
3153  handle->debug_print("llcc68: set buffer base address failed.\n"); /* set buffer base address failed */
3154 
3155  return 1; /* return error */
3156  }
3157 
3158  return 0; /* success return 0 */
3159 }
3160 
3173 uint8_t llcc68_set_lora_symb_num_timeout(llcc68_handle_t *handle, uint8_t symb_num)
3174 {
3175  uint8_t res;
3176  uint8_t prev;
3177 
3178  if (handle == NULL) /* check handle */
3179  {
3180  return 2; /* return error */
3181  }
3182  if (handle->inited != 1) /* check handle initialization */
3183  {
3184  return 3; /* return error */
3185  }
3186 
3187  res = a_llcc68_check_busy(handle); /* check busy */
3188  if (res != 0) /* check result */
3189  {
3190  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3191 
3192  return 4; /* return error */
3193  }
3194 
3195  prev = symb_num; /* set param */
3196  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_SET_LORA_SYMB_NUM_TIMEOUT, (uint8_t *)&prev, 1); /* write command */
3197  if (res != 0) /* check result */
3198  {
3199  handle->debug_print("llcc68: set lora symb num timeout failed.\n"); /* set lora symb num timeout failed */
3200 
3201  return 1; /* return error */
3202  }
3203 
3204  return 0; /* success return 0 */
3205 }
3206 
3219 uint8_t llcc68_get_status(llcc68_handle_t *handle, uint8_t *status)
3220 {
3221  uint8_t res;
3222  uint8_t buf[1];
3223 
3224  if (handle == NULL) /* check handle */
3225  {
3226  return 2; /* return error */
3227  }
3228  if (handle->inited != 1) /* check handle initialization */
3229  {
3230  return 3; /* return error */
3231  }
3232 
3233  res = a_llcc68_check_busy(handle); /* check busy */
3234  if (res != 0) /* check result */
3235  {
3236  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3237 
3238  return 4; /* return error */
3239  }
3240 
3241  memset(buf, 0, sizeof(uint8_t) * 1); /* clear the buffer */
3242  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_STATUS, (uint8_t *)buf, 1); /* read command */
3243  if (res != 0) /* check result */
3244  {
3245  handle->debug_print("llcc68: get status failed.\n"); /* get status failed */
3246 
3247  return 1; /* return error */
3248  }
3249  *status = buf[0]; /* set status */
3250 
3251  return 0; /* success return 0 */
3252 }
3253 
3267 uint8_t llcc68_get_rx_buffer_status(llcc68_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer)
3268 {
3269  uint8_t res;
3270  uint8_t buf[3];
3271 
3272  if (handle == NULL) /* check handle */
3273  {
3274  return 2; /* return error */
3275  }
3276  if (handle->inited != 1) /* check handle initialization */
3277  {
3278  return 3; /* return error */
3279  }
3280 
3281  res = a_llcc68_check_busy(handle); /* check busy */
3282  if (res != 0) /* check result */
3283  {
3284  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3285 
3286  return 4; /* return error */
3287  }
3288 
3289  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_RX_BUFFER_STATUS, (uint8_t *)buf, 3); /* read command */
3290  if (res != 0) /* check result */
3291  {
3292  handle->debug_print("llcc68: get rx buffer status failed.\n"); /* get rx buffer status failed */
3293 
3294  return 1; /* return error */
3295  }
3296  *payload_length_rx = buf[1]; /* set status */
3297  *rx_start_buffer_pointer = buf[2]; /* set status */
3298 
3299  return 0; /* success return 0 */
3300 }
3301 
3318 uint8_t llcc68_get_gfsk_packet_status(llcc68_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw,
3319  uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg)
3320 {
3321  uint8_t res;
3322  uint8_t buf[4];
3323 
3324  if (handle == NULL) /* check handle */
3325  {
3326  return 2; /* return error */
3327  }
3328  if (handle->inited != 1) /* check handle initialization */
3329  {
3330  return 3; /* return error */
3331  }
3332 
3333  res = a_llcc68_check_busy(handle); /* check busy */
3334  if (res != 0) /* check result */
3335  {
3336  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3337 
3338  return 4; /* return error */
3339  }
3340 
3341  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_PACKET_STATUS, (uint8_t *)buf, 4); /* read command */
3342  if (res != 0) /* check result */
3343  {
3344  handle->debug_print("llcc68: get packet status failed.\n"); /* get packet status failed */
3345 
3346  return 1; /* return error */
3347  }
3348  *rx_status= buf[1]; /* set status */
3349  *rssi_sync_raw = buf[2]; /* set status */
3350  *rssi_avg_raw = buf[3]; /* set status */
3351  *rssi_sync = -(float)(*rssi_sync_raw) / 2.0f; /* set status */
3352  *rssi_avg = -(float)(*rssi_avg_raw) / 2.0f; /* set status */
3353 
3354  return 0; /* success return 0 */
3355 }
3356 
3374 uint8_t llcc68_get_lora_packet_status(llcc68_handle_t *handle, uint8_t *rssi_pkt_raw, uint8_t *snr_pkt_raw,
3375  uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt)
3376 {
3377  uint8_t res;
3378  uint8_t buf[4];
3379 
3380  if (handle == NULL) /* check handle */
3381  {
3382  return 2; /* return error */
3383  }
3384  if (handle->inited != 1) /* check handle initialization */
3385  {
3386  return 3; /* return error */
3387  }
3388 
3389  res = a_llcc68_check_busy(handle); /* check busy */
3390  if (res != 0) /* check result */
3391  {
3392  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3393 
3394  return 4; /* return error */
3395  }
3396 
3397  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_PACKET_STATUS, (uint8_t *)buf, 4); /* read command */
3398  if (res != 0) /* check result */
3399  {
3400  handle->debug_print("llcc68: get packet status failed.\n"); /* get packet status failed */
3401 
3402  return 1; /* return error */
3403  }
3404  *rssi_pkt_raw= buf[1]; /* set status */
3405  *snr_pkt_raw = buf[2]; /* set status */
3406  *signal_rssi_pkt_raw = buf[3]; /* set status */
3407  *rssi_pkt = -(float)(*rssi_pkt_raw) / 2.0f; /* set status */
3408  *snr_pkt = (float)(*snr_pkt_raw) / 4.0f; /* set status */
3409  *signal_rssi_pkt = -(float)(*signal_rssi_pkt_raw) / 2.0f; /* set status */
3410 
3411  return 0; /* success return 0 */
3412 }
3413 
3427 uint8_t llcc68_get_instantaneous_rssi(llcc68_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst)
3428 {
3429  uint8_t res;
3430  uint8_t buf[2];
3431 
3432  if (handle == NULL) /* check handle */
3433  {
3434  return 2; /* return error */
3435  }
3436  if (handle->inited != 1) /* check handle initialization */
3437  {
3438  return 3; /* return error */
3439  }
3440 
3441  res = a_llcc68_check_busy(handle); /* check busy */
3442  if (res != 0) /* check result */
3443  {
3444  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3445 
3446  return 4; /* return error */
3447  }
3448 
3449  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_RSSI_LNST, (uint8_t *)buf, 2); /* read command */
3450  if (res != 0) /* check result */
3451  {
3452  handle->debug_print("llcc68: get instantaneous rssi failed.\n"); /* get instantaneous rssi failed */
3453 
3454  return 1; /* return error */
3455  }
3456  *rssi_inst_raw = buf[1]; /* set status */
3457  *rssi_inst = -(float)(*rssi_inst_raw) / 2.0f; /* set status */
3458 
3459  return 0; /* success return 0 */
3460 }
3461 
3476 uint8_t llcc68_get_stats(llcc68_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error)
3477 {
3478  uint8_t res;
3479  uint8_t buf[7];
3480 
3481  if (handle == NULL) /* check handle */
3482  {
3483  return 2; /* return error */
3484  }
3485  if (handle->inited != 1) /* check handle initialization */
3486  {
3487  return 3; /* return error */
3488  }
3489 
3490  res = a_llcc68_check_busy(handle); /* check busy */
3491  if (res != 0) /* check result */
3492  {
3493  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3494 
3495  return 4; /* return error */
3496  }
3497 
3498  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_STATS, (uint8_t *)buf, 7); /* read command */
3499  if (res != 0) /* check result */
3500  {
3501  handle->debug_print("llcc68: get stats failed.\n"); /* get stats failed */
3502 
3503  return 1; /* return error */
3504  }
3505  *pkt_received = (uint16_t)(((uint16_t)buf[1] << 8) | buf[2]); /* set status */
3506  *pkt_crc_error = (uint16_t)(((uint16_t)buf[3] << 8) | buf[4]); /* set status */
3507  *pkt_length_header_error = (uint16_t)(((uint16_t)buf[5] << 8) | buf[6]); /* set status */
3508 
3509  return 0; /* success return 0 */
3510 }
3511 
3526 uint8_t llcc68_reset_stats(llcc68_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error)
3527 {
3528  uint8_t res;
3529  uint8_t buf[6];
3530 
3531  if (handle == NULL) /* check handle */
3532  {
3533  return 2; /* return error */
3534  }
3535  if (handle->inited != 1) /* check handle initialization */
3536  {
3537  return 3; /* return error */
3538  }
3539 
3540  res = a_llcc68_check_busy(handle); /* check busy */
3541  if (res != 0) /* check result */
3542  {
3543  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3544 
3545  return 4; /* return error */
3546  }
3547 
3548  buf[0] = (pkt_received >> 8) & 0xFF; /* set status */
3549  buf[1] = (pkt_received >> 0) & 0xFF; /* set status */
3550  buf[2] = (pkt_crc_error >> 8) & 0xFF; /* set status */
3551  buf[3] = (pkt_crc_error >> 0) & 0xFF; /* set status */
3552  buf[4] = (pkt_length_header_error >> 8) & 0xFF; /* set status */
3553  buf[5] = (pkt_length_header_error >> 0) & 0xFF; /* set status */
3554  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_RESET_STATS, (uint8_t *)buf, 6); /* write command */
3555  if (res != 0) /* check result */
3556  {
3557  handle->debug_print("llcc68: reset stats failed.\n"); /* reset stats failed */
3558 
3559  return 1; /* return error */
3560  }
3561 
3562  return 0; /* success return 0 */
3563 }
3564 
3577 uint8_t llcc68_get_device_errors(llcc68_handle_t *handle, uint16_t *op_error)
3578 {
3579  uint8_t res;
3580  uint8_t buf[3];
3581 
3582  if (handle == NULL) /* check handle */
3583  {
3584  return 2; /* return error */
3585  }
3586  if (handle->inited != 1) /* check handle initialization */
3587  {
3588  return 3; /* return error */
3589  }
3590 
3591  res = a_llcc68_check_busy(handle); /* check busy */
3592  if (res != 0) /* check result */
3593  {
3594  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3595 
3596  return 4; /* return error */
3597  }
3598 
3599  res = a_llcc68_spi_read(handle, LLCC68_COMMAND_GET_DEVICE_ERRORS, (uint8_t *)buf, 3); /* read command */
3600  if (res != 0) /* check result */
3601  {
3602  handle->debug_print("llcc68: get device errors failed.\n"); /* get device errors failed */
3603 
3604  return 1; /* return error */
3605  }
3606  *op_error = (uint16_t)(((uint16_t)buf[1] << 8) | buf[2]); /* set status */
3607 
3608  return 0; /* success return 0 */
3609 }
3610 
3622 uint8_t llcc68_clear_device_errors(llcc68_handle_t *handle)
3623 {
3624  uint8_t res;
3625  uint8_t buf[2];
3626 
3627  if (handle == NULL) /* check handle */
3628  {
3629  return 2; /* return error */
3630  }
3631  if (handle->inited != 1) /* check handle initialization */
3632  {
3633  return 3; /* return error */
3634  }
3635 
3636  res = a_llcc68_check_busy(handle); /* check busy */
3637  if (res != 0) /* check result */
3638  {
3639  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3640 
3641  return 4; /* return error */
3642  }
3643 
3644  buf[0] = 0x00; /* set status */
3645  buf[1] = 0x00; /* set status */
3646  res = a_llcc68_spi_write(handle, LLCC68_COMMAND_CLEAR_DEVICE_ERRORS, (uint8_t *)buf, 2); /* write command */
3647  if (res != 0) /* check result */
3648  {
3649  handle->debug_print("llcc68: clear device errors failed.\n"); /* clear device errors failed */
3650 
3651  return 1; /* return error */
3652  }
3653 
3654  return 0; /* success return 0 */
3655 }
3656 
3669 uint8_t llcc68_set_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t value)
3670 {
3671  uint8_t res;
3672  uint8_t buf[2];
3673 
3674  if (handle == NULL) /* check handle */
3675  {
3676  return 2; /* return error */
3677  }
3678  if (handle->inited != 1) /* check handle initialization */
3679  {
3680  return 3; /* return error */
3681  }
3682 
3683  res = a_llcc68_check_busy(handle); /* check busy */
3684  if (res != 0) /* check result */
3685  {
3686  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3687 
3688  return 4; /* return error */
3689  }
3690 
3691  buf[0] = (value >> 8) & 0xFF; /* set msb */
3692  buf[1] = (value >> 0) & 0xFF; /* set lsb */
3693  res = a_llcc68_spi_write_register(handle, LLCC68_REG_WHITENING_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* write register */
3694  if (res != 0) /* check result */
3695  {
3696  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
3697 
3698  return 1; /* return error */
3699  }
3700 
3701  return 0; /* success return 0 */
3702 }
3703 
3716 uint8_t llcc68_get_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t *value)
3717 {
3718  uint8_t res;
3719  uint8_t buf[2];
3720 
3721  if (handle == NULL) /* check handle */
3722  {
3723  return 2; /* return error */
3724  }
3725  if (handle->inited != 1) /* check handle initialization */
3726  {
3727  return 3; /* return error */
3728  }
3729 
3730  res = a_llcc68_check_busy(handle); /* check busy */
3731  if (res != 0) /* check result */
3732  {
3733  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3734 
3735  return 4; /* return error */
3736  }
3737 
3738  res = a_llcc68_spi_read_register(handle, LLCC68_REG_WHITENING_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* read register */
3739  if (res != 0) /* check result */
3740  {
3741  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
3742 
3743  return 1; /* return error */
3744  }
3745  *value = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
3746 
3747  return 0; /* success return 0 */
3748 }
3749 
3762 uint8_t llcc68_set_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t value)
3763 {
3764  uint8_t res;
3765  uint8_t buf[2];
3766 
3767  if (handle == NULL) /* check handle */
3768  {
3769  return 2; /* return error */
3770  }
3771  if (handle->inited != 1) /* check handle initialization */
3772  {
3773  return 3; /* return error */
3774  }
3775 
3776  res = a_llcc68_check_busy(handle); /* check busy */
3777  if (res != 0) /* check result */
3778  {
3779  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3780 
3781  return 4; /* return error */
3782  }
3783 
3784  buf[0] = (value >> 8) & 0xFF; /* set msb */
3785  buf[1] = (value >> 0) & 0xFF; /* set lsb */
3786  res = a_llcc68_spi_write_register(handle, LLCC68_REG_CRC_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* write register */
3787  if (res != 0) /* check result */
3788  {
3789  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
3790 
3791  return 1; /* return error */
3792  }
3793 
3794  return 0; /* success return 0 */
3795 }
3796 
3809 uint8_t llcc68_get_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t *value)
3810 {
3811  uint8_t res;
3812  uint8_t buf[2];
3813 
3814  if (handle == NULL) /* check handle */
3815  {
3816  return 2; /* return error */
3817  }
3818  if (handle->inited != 1) /* check handle initialization */
3819  {
3820  return 3; /* return error */
3821  }
3822 
3823  res = a_llcc68_check_busy(handle); /* check busy */
3824  if (res != 0) /* check result */
3825  {
3826  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3827 
3828  return 4; /* return error */
3829  }
3830 
3831  res = a_llcc68_spi_read_register(handle, LLCC68_REG_CRC_INIT_VALUE_MSB, (uint8_t *)buf, 2); /* read register */
3832  if (res != 0) /* check result */
3833  {
3834  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
3835 
3836  return 1; /* return error */
3837  }
3838  *value = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
3839 
3840  return 0; /* success return 0 */
3841 }
3842 
3855 uint8_t llcc68_set_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t value)
3856 {
3857  uint8_t res;
3858  uint8_t buf[2];
3859 
3860  if (handle == NULL) /* check handle */
3861  {
3862  return 2; /* return error */
3863  }
3864  if (handle->inited != 1) /* check handle initialization */
3865  {
3866  return 3; /* return error */
3867  }
3868 
3869  res = a_llcc68_check_busy(handle); /* check busy */
3870  if (res != 0) /* check result */
3871  {
3872  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3873 
3874  return 4; /* return error */
3875  }
3876 
3877  buf[0] = (value >> 8) & 0xFF; /* set msb */
3878  buf[1] = (value >> 0) & 0xFF; /* set lsb */
3879  res = a_llcc68_spi_write_register(handle, LLCC68_REG_CRC_POLYNOMIAL_VALUE_MSB, (uint8_t *)buf, 2); /* write register */
3880  if (res != 0) /* check result */
3881  {
3882  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
3883 
3884  return 1; /* return error */
3885  }
3886 
3887  return 0; /* success return 0 */
3888 }
3889 
3902 uint8_t llcc68_get_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t *value)
3903 {
3904  uint8_t res;
3905  uint8_t buf[2];
3906 
3907  if (handle == NULL) /* check handle */
3908  {
3909  return 2; /* return error */
3910  }
3911  if (handle->inited != 1) /* check handle initialization */
3912  {
3913  return 3; /* return error */
3914  }
3915 
3916  res = a_llcc68_check_busy(handle); /* check busy */
3917  if (res != 0) /* check result */
3918  {
3919  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3920 
3921  return 4; /* return error */
3922  }
3923 
3924  res = a_llcc68_spi_read_register(handle, LLCC68_REG_CRC_POLYNOMIAL_VALUE_MSB, (uint8_t *)buf, 2); /* read register */
3925  if (res != 0) /* check result */
3926  {
3927  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
3928 
3929  return 1; /* return error */
3930  }
3931  *value = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
3932 
3933  return 0; /* success return 0 */
3934 }
3935 
3948 uint8_t llcc68_set_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8])
3949 {
3950  uint8_t res;
3951 
3952  if (handle == NULL) /* check handle */
3953  {
3954  return 2; /* return error */
3955  }
3956  if (handle->inited != 1) /* check handle initialization */
3957  {
3958  return 3; /* return error */
3959  }
3960 
3961  res = a_llcc68_check_busy(handle); /* check busy */
3962  if (res != 0) /* check result */
3963  {
3964  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
3965 
3966  return 4; /* return error */
3967  }
3968 
3969  res = a_llcc68_spi_write_register(handle, LLCC68_REG_SYNC_WORD_0, (uint8_t *)sync_word, 8); /* write register */
3970  if (res != 0) /* check result */
3971  {
3972  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
3973 
3974  return 1; /* return error */
3975  }
3976 
3977  return 0; /* success return 0 */
3978 }
3979 
3992 uint8_t llcc68_get_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8])
3993 {
3994  uint8_t res;
3995 
3996  if (handle == NULL) /* check handle */
3997  {
3998  return 2; /* return error */
3999  }
4000  if (handle->inited != 1) /* check handle initialization */
4001  {
4002  return 3; /* return error */
4003  }
4004 
4005  res = a_llcc68_check_busy(handle); /* check busy */
4006  if (res != 0) /* check result */
4007  {
4008  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4009 
4010  return 4; /* return error */
4011  }
4012 
4013  res = a_llcc68_spi_read_register(handle, LLCC68_REG_SYNC_WORD_0, (uint8_t *)sync_word, 8); /* read register */
4014  if (res != 0) /* check result */
4015  {
4016  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4017 
4018  return 1; /* return error */
4019  }
4020 
4021  return 0; /* success return 0 */
4022 }
4023 
4036 uint8_t llcc68_set_fsk_node_address(llcc68_handle_t *handle, uint8_t addr)
4037 {
4038  uint8_t res;
4039 
4040  if (handle == NULL) /* check handle */
4041  {
4042  return 2; /* return error */
4043  }
4044  if (handle->inited != 1) /* check handle initialization */
4045  {
4046  return 3; /* return error */
4047  }
4048 
4049  res = a_llcc68_check_busy(handle); /* check busy */
4050  if (res != 0) /* check result */
4051  {
4052  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4053 
4054  return 4; /* return error */
4055  }
4056 
4057  res = a_llcc68_spi_write_register(handle, LLCC68_REG_NODE_ADDRESS, (uint8_t *)&addr, 1); /* write register */
4058  if (res != 0) /* check result */
4059  {
4060  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4061 
4062  return 1; /* return error */
4063  }
4064 
4065  return 0; /* success return 0 */
4066 }
4067 
4080 uint8_t llcc68_get_fsk_node_address(llcc68_handle_t *handle, uint8_t *addr)
4081 {
4082  uint8_t res;
4083 
4084  if (handle == NULL) /* check handle */
4085  {
4086  return 2; /* return error */
4087  }
4088  if (handle->inited != 1) /* check handle initialization */
4089  {
4090  return 3; /* return error */
4091  }
4092 
4093  res = a_llcc68_check_busy(handle); /* check busy */
4094  if (res != 0) /* check result */
4095  {
4096  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4097 
4098  return 4; /* return error */
4099  }
4100 
4101  res = a_llcc68_spi_read_register(handle, LLCC68_REG_NODE_ADDRESS, (uint8_t *)addr, 1); /* read register */
4102  if (res != 0) /* check result */
4103  {
4104  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4105 
4106  return 1; /* return error */
4107  }
4108 
4109  return 0; /* success return 0 */
4110 }
4111 
4124 uint8_t llcc68_set_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t addr)
4125 {
4126  uint8_t res;
4127 
4128  if (handle == NULL) /* check handle */
4129  {
4130  return 2; /* return error */
4131  }
4132  if (handle->inited != 1) /* check handle initialization */
4133  {
4134  return 3; /* return error */
4135  }
4136 
4137  res = a_llcc68_check_busy(handle); /* check busy */
4138  if (res != 0) /* check result */
4139  {
4140  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4141 
4142  return 4; /* return error */
4143  }
4144 
4145  res = a_llcc68_spi_write_register(handle, LLCC68_REG_BROADCAST_ADDRESS, (uint8_t *)&addr, 1); /* write register */
4146  if (res != 0) /* check result */
4147  {
4148  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4149 
4150  return 1; /* return error */
4151  }
4152 
4153  return 0; /* success return 0 */
4154 }
4155 
4168 uint8_t llcc68_get_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t *addr)
4169 {
4170  uint8_t res;
4171 
4172  if (handle == NULL) /* check handle */
4173  {
4174  return 2; /* return error */
4175  }
4176  if (handle->inited != 1) /* check handle initialization */
4177  {
4178  return 3; /* return error */
4179  }
4180 
4181  res = a_llcc68_check_busy(handle); /* check busy */
4182  if (res != 0) /* check result */
4183  {
4184  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4185 
4186  return 4; /* return error */
4187  }
4188 
4189  res = a_llcc68_spi_read_register(handle, LLCC68_REG_BROADCAST_ADDRESS, (uint8_t *)addr, 1); /* read register */
4190  if (res != 0) /* check result */
4191  {
4192  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4193 
4194  return 1; /* return error */
4195  }
4196 
4197  return 0; /* success return 0 */
4198 }
4199 
4212 uint8_t llcc68_set_iq_polarity(llcc68_handle_t *handle, uint8_t setup)
4213 {
4214  uint8_t res;
4215 
4216  if (handle == NULL) /* check handle */
4217  {
4218  return 2; /* return error */
4219  }
4220  if (handle->inited != 1) /* check handle initialization */
4221  {
4222  return 3; /* return error */
4223  }
4224 
4225  res = a_llcc68_check_busy(handle); /* check busy */
4226  if (res != 0) /* check result */
4227  {
4228  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4229 
4230  return 4; /* return error */
4231  }
4232 
4233  res = a_llcc68_spi_write_register(handle, LLCC68_REG_IQ_POLARITY_SETUP, (uint8_t *)&setup, 1); /* write register */
4234  if (res != 0) /* check result */
4235  {
4236  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4237 
4238  return 1; /* return error */
4239  }
4240 
4241  return 0; /* success return 0 */
4242 }
4243 
4256 uint8_t llcc68_get_iq_polarity(llcc68_handle_t *handle, uint8_t *setup)
4257 {
4258  uint8_t res;
4259 
4260  if (handle == NULL) /* check handle */
4261  {
4262  return 2; /* return error */
4263  }
4264  if (handle->inited != 1) /* check handle initialization */
4265  {
4266  return 3; /* return error */
4267  }
4268 
4269  res = a_llcc68_check_busy(handle); /* check busy */
4270  if (res != 0) /* check result */
4271  {
4272  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4273 
4274  return 4; /* return error */
4275  }
4276 
4277  res = a_llcc68_spi_read_register(handle, LLCC68_REG_IQ_POLARITY_SETUP, (uint8_t *)setup, 1); /* read register */
4278  if (res != 0) /* check result */
4279  {
4280  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4281 
4282  return 1; /* return error */
4283  }
4284 
4285  return 0; /* success return 0 */
4286 }
4287 
4300 uint8_t llcc68_set_lora_sync_word(llcc68_handle_t *handle, uint16_t sync_word)
4301 {
4302  uint8_t res;
4303  uint8_t buf[2];
4304 
4305  if (handle == NULL) /* check handle */
4306  {
4307  return 2; /* return error */
4308  }
4309  if (handle->inited != 1) /* check handle initialization */
4310  {
4311  return 3; /* return error */
4312  }
4313 
4314  res = a_llcc68_check_busy(handle); /* check busy */
4315  if (res != 0) /* check result */
4316  {
4317  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4318 
4319  return 4; /* return error */
4320  }
4321 
4322  buf[0] = (sync_word >> 8) & 0xFF; /* set msb */
4323  buf[1] = (sync_word >> 0) & 0xFF; /* set lsb */
4324  res = a_llcc68_spi_write_register(handle, LLCC68_REG_LORA_SYNC_WORD_MSB, (uint8_t *)buf, 2); /* write register */
4325  if (res != 0) /* check result */
4326  {
4327  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4328 
4329  return 1; /* return error */
4330  }
4331 
4332  return 0; /* success return 0 */
4333 }
4334 
4347 uint8_t llcc68_get_lora_sync_word(llcc68_handle_t *handle, uint16_t *sync_word)
4348 {
4349  uint8_t res;
4350  uint8_t buf[2];
4351 
4352  if (handle == NULL) /* check handle */
4353  {
4354  return 2; /* return error */
4355  }
4356  if (handle->inited != 1) /* check handle initialization */
4357  {
4358  return 3; /* return error */
4359  }
4360 
4361  res = a_llcc68_check_busy(handle); /* check busy */
4362  if (res != 0) /* check result */
4363  {
4364  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4365 
4366  return 4; /* return error */
4367  }
4368 
4369  res = a_llcc68_spi_read_register(handle, LLCC68_REG_LORA_SYNC_WORD_MSB, (uint8_t *)buf, 2); /* read register */
4370  if (res != 0) /* check result */
4371  {
4372  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4373 
4374  return 1; /* return error */
4375  }
4376  *sync_word = (uint16_t)((uint16_t)buf[0] << 8 | buf[1]); /* set value */
4377 
4378  return 0; /* success return 0 */
4379 }
4380 
4393 uint8_t llcc68_get_random_number(llcc68_handle_t *handle, uint32_t *r)
4394 {
4395  uint8_t res;
4396  uint8_t buf[4];
4397 
4398  if (handle == NULL) /* check handle */
4399  {
4400  return 2; /* return error */
4401  }
4402  if (handle->inited != 1) /* check handle initialization */
4403  {
4404  return 3; /* return error */
4405  }
4406 
4407  res = a_llcc68_check_busy(handle); /* check busy */
4408  if (res != 0) /* check result */
4409  {
4410  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4411 
4412  return 4; /* return error */
4413  }
4414 
4415  res = a_llcc68_spi_read_register(handle, LLCC68_REG_RANDOM_NUMBER_GEN_0, (uint8_t *)buf, 4); /* read register */
4416  if (res != 0) /* check result */
4417  {
4418  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4419 
4420  return 1; /* return error */
4421  }
4422  *r = (uint32_t)((uint32_t)buf[0] << 24 | (uint32_t)buf[1] << 16 |
4423  (uint32_t)buf[2] << 8 | buf[3]); /* set rand */
4424 
4425  return 0; /* success return 0 */
4426 }
4427 
4440 uint8_t llcc68_set_tx_modulation(llcc68_handle_t *handle, uint8_t modulation)
4441 {
4442  uint8_t res;
4443 
4444  if (handle == NULL) /* check handle */
4445  {
4446  return 2; /* return error */
4447  }
4448  if (handle->inited != 1) /* check handle initialization */
4449  {
4450  return 3; /* return error */
4451  }
4452 
4453  res = a_llcc68_check_busy(handle); /* check busy */
4454  if (res != 0) /* check result */
4455  {
4456  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4457 
4458  return 4; /* return error */
4459  }
4460 
4461  res = a_llcc68_spi_write_register(handle, LLCC68_REG_TX_MODULATION, (uint8_t *)&modulation, 1); /* write register */
4462  if (res != 0) /* check result */
4463  {
4464  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4465 
4466  return 1; /* return error */
4467  }
4468 
4469  return 0; /* success return 0 */
4470 }
4471 
4484 uint8_t llcc68_get_tx_modulation(llcc68_handle_t *handle, uint8_t *modulation)
4485 {
4486  uint8_t res;
4487 
4488  if (handle == NULL) /* check handle */
4489  {
4490  return 2; /* return error */
4491  }
4492  if (handle->inited != 1) /* check handle initialization */
4493  {
4494  return 3; /* return error */
4495  }
4496 
4497  res = a_llcc68_check_busy(handle); /* check busy */
4498  if (res != 0) /* check result */
4499  {
4500  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4501 
4502  return 4; /* return error */
4503  }
4504 
4505  res = a_llcc68_spi_read_register(handle, LLCC68_REG_TX_MODULATION, (uint8_t *)modulation, 1); /* read register */
4506  if (res != 0) /* check result */
4507  {
4508  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4509 
4510  return 1; /* return error */
4511  }
4512 
4513  return 0; /* success return 0 */
4514 }
4515 
4528 uint8_t llcc68_set_rx_gain(llcc68_handle_t *handle, uint8_t gain)
4529 {
4530  uint8_t res;
4531 
4532  if (handle == NULL) /* check handle */
4533  {
4534  return 2; /* return error */
4535  }
4536  if (handle->inited != 1) /* check handle initialization */
4537  {
4538  return 3; /* return error */
4539  }
4540 
4541  res = a_llcc68_check_busy(handle); /* check busy */
4542  if (res != 0) /* check result */
4543  {
4544  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4545 
4546  return 4; /* return error */
4547  }
4548 
4549  res = a_llcc68_spi_write_register(handle, LLCC68_REG_RX_GAIN, (uint8_t *)&gain, 1); /* write register */
4550  if (res != 0) /* check result */
4551  {
4552  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4553 
4554  return 1; /* return error */
4555  }
4556 
4557  return 0; /* success return 0 */
4558 }
4559 
4572 uint8_t llcc68_get_rx_gain(llcc68_handle_t *handle, uint8_t *gain)
4573 {
4574  uint8_t res;
4575 
4576  if (handle == NULL) /* check handle */
4577  {
4578  return 2; /* return error */
4579  }
4580  if (handle->inited != 1) /* check handle initialization */
4581  {
4582  return 3; /* return error */
4583  }
4584 
4585  res = a_llcc68_check_busy(handle); /* check busy */
4586  if (res != 0) /* check result */
4587  {
4588  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4589 
4590  return 4; /* return error */
4591  }
4592 
4593  res = a_llcc68_spi_read_register(handle, LLCC68_REG_RX_GAIN, (uint8_t *)gain, 1); /* read register */
4594  if (res != 0) /* check result */
4595  {
4596  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4597 
4598  return 1; /* return error */
4599  }
4600 
4601  return 0; /* success return 0 */
4602 }
4603 
4616 uint8_t llcc68_set_tx_clamp_config(llcc68_handle_t *handle, uint8_t config)
4617 {
4618  uint8_t res;
4619 
4620  if (handle == NULL) /* check handle */
4621  {
4622  return 2; /* return error */
4623  }
4624  if (handle->inited != 1) /* check handle initialization */
4625  {
4626  return 3; /* return error */
4627  }
4628 
4629  res = a_llcc68_check_busy(handle); /* check busy */
4630  if (res != 0) /* check result */
4631  {
4632  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4633 
4634  return 4; /* return error */
4635  }
4636 
4637  res = a_llcc68_spi_write_register(handle, LLCC68_REG_TX_CLAMP_CONFIG, (uint8_t *)&config, 1); /* write register */
4638  if (res != 0) /* check result */
4639  {
4640  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4641 
4642  return 1; /* return error */
4643  }
4644 
4645  return 0; /* success return 0 */
4646 }
4647 
4660 uint8_t llcc68_get_tx_clamp_config(llcc68_handle_t *handle, uint8_t *config)
4661 {
4662  uint8_t res;
4663 
4664  if (handle == NULL) /* check handle */
4665  {
4666  return 2; /* return error */
4667  }
4668  if (handle->inited != 1) /* check handle initialization */
4669  {
4670  return 3; /* return error */
4671  }
4672 
4673  res = a_llcc68_check_busy(handle); /* check busy */
4674  if (res != 0) /* check result */
4675  {
4676  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4677 
4678  return 4; /* return error */
4679  }
4680 
4681  res = a_llcc68_spi_read_register(handle, LLCC68_REG_TX_CLAMP_CONFIG, (uint8_t *)config, 1); /* read register */
4682  if (res != 0) /* check result */
4683  {
4684  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4685 
4686  return 1; /* return error */
4687  }
4688 
4689  return 0; /* success return 0 */
4690 }
4691 
4704 uint8_t llcc68_set_ocp(llcc68_handle_t *handle, uint8_t ocp)
4705 {
4706  uint8_t res;
4707 
4708  if (handle == NULL) /* check handle */
4709  {
4710  return 2; /* return error */
4711  }
4712  if (handle->inited != 1) /* check handle initialization */
4713  {
4714  return 3; /* return error */
4715  }
4716 
4717  res = a_llcc68_check_busy(handle); /* check busy */
4718  if (res != 0) /* check result */
4719  {
4720  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4721 
4722  return 4; /* return error */
4723  }
4724 
4725  res = a_llcc68_spi_write_register(handle, LLCC68_REG_OCP_CONFIGURATION, (uint8_t *)&ocp, 1); /* write register */
4726  if (res != 0) /* check result */
4727  {
4728  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4729 
4730  return 1; /* return error */
4731  }
4732 
4733  return 0; /* success return 0 */
4734 }
4735 
4748 uint8_t llcc68_get_ocp(llcc68_handle_t *handle, uint8_t *ocp)
4749 {
4750  uint8_t res;
4751 
4752  if (handle == NULL) /* check handle */
4753  {
4754  return 2; /* return error */
4755  }
4756  if (handle->inited != 1) /* check handle initialization */
4757  {
4758  return 3; /* return error */
4759  }
4760 
4761  res = a_llcc68_check_busy(handle); /* check busy */
4762  if (res != 0) /* check result */
4763  {
4764  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4765 
4766  return 4; /* return error */
4767  }
4768 
4769  res = a_llcc68_spi_read_register(handle, LLCC68_REG_OCP_CONFIGURATION, (uint8_t *)ocp, 1); /* read register */
4770  if (res != 0) /* check result */
4771  {
4772  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4773 
4774  return 1; /* return error */
4775  }
4776 
4777  return 0; /* success return 0 */
4778 }
4779 
4792 uint8_t llcc68_set_rtc_control(llcc68_handle_t *handle, uint8_t control)
4793 {
4794  uint8_t res;
4795 
4796  if (handle == NULL) /* check handle */
4797  {
4798  return 2; /* return error */
4799  }
4800  if (handle->inited != 1) /* check handle initialization */
4801  {
4802  return 3; /* return error */
4803  }
4804 
4805  res = a_llcc68_check_busy(handle); /* check busy */
4806  if (res != 0) /* check result */
4807  {
4808  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4809 
4810  return 4; /* return error */
4811  }
4812 
4813  res = a_llcc68_spi_write_register(handle, LLCC68_REG_RTC_CONTROL, (uint8_t *)&control, 1); /* write register */
4814  if (res != 0) /* check result */
4815  {
4816  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4817 
4818  return 1; /* return error */
4819  }
4820 
4821  return 0; /* success return 0 */
4822 }
4823 
4836 uint8_t llcc68_get_rtc_control(llcc68_handle_t *handle, uint8_t *control)
4837 {
4838  uint8_t res;
4839 
4840  if (handle == NULL) /* check handle */
4841  {
4842  return 2; /* return error */
4843  }
4844  if (handle->inited != 1) /* check handle initialization */
4845  {
4846  return 3; /* return error */
4847  }
4848 
4849  res = a_llcc68_check_busy(handle); /* check busy */
4850  if (res != 0) /* check result */
4851  {
4852  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4853 
4854  return 4; /* return error */
4855  }
4856 
4857  res = a_llcc68_spi_read_register(handle, LLCC68_REG_RTC_CONTROL, (uint8_t *)control, 1); /* read register */
4858  if (res != 0) /* check result */
4859  {
4860  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4861 
4862  return 1; /* return error */
4863  }
4864 
4865  return 0; /* success return 0 */
4866 }
4867 
4880 uint8_t llcc68_set_xta_trim(llcc68_handle_t *handle, uint8_t trim)
4881 {
4882  uint8_t res;
4883 
4884  if (handle == NULL) /* check handle */
4885  {
4886  return 2; /* return error */
4887  }
4888  if (handle->inited != 1) /* check handle initialization */
4889  {
4890  return 3; /* return error */
4891  }
4892 
4893  res = a_llcc68_check_busy(handle); /* check busy */
4894  if (res != 0) /* check result */
4895  {
4896  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4897 
4898  return 4; /* return error */
4899  }
4900 
4901  res = a_llcc68_spi_write_register(handle, LLCC68_REG_XTA_TRIM, (uint8_t *)&trim, 1); /* write register */
4902  if (res != 0) /* check result */
4903  {
4904  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4905 
4906  return 1; /* return error */
4907  }
4908 
4909  return 0; /* success return 0 */
4910 }
4911 
4924 uint8_t llcc68_get_xta_trim(llcc68_handle_t *handle, uint8_t *trim)
4925 {
4926  uint8_t res;
4927 
4928  if (handle == NULL) /* check handle */
4929  {
4930  return 2; /* return error */
4931  }
4932  if (handle->inited != 1) /* check handle initialization */
4933  {
4934  return 3; /* return error */
4935  }
4936 
4937  res = a_llcc68_check_busy(handle); /* check busy */
4938  if (res != 0) /* check result */
4939  {
4940  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4941 
4942  return 4; /* return error */
4943  }
4944 
4945  res = a_llcc68_spi_read_register(handle, LLCC68_REG_XTA_TRIM, (uint8_t *)trim, 1); /* read register */
4946  if (res != 0) /* check result */
4947  {
4948  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
4949 
4950  return 1; /* return error */
4951  }
4952 
4953  return 0; /* success return 0 */
4954 }
4955 
4968 uint8_t llcc68_set_xtb_trim(llcc68_handle_t *handle, uint8_t trim)
4969 {
4970  uint8_t res;
4971 
4972  if (handle == NULL) /* check handle */
4973  {
4974  return 2; /* return error */
4975  }
4976  if (handle->inited != 1) /* check handle initialization */
4977  {
4978  return 3; /* return error */
4979  }
4980 
4981  res = a_llcc68_check_busy(handle); /* check busy */
4982  if (res != 0) /* check result */
4983  {
4984  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
4985 
4986  return 4; /* return error */
4987  }
4988 
4989  res = a_llcc68_spi_write_register(handle, LLCC68_REG_XTB_TRIM, (uint8_t *)&trim, 1); /* write register */
4990  if (res != 0) /* check result */
4991  {
4992  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
4993 
4994  return 1; /* return error */
4995  }
4996 
4997  return 0; /* success return 0 */
4998 }
4999 
5012 uint8_t llcc68_get_xtb_trim(llcc68_handle_t *handle, uint8_t *trim)
5013 {
5014  uint8_t res;
5015 
5016  if (handle == NULL) /* check handle */
5017  {
5018  return 2; /* return error */
5019  }
5020  if (handle->inited != 1) /* check handle initialization */
5021  {
5022  return 3; /* return error */
5023  }
5024 
5025  res = a_llcc68_check_busy(handle); /* check busy */
5026  if (res != 0) /* check result */
5027  {
5028  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5029 
5030  return 4; /* return error */
5031  }
5032 
5033  res = a_llcc68_spi_read_register(handle, LLCC68_REG_XTB_TRIM, (uint8_t *)trim, 1); /* read register */
5034  if (res != 0) /* check result */
5035  {
5036  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
5037 
5038  return 1; /* return error */
5039  }
5040 
5041  return 0; /* success return 0 */
5042 }
5043 
5056 uint8_t llcc68_set_dio3_output_control(llcc68_handle_t *handle, uint8_t control)
5057 {
5058  uint8_t res;
5059 
5060  if (handle == NULL) /* check handle */
5061  {
5062  return 2; /* return error */
5063  }
5064  if (handle->inited != 1) /* check handle initialization */
5065  {
5066  return 3; /* return error */
5067  }
5068 
5069  res = a_llcc68_check_busy(handle); /* check busy */
5070  if (res != 0) /* check result */
5071  {
5072  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5073 
5074  return 4; /* return error */
5075  }
5076 
5077  res = a_llcc68_spi_write_register(handle, LLCC68_REG_DIO3_OUTPUT_CONTROL, (uint8_t *)&control, 1); /* write register */
5078  if (res != 0) /* check result */
5079  {
5080  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
5081 
5082  return 1; /* return error */
5083  }
5084 
5085  return 0; /* success return 0 */
5086 }
5087 
5100 uint8_t llcc68_get_dio3_output_control(llcc68_handle_t *handle, uint8_t *control)
5101 {
5102  uint8_t res;
5103 
5104  if (handle == NULL) /* check handle */
5105  {
5106  return 2; /* return error */
5107  }
5108  if (handle->inited != 1) /* check handle initialization */
5109  {
5110  return 3; /* return error */
5111  }
5112 
5113  res = a_llcc68_check_busy(handle); /* check busy */
5114  if (res != 0) /* check result */
5115  {
5116  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5117 
5118  return 4; /* return error */
5119  }
5120 
5121  res = a_llcc68_spi_read_register(handle, LLCC68_REG_DIO3_OUTPUT_CONTROL, (uint8_t *)control, 1); /* read register */
5122  if (res != 0) /* check result */
5123  {
5124  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
5125 
5126  return 1; /* return error */
5127  }
5128 
5129  return 0; /* success return 0 */
5130 }
5131 
5144 uint8_t llcc68_set_event_mask(llcc68_handle_t *handle, uint8_t mask)
5145 {
5146  uint8_t res;
5147 
5148  if (handle == NULL) /* check handle */
5149  {
5150  return 2; /* return error */
5151  }
5152  if (handle->inited != 1) /* check handle initialization */
5153  {
5154  return 3; /* return error */
5155  }
5156 
5157  res = a_llcc68_check_busy(handle); /* check busy */
5158  if (res != 0) /* check result */
5159  {
5160  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5161 
5162  return 4; /* return error */
5163  }
5164 
5165  res = a_llcc68_spi_write_register(handle, LLCC68_REG_EVENT_MASK, (uint8_t *)&mask, 1); /* write register */
5166  if (res != 0) /* check result */
5167  {
5168  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
5169 
5170  return 1; /* return error */
5171  }
5172 
5173  return 0; /* success return 0 */
5174 }
5175 
5188 uint8_t llcc68_get_event_mask(llcc68_handle_t *handle, uint8_t *mask)
5189 {
5190  uint8_t res;
5191 
5192  if (handle == NULL) /* check handle */
5193  {
5194  return 2; /* return error */
5195  }
5196  if (handle->inited != 1) /* check handle initialization */
5197  {
5198  return 3; /* return error */
5199  }
5200 
5201  res = a_llcc68_check_busy(handle); /* check busy */
5202  if (res != 0) /* check result */
5203  {
5204  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5205 
5206  return 4; /* return error */
5207  }
5208 
5209  res = a_llcc68_spi_read_register(handle, LLCC68_REG_EVENT_MASK, (uint8_t *)mask, 1); /* read register */
5210  if (res != 0) /* check result */
5211  {
5212  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
5213 
5214  return 1; /* return error */
5215  }
5216 
5217  return 0; /* success return 0 */
5218 }
5219 
5232 uint8_t llcc68_set_dio_output_enable(llcc68_handle_t *handle, uint8_t enable)
5233 {
5234  uint8_t res;
5235 
5236  if (handle == NULL) /* check handle */
5237  {
5238  return 2; /* return error */
5239  }
5240  if (handle->inited != 1) /* check handle initialization */
5241  {
5242  return 3; /* return error */
5243  }
5244 
5245  res = a_llcc68_check_busy(handle); /* check busy */
5246  if (res != 0) /* check result */
5247  {
5248  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5249 
5250  return 4; /* return error */
5251  }
5252 
5253  res = a_llcc68_spi_write_register(handle, LLCC68_REG_DIOX_OUTPUT_ENABLE, (uint8_t *)&enable, 1); /* write register */
5254  if (res != 0) /* check result */
5255  {
5256  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
5257 
5258  return 1; /* return error */
5259  }
5260 
5261  return 0; /* success return 0 */
5262 }
5263 
5276 uint8_t llcc68_get_dio_output_enable(llcc68_handle_t *handle, uint8_t *enable)
5277 {
5278  uint8_t res;
5279 
5280  if (handle == NULL) /* check handle */
5281  {
5282  return 2; /* return error */
5283  }
5284  if (handle->inited != 1) /* check handle initialization */
5285  {
5286  return 3; /* return error */
5287  }
5288 
5289  res = a_llcc68_check_busy(handle); /* check busy */
5290  if (res != 0) /* check result */
5291  {
5292  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5293 
5294  return 4; /* return error */
5295  }
5296 
5297  res = a_llcc68_spi_read_register(handle, LLCC68_REG_DIOX_OUTPUT_ENABLE, (uint8_t *)enable, 1); /* read register */
5298  if (res != 0) /* check result */
5299  {
5300  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
5301 
5302  return 1; /* return error */
5303  }
5304 
5305  return 0; /* success return 0 */
5306 }
5307 
5320 uint8_t llcc68_set_dio_input_enable(llcc68_handle_t *handle, uint8_t enable)
5321 {
5322  uint8_t res;
5323 
5324  if (handle == NULL) /* check handle */
5325  {
5326  return 2; /* return error */
5327  }
5328  if (handle->inited != 1) /* check handle initialization */
5329  {
5330  return 3; /* return error */
5331  }
5332 
5333  res = a_llcc68_check_busy(handle); /* check busy */
5334  if (res != 0) /* check result */
5335  {
5336  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5337 
5338  return 4; /* return error */
5339  }
5340 
5341  res = a_llcc68_spi_write_register(handle, LLCC68_REG_DIOX_INPUT_ENABLE, (uint8_t *)&enable, 1); /* write register */
5342  if (res != 0) /* check result */
5343  {
5344  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
5345 
5346  return 1; /* return error */
5347  }
5348 
5349  return 0; /* success return 0 */
5350 }
5351 
5364 uint8_t llcc68_get_dio_input_enable(llcc68_handle_t *handle, uint8_t *enable)
5365 {
5366  uint8_t res;
5367 
5368  if (handle == NULL) /* check handle */
5369  {
5370  return 2; /* return error */
5371  }
5372  if (handle->inited != 1) /* check handle initialization */
5373  {
5374  return 3; /* return error */
5375  }
5376 
5377  res = a_llcc68_check_busy(handle); /* check busy */
5378  if (res != 0) /* check result */
5379  {
5380  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5381 
5382  return 4; /* return error */
5383  }
5384 
5385  res = a_llcc68_spi_read_register(handle, LLCC68_REG_DIOX_INPUT_ENABLE, (uint8_t *)enable, 1); /* read register */
5386  if (res != 0) /* check result */
5387  {
5388  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
5389 
5390  return 1; /* return error */
5391  }
5392 
5393  return 0; /* success return 0 */
5394 }
5395 
5408 uint8_t llcc68_set_pull_up_control(llcc68_handle_t *handle, uint8_t control)
5409 {
5410  uint8_t res;
5411 
5412  if (handle == NULL) /* check handle */
5413  {
5414  return 2; /* return error */
5415  }
5416  if (handle->inited != 1) /* check handle initialization */
5417  {
5418  return 3; /* return error */
5419  }
5420 
5421  res = a_llcc68_check_busy(handle); /* check busy */
5422  if (res != 0) /* check result */
5423  {
5424  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5425 
5426  return 4; /* return error */
5427  }
5428 
5429  res = a_llcc68_spi_write_register(handle, LLCC68_REG_DIOX_PULL_UP_CONTROL, (uint8_t *)&control, 1); /* write register */
5430  if (res != 0) /* check result */
5431  {
5432  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
5433 
5434  return 1; /* return error */
5435  }
5436 
5437  return 0; /* success return 0 */
5438 }
5439 
5452 uint8_t llcc68_get_pull_up_control(llcc68_handle_t *handle, uint8_t *control)
5453 {
5454  uint8_t res;
5455 
5456  if (handle == NULL) /* check handle */
5457  {
5458  return 2; /* return error */
5459  }
5460  if (handle->inited != 1) /* check handle initialization */
5461  {
5462  return 3; /* return error */
5463  }
5464 
5465  res = a_llcc68_check_busy(handle); /* check busy */
5466  if (res != 0) /* check result */
5467  {
5468  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5469 
5470  return 4; /* return error */
5471  }
5472 
5473  res = a_llcc68_spi_read_register(handle, LLCC68_REG_DIOX_PULL_UP_CONTROL, (uint8_t *)control, 1); /* read register */
5474  if (res != 0) /* check result */
5475  {
5476  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
5477 
5478  return 1; /* return error */
5479  }
5480 
5481  return 0; /* success return 0 */
5482 }
5483 
5496 uint8_t llcc68_set_pull_down_control(llcc68_handle_t *handle, uint8_t control)
5497 {
5498  uint8_t res;
5499 
5500  if (handle == NULL) /* check handle */
5501  {
5502  return 2; /* return error */
5503  }
5504  if (handle->inited != 1) /* check handle initialization */
5505  {
5506  return 3; /* return error */
5507  }
5508 
5509  res = a_llcc68_check_busy(handle); /* check busy */
5510  if (res != 0) /* check result */
5511  {
5512  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5513 
5514  return 4; /* return error */
5515  }
5516 
5517  res = a_llcc68_spi_write_register(handle, LLCC68_REG_DIOX_PULL_DOWN_CONTROL, (uint8_t *)&control, 1); /* write register */
5518  if (res != 0) /* check result */
5519  {
5520  handle->debug_print("llcc68: write register failed.\n"); /* write register failed */
5521 
5522  return 1; /* return error */
5523  }
5524 
5525  return 0; /* success return 0 */
5526 }
5527 
5540 uint8_t llcc68_get_pull_down_control(llcc68_handle_t *handle, uint8_t *control)
5541 {
5542  uint8_t res;
5543 
5544  if (handle == NULL) /* check handle */
5545  {
5546  return 2; /* return error */
5547  }
5548  if (handle->inited != 1) /* check handle initialization */
5549  {
5550  return 3; /* return error */
5551  }
5552 
5553  res = a_llcc68_check_busy(handle); /* check busy */
5554  if (res != 0) /* check result */
5555  {
5556  handle->debug_print("llcc68: chip is busy.\n"); /* chip is busy */
5557 
5558  return 4; /* return error */
5559  }
5560 
5561  res = a_llcc68_spi_read_register(handle, LLCC68_REG_DIOX_PULL_DOWN_CONTROL, (uint8_t *)control, 1); /* read register */
5562  if (res != 0) /* check result */
5563  {
5564  handle->debug_print("llcc68: read register failed.\n"); /* read register failed */
5565 
5566  return 1; /* return error */
5567  }
5568 
5569  return 0; /* success return 0 */
5570 }
5571 
5586 uint8_t llcc68_write_read_reg(llcc68_handle_t *handle, uint8_t *in_buf, uint32_t in_len,
5587  uint8_t *out_buf, uint32_t out_len)
5588 {
5589 
5590  if (handle == NULL) /* check handle */
5591  {
5592  return 2; /* return error */
5593  }
5594  if (handle->inited != 1) /* check handle initialization */
5595  {
5596  return 3; /* return error */
5597  }
5598 
5599  if (handle->spi_write_read(in_buf, in_len, out_buf, out_len) != 0) /* spi read */
5600  {
5601  return 1; /* return error */
5602  }
5603  else
5604  {
5605  return 0; /* success return 0 */
5606  }
5607 }
5608 
5617 uint8_t llcc68_info(llcc68_info_t *info)
5618 {
5619  if (info == NULL) /* check handle */
5620  {
5621  return 2; /* return error */
5622  }
5623 
5624  memset(info, 0, sizeof(llcc68_info_t)); /* initialize llcc68 info structure */
5625  strncpy(info->chip_name, CHIP_NAME, 32); /* copy chip name */
5626  strncpy(info->manufacturer_name, MANUFACTURER_NAME, 32); /* copy manufacturer name */
5627  strncpy(info->interface, "SPI", 8); /* copy interface name */
5628  info->supply_voltage_min_v = SUPPLY_VOLTAGE_MIN; /* set minimal supply voltage */
5629  info->supply_voltage_max_v = SUPPLY_VOLTAGE_MAX; /* set maximum supply voltage */
5630  info->max_current_ma = MAX_CURRENT; /* set maximum current */
5631  info->temperature_max = TEMPERATURE_MAX; /* set minimal temperature */
5632  info->temperature_min = TEMPERATURE_MIN; /* set maximum temperature */
5633  info->driver_version = DRIVER_VERSION; /* set driver version */
5634 
5635  return 0; /* success return 0 */
5636 }
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LLCC68_COMMAND_WRITE_REGISTER
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#define LLCC68_REG_EVENT_MASK
Definition: driver_llcc68.c:135
LLCC68_COMMAND_SET_TX_INFINITE_PREAMBLE
#define LLCC68_COMMAND_SET_TX_INFINITE_PREAMBLE
Definition: driver_llcc68.c:64
LLCC68_COMMAND_GET_RSSI_LNST
#define LLCC68_COMMAND_GET_RSSI_LNST
Definition: driver_llcc68.c:89
LLCC68_COMMAND_GET_STATS
#define LLCC68_COMMAND_GET_STATS
Definition: driver_llcc68.c:94
LLCC68_REG_TX_MODULATION
#define LLCC68_REG_TX_MODULATION
Definition: driver_llcc68.c:127
LLCC68_REG_DIOX_PULL_UP_CONTROL
#define LLCC68_REG_DIOX_PULL_UP_CONTROL
Definition: driver_llcc68.c:102
LLCC68_COMMAND_RESET_STATS
#define LLCC68_COMMAND_RESET_STATS
Definition: driver_llcc68.c:95
LLCC68_REG_IQ_POLARITY_SETUP
#define LLCC68_REG_IQ_POLARITY_SETUP
Definition: driver_llcc68.c:120
LLCC68_COMMAND_SET_CALIBRATE
#define LLCC68_COMMAND_SET_CALIBRATE
Definition: driver_llcc68.c:66
LLCC68_COMMAND_SET_CALIBRATE_IMAGE
#define LLCC68_COMMAND_SET_CALIBRATE_IMAGE
Definition: driver_llcc68.c:67
LLCC68_REG_SYNC_WORD_0
#define LLCC68_REG_SYNC_WORD_0
Definition: driver_llcc68.c:110
LLCC68_COMMAND_SET_RX_TX_FALLBACK_MODE
#define LLCC68_COMMAND_SET_RX_TX_FALLBACK_MODE
Definition: driver_llcc68.c:69
LLCC68_COMMAND_SET_PA_CONFIG
#define LLCC68_COMMAND_SET_PA_CONFIG
Definition: driver_llcc68.c:68
LLCC68_COMMAND_SET_LORA_SYMB_NUM_TIMEOUT
#define LLCC68_COMMAND_SET_LORA_SYMB_NUM_TIMEOUT
Definition: driver_llcc68.c:87
CHIP_NAME
#define CHIP_NAME
chip information definition
Definition: driver_llcc68.c:43
LLCC68_REG_RTC_CONTROL
#define LLCC68_REG_RTC_CONTROL
Definition: driver_llcc68.c:131
LLCC68_COMMAND_SET_RF_FREQUENCY
#define LLCC68_COMMAND_SET_RF_FREQUENCY
Definition: driver_llcc68.c:79
LLCC68_COMMAND_CLEAR_DEVICE_ERRORS
#define LLCC68_COMMAND_CLEAR_DEVICE_ERRORS
Definition: driver_llcc68.c:93
LLCC68_REG_OCP_CONFIGURATION
#define LLCC68_REG_OCP_CONFIGURATION
Definition: driver_llcc68.c:130
LLCC68_COMMAND_STOP_TIMER_ON_PREAMBLE
#define LLCC68_COMMAND_STOP_TIMER_ON_PREAMBLE
Definition: driver_llcc68.c:60
DRIVER_VERSION
#define DRIVER_VERSION
Definition: driver_llcc68.c:50
LLCC68_COMMAND_SET_PACKET_TYPE
#define LLCC68_COMMAND_SET_PACKET_TYPE
Definition: driver_llcc68.c:80
LLCC68_COMMAND_GET_STATUS
#define LLCC68_COMMAND_GET_STATUS
Definition: driver_llcc68.c:88
LLCC68_COMMAND_SET_FS
#define LLCC68_COMMAND_SET_FS
Definition: driver_llcc68.c:57
LLCC68_COMMAND_SET_SLEEP
#define LLCC68_COMMAND_SET_SLEEP
chip command definition
Definition: driver_llcc68.c:55
LLCC68_COMMAND_READ_REGISTER
#define LLCC68_COMMAND_READ_REGISTER
Definition: driver_llcc68.c:71
LLCC68_COMMAND_SET_DIO_IRQ_PARAMS
#define LLCC68_COMMAND_SET_DIO_IRQ_PARAMS
Definition: driver_llcc68.c:74
driver_llcc68.h
driver llcc68 header file
llcc68_lora_crc_type_t
llcc68_lora_crc_type_t
llcc68 lora crc type enumeration definition
Definition: driver_llcc68.h:308
llcc68_irq_handler
uint8_t llcc68_irq_handler(llcc68_handle_t *handle)
irq handler
Definition: driver_llcc68.c:400
llcc68_lora_bandwidth_t
llcc68_lora_bandwidth_t
llcc68 lora bandwidth enumeration definition
Definition: driver_llcc68.h:233
llcc68_bool_t
llcc68_bool_t
llcc68 bool enumeration definition
Definition: driver_llcc68.h:63
llcc68_gfsk_packet_type_t
llcc68_gfsk_packet_type_t
llcc68 gfsk packet type enumeration definition
Definition: driver_llcc68.h:276
llcc68_clock_source_t
llcc68_clock_source_t
llcc68 clock source enumeration definition
Definition: driver_llcc68.h:81
llcc68_set_rf_frequency
uint8_t llcc68_set_rf_frequency(llcc68_handle_t *handle, uint32_t reg)
set the rf frequency
Definition: driver_llcc68.c:2531
llcc68_set_lora_modulation_params
uint8_t llcc68_set_lora_modulation_params(llcc68_handle_t *handle, llcc68_lora_sf_t sf, llcc68_lora_bandwidth_t bw, llcc68_lora_cr_t cr, llcc68_bool_t low_data_rate_optimize_enable)
set the modulation params in LoRa mode
Definition: driver_llcc68.c:2888
llcc68_info
uint8_t llcc68_info(llcc68_info_t *info)
get chip's information
Definition: driver_llcc68.c:5617
llcc68_set_pa_config
uint8_t llcc68_set_pa_config(llcc68_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max)
set the pa config
Definition: driver_llcc68.c:2135
llcc68_check_packet_error
uint8_t llcc68_check_packet_error(llcc68_handle_t *handle, llcc68_bool_t *enable)
check the packet error
Definition: driver_llcc68.c:1046
llcc68_lora_sf_t
llcc68_lora_sf_t
llcc68 lora spreading factor enumeration definition
Definition: driver_llcc68.h:219
llcc68_clear_device_errors
uint8_t llcc68_clear_device_errors(llcc68_handle_t *handle)
clear the device errors
Definition: driver_llcc68.c:3622
llcc68_gfsk_crc_type_t
llcc68_gfsk_crc_type_t
llcc68 gfsk crc type enumeration definition
Definition: driver_llcc68.h:287
llcc68_lora_transmit
uint8_t llcc68_lora_transmit(llcc68_handle_t *handle, llcc68_clock_source_t standby_src, uint16_t preamble_length, llcc68_lora_header_t header_type, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable, uint8_t *buf, uint16_t len, uint32_t us)
send the lora data
Definition: driver_llcc68.c:1084
llcc68_get_lora_packet_status
uint8_t llcc68_get_lora_packet_status(llcc68_handle_t *handle, uint8_t *rssi_pkt_raw, uint8_t *snr_pkt_raw, uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt)
get the packet status in LoRa mode
Definition: driver_llcc68.c:3374
llcc68_get_gfsk_packet_status
uint8_t llcc68_get_gfsk_packet_status(llcc68_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw, uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg)
get the packet status in GFSK mode
Definition: driver_llcc68.c:3318
llcc68_get_status
uint8_t llcc68_get_status(llcc68_handle_t *handle, uint8_t *status)
get the status
Definition: driver_llcc68.c:3219
llcc68_gfsk_bit_rate_convert_to_register
uint8_t llcc68_gfsk_bit_rate_convert_to_register(llcc68_handle_t *handle, uint32_t br, uint32_t *reg)
convert the bit rate to the register raw data
Definition: driver_llcc68.c:2776
llcc68_clear_irq_status
uint8_t llcc68_clear_irq_status(llcc68_handle_t *handle, uint16_t clear_irq_param)
clear the irq status
Definition: driver_llcc68.c:2334
llcc68_get_packet_type
uint8_t llcc68_get_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t *type)
get the packet type
Definition: driver_llcc68.c:2626
llcc68_tcxo_voltage_t
llcc68_tcxo_voltage_t
llcc68 tcxo voltage enumeration definition
Definition: driver_llcc68.h:140
llcc68_get_instantaneous_rssi
uint8_t llcc68_get_instantaneous_rssi(llcc68_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst)
get the instantaneous rssi
Definition: driver_llcc68.c:3427
llcc68_deinit
uint8_t llcc68_deinit(llcc68_handle_t *handle)
close the chip
Definition: driver_llcc68.c:754
llcc68_write_register
uint8_t llcc68_write_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
write the register
Definition: driver_llcc68.c:1302
llcc68_regulator_mode_t
llcc68_regulator_mode_t
llcc68 regulator mode enumeration definition
Definition: driver_llcc68.h:90
llcc68_gfsk_bit_rate_convert_to_data
uint8_t llcc68_gfsk_bit_rate_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *br)
convert the register raw data to the bit rate
Definition: driver_llcc68.c:2803
llcc68_start_mode_t
llcc68_start_mode_t
llcc68 start mode enumeration definition
Definition: driver_llcc68.h:72
llcc68_set_gfsk_modulation_params
uint8_t llcc68_set_gfsk_modulation_params(llcc68_handle_t *handle, uint32_t br, llcc68_gfsk_pulse_shape_t shape, llcc68_gfsk_bandwidth_t bw, uint32_t fdev)
set the modulation params in GFSK mode
Definition: driver_llcc68.c:2723
llcc68_set_rx
uint8_t llcc68_set_rx(llcc68_handle_t *handle, uint32_t timeout)
enter to the rx mode
Definition: driver_llcc68.c:1665
llcc68_get_device_errors
uint8_t llcc68_get_device_errors(llcc68_handle_t *handle, uint16_t *op_error)
get the device errors
Definition: driver_llcc68.c:3577
llcc68_single_receive
uint8_t llcc68_single_receive(llcc68_handle_t *handle, double us)
enter to the single receive mode
Definition: driver_llcc68.c:821
llcc68_reset_stats
uint8_t llcc68_reset_stats(llcc68_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error)
reset the stats
Definition: driver_llcc68.c:3526
llcc68_ramp_time_t
llcc68_ramp_time_t
llcc68 ramp time enumeration definition
Definition: driver_llcc68.h:164
llcc68_set_calibration_image
uint8_t llcc68_set_calibration_image(llcc68_handle_t *handle, uint8_t freq1, uint8_t freq2)
set the calibration image frequency
Definition: driver_llcc68.c:2087
llcc68_set_stop_timer_on_preamble
uint8_t llcc68_set_stop_timer_on_preamble(llcc68_handle_t *handle, llcc68_bool_t enable)
stop timer on preamble
Definition: driver_llcc68.c:1767
llcc68_set_regulator_mode
uint8_t llcc68_set_regulator_mode(llcc68_handle_t *handle, llcc68_regulator_mode_t mode)
set the regulator_mode
Definition: driver_llcc68.c:1994
llcc68_lora_cad_symbol_num_t
llcc68_lora_cad_symbol_num_t
llcc68 lora cad symbol num enumeration definition
Definition: driver_llcc68.h:317
llcc68_set_tx_continuous_wave
uint8_t llcc68_set_tx_continuous_wave(llcc68_handle_t *handle)
enter to the tx continuous wave mode
Definition: driver_llcc68.c:1907
llcc68_get_rx_buffer_status
uint8_t llcc68_get_rx_buffer_status(llcc68_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer)
get the rx buffer status
Definition: driver_llcc68.c:3267
llcc68_timeout_convert_to_register
uint8_t llcc68_timeout_convert_to_register(llcc68_handle_t *handle, double us, uint32_t *reg)
convert the timeout to the register raw data
Definition: driver_llcc68.c:1712
llcc68_set_lora_packet_params
uint8_t llcc68_set_lora_packet_params(llcc68_handle_t *handle, uint16_t preamble_length, llcc68_lora_header_t header_type, uint8_t payload_length, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable)
set the packet params in LoRa mode
Definition: driver_llcc68.c:3014
llcc68_gfsk_preamble_detector_length_t
llcc68_gfsk_preamble_detector_length_t
llcc68 gfsk preamble detector length enumeration definition
Definition: driver_llcc68.h:254
llcc68_set_rx_tx_fallback_mode
uint8_t llcc68_set_rx_tx_fallback_mode(llcc68_handle_t *handle, llcc68_rx_tx_fallback_mode_t mode)
set the rx tx fallback mode
Definition: driver_llcc68.c:2184
llcc68_set_lora_symb_num_timeout
uint8_t llcc68_set_lora_symb_num_timeout(llcc68_handle_t *handle, uint8_t symb_num)
set the lora symbol number timeout
Definition: driver_llcc68.c:3173
llcc68_set_sleep
uint8_t llcc68_set_sleep(llcc68_handle_t *handle, llcc68_start_mode_t mode, llcc68_bool_t rtc_wake_up_enable)
enter to the sleep mode
Definition: driver_llcc68.c:1481
llcc68_lora_cr_t
llcc68_lora_cr_t
llcc68 lora coding rate enumeration definition
Definition: driver_llcc68.h:243
llcc68_set_dio3_as_tcxo_ctrl
uint8_t llcc68_set_dio3_as_tcxo_ctrl(llcc68_handle_t *handle, llcc68_tcxo_voltage_t voltage, uint32_t delay)
set dio3 as tcxo ctrl
Definition: driver_llcc68.c:2428
llcc68_set_tx_params
uint8_t llcc68_set_tx_params(llcc68_handle_t *handle, int8_t dbm, llcc68_ramp_time_t t)
set the tx params
Definition: driver_llcc68.c:2673
llcc68_continuous_receive
uint8_t llcc68_continuous_receive(llcc68_handle_t *handle)
enter to the continuous receive mode
Definition: driver_llcc68.c:890
llcc68_set_frequency_synthesis
uint8_t llcc68_set_frequency_synthesis(llcc68_handle_t *handle)
enter to the frequency synthesis mode
Definition: driver_llcc68.c:1572
llcc68_read_register
uint8_t llcc68_read_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
read the register
Definition: driver_llcc68.c:1347
llcc68_set_cad_params
uint8_t llcc68_set_cad_params(llcc68_handle_t *handle, llcc68_lora_cad_symbol_num_t num, uint8_t cad_det_peak, uint8_t cad_det_min, llcc68_lora_cad_exit_mode_t mode, uint32_t timeout)
set the cad params
Definition: driver_llcc68.c:3071
llcc68_set_calibration
uint8_t llcc68_set_calibration(llcc68_handle_t *handle, uint8_t settings)
set the calibration settings
Definition: driver_llcc68.c:2040
llcc68_set_gfsk_packet_params
uint8_t llcc68_set_gfsk_packet_params(llcc68_handle_t *handle, uint16_t preamble_length, llcc68_gfsk_preamble_detector_length_t detector_length, uint8_t sync_word_length, llcc68_gfsk_addr_filter_t filter, llcc68_gfsk_packet_type_t packet_type, uint8_t payload_length, llcc68_gfsk_crc_type_t crc_type, llcc68_bool_t whitening_enable)
set the packet params in GFSK mode
Definition: driver_llcc68.c:2946
llcc68_gfsk_bandwidth_t
llcc68_gfsk_bandwidth_t
llcc68 gfsk bandwidth enumeration definition
Definition: driver_llcc68.h:191
llcc68_set_dio_irq_params
uint8_t llcc68_set_dio_irq_params(llcc68_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask, uint16_t dio2_mask, uint16_t dio3_mask)
set the dio irq params
Definition: driver_llcc68.c:2233
llcc68_packet_type_t
llcc68_packet_type_t
llcc68 packet type enumeration definition
Definition: driver_llcc68.h:155
llcc68_set_cad
uint8_t llcc68_set_cad(llcc68_handle_t *handle)
run the cad
Definition: driver_llcc68.c:1864
llcc68_set_standby
uint8_t llcc68_set_standby(llcc68_handle_t *handle, llcc68_clock_source_t src)
enter to the standby mode
Definition: driver_llcc68.c:1527
llcc68_set_tx_infinite_preamble
uint8_t llcc68_set_tx_infinite_preamble(llcc68_handle_t *handle)
enter to the tx infinite preamble mode
Definition: driver_llcc68.c:1950
llcc68_gfsk_frequency_deviation_convert_to_register
uint8_t llcc68_gfsk_frequency_deviation_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency deviation to the register raw data
Definition: driver_llcc68.c:2830
llcc68_set_buffer_base_address
uint8_t llcc68_set_buffer_base_address(llcc68_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr)
set the buffer base address
Definition: driver_llcc68.c:3126
llcc68_get_irq_status
uint8_t llcc68_get_irq_status(llcc68_handle_t *handle, uint16_t *status)
get the irq status
Definition: driver_llcc68.c:2288
llcc68_timeout_convert_to_data
uint8_t llcc68_timeout_convert_to_data(llcc68_handle_t *handle, uint32_t reg, double *us)
convert the register raw data to the timeout
Definition: driver_llcc68.c:1739
llcc68_get_stats
uint8_t llcc68_get_stats(llcc68_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error)
get the stats
Definition: driver_llcc68.c:3476
llcc68_gfsk_addr_filter_t
llcc68_gfsk_addr_filter_t
llcc68 gfsk addr filter enumeration definition
Definition: driver_llcc68.h:266
llcc68_lora_header_t
llcc68_lora_header_t
llcc68 lora header enumeration definition
Definition: driver_llcc68.h:299
llcc68_frequency_convert_to_register
uint8_t llcc68_frequency_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency to the register raw data
Definition: driver_llcc68.c:2476
llcc68_gfsk_pulse_shape_t
llcc68_gfsk_pulse_shape_t
llcc68 gfsk pulse shape enumeration definition
Definition: driver_llcc68.h:179
llcc68_rx_tx_fallback_mode_t
llcc68_rx_tx_fallback_mode_t
llcc68 rx tx fallback mode enumeration definition
Definition: driver_llcc68.h:130
llcc68_write_buffer
uint8_t llcc68_write_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
write the buffer
Definition: driver_llcc68.c:1392
llcc68_frequency_convert_to_data
uint8_t llcc68_frequency_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq)
convert the register raw data to the frequency
Definition: driver_llcc68.c:2503
llcc68_lora_cad
uint8_t llcc68_lora_cad(llcc68_handle_t *handle, llcc68_bool_t *enable)
run the cad
Definition: driver_llcc68.c:959
llcc68_set_dio2_as_rf_switch_ctrl
uint8_t llcc68_set_dio2_as_rf_switch_ctrl(llcc68_handle_t *handle, llcc68_bool_t enable)
set dio2 as rf switch ctrl
Definition: driver_llcc68.c:2381
llcc68_read_buffer
uint8_t llcc68_read_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
read the buffer
Definition: driver_llcc68.c:1437
llcc68_set_rx_duty_cycle
uint8_t llcc68_set_rx_duty_cycle(llcc68_handle_t *handle, uint32_t rx_period, uint32_t sleep_period)
set the rx duty cycle
Definition: driver_llcc68.c:1814
llcc68_set_tx
uint8_t llcc68_set_tx(llcc68_handle_t *handle, uint32_t timeout)
enter to the tx mode
Definition: driver_llcc68.c:1616
llcc68_set_packet_type
uint8_t llcc68_set_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t type)
set the packet type
Definition: driver_llcc68.c:2580
llcc68_lora_cad_exit_mode_t
llcc68_lora_cad_exit_mode_t
llcc68 lora cad exit mode enumeration definition
Definition: driver_llcc68.h:329
llcc68_init
uint8_t llcc68_init(llcc68_handle_t *handle)
initialize the chip
Definition: driver_llcc68.c:583
llcc68_gfsk_frequency_deviation_convert_to_data
uint8_t llcc68_gfsk_frequency_deviation_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq)
convert the register raw data to the frequency deviation
Definition: driver_llcc68.c:2857
LLCC68_BOOL_TRUE
@ LLCC68_BOOL_TRUE
Definition: driver_llcc68.h:65
LLCC68_BOOL_FALSE
@ LLCC68_BOOL_FALSE
Definition: driver_llcc68.h:64
LLCC68_IRQ_PREAMBLE_DETECTED
@ LLCC68_IRQ_PREAMBLE_DETECTED
Definition: driver_llcc68.h:116
LLCC68_IRQ_TX_DONE
@ LLCC68_IRQ_TX_DONE
Definition: driver_llcc68.h:114
LLCC68_IRQ_HEADER_ERR
@ LLCC68_IRQ_HEADER_ERR
Definition: driver_llcc68.h:119
LLCC68_IRQ_CRC_ERR
@ LLCC68_IRQ_CRC_ERR
Definition: driver_llcc68.h:120
LLCC68_IRQ_RX_DONE
@ LLCC68_IRQ_RX_DONE
Definition: driver_llcc68.h:115
LLCC68_IRQ_CAD_DETECTED
@ LLCC68_IRQ_CAD_DETECTED
Definition: driver_llcc68.h:122
LLCC68_IRQ_HEADER_VALID
@ LLCC68_IRQ_HEADER_VALID
Definition: driver_llcc68.h:118
LLCC68_IRQ_TIMEOUT
@ LLCC68_IRQ_TIMEOUT
Definition: driver_llcc68.h:123
LLCC68_IRQ_SYNC_WORD_VALID
@ LLCC68_IRQ_SYNC_WORD_VALID
Definition: driver_llcc68.h:117
LLCC68_IRQ_CAD_DONE
@ LLCC68_IRQ_CAD_DONE
Definition: driver_llcc68.h:121
llcc68_write_read_reg
uint8_t llcc68_write_read_reg(llcc68_handle_t *handle, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
write and read register
Definition: driver_llcc68.c:5586
llcc68_set_dio_output_enable
uint8_t llcc68_set_dio_output_enable(llcc68_handle_t *handle, uint8_t enable)
set the dio output enable
Definition: driver_llcc68.c:5232
llcc68_get_dio_output_enable
uint8_t llcc68_get_dio_output_enable(llcc68_handle_t *handle, uint8_t *enable)
get the dio output enable
Definition: driver_llcc68.c:5276
llcc68_set_fsk_sync_word
uint8_t llcc68_set_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8])
set the sync word in FSK mode
Definition: driver_llcc68.c:3948
llcc68_get_fsk_broadcast_address
uint8_t llcc68_get_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t *addr)
get the broadcast address in FSK mode
Definition: driver_llcc68.c:4168
llcc68_set_xta_trim
uint8_t llcc68_set_xta_trim(llcc68_handle_t *handle, uint8_t trim)
set the xta trim
Definition: driver_llcc68.c:4880
llcc68_get_fsk_sync_word
uint8_t llcc68_get_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8])
get the sync word in FSK mode
Definition: driver_llcc68.c:3992
llcc68_set_iq_polarity
uint8_t llcc68_set_iq_polarity(llcc68_handle_t *handle, uint8_t setup)
set the iq polarity
Definition: driver_llcc68.c:4212
llcc68_set_lora_sync_word
uint8_t llcc68_set_lora_sync_word(llcc68_handle_t *handle, uint16_t sync_word)
set the lora sync word
Definition: driver_llcc68.c:4300
llcc68_get_pull_down_control
uint8_t llcc68_get_pull_down_control(llcc68_handle_t *handle, uint8_t *control)
get the pull down control
Definition: driver_llcc68.c:5540
llcc68_set_ocp
uint8_t llcc68_set_ocp(llcc68_handle_t *handle, uint8_t ocp)
set the ocp
Definition: driver_llcc68.c:4704
llcc68_set_tx_clamp_config
uint8_t llcc68_set_tx_clamp_config(llcc68_handle_t *handle, uint8_t config)
set the tx clamp config
Definition: driver_llcc68.c:4616
llcc68_get_iq_polarity
uint8_t llcc68_get_iq_polarity(llcc68_handle_t *handle, uint8_t *setup)
get the iq polarity
Definition: driver_llcc68.c:4256
llcc68_get_fsk_crc_initical_value
uint8_t llcc68_get_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t *value)
get the crc initical value in FSK mode
Definition: driver_llcc68.c:3809
llcc68_get_event_mask
uint8_t llcc68_get_event_mask(llcc68_handle_t *handle, uint8_t *mask)
get the event mask
Definition: driver_llcc68.c:5188
llcc68_get_fsk_node_address
uint8_t llcc68_get_fsk_node_address(llcc68_handle_t *handle, uint8_t *addr)
get the node address in FSK mode
Definition: driver_llcc68.c:4080
llcc68_get_rtc_control
uint8_t llcc68_get_rtc_control(llcc68_handle_t *handle, uint8_t *control)
get the rtc control
Definition: driver_llcc68.c:4836
llcc68_set_rx_gain
uint8_t llcc68_set_rx_gain(llcc68_handle_t *handle, uint8_t gain)
set the rx gain
Definition: driver_llcc68.c:4528
llcc68_get_xtb_trim
uint8_t llcc68_get_xtb_trim(llcc68_handle_t *handle, uint8_t *trim)
get the xtb trim
Definition: driver_llcc68.c:5012
llcc68_set_rtc_control
uint8_t llcc68_set_rtc_control(llcc68_handle_t *handle, uint8_t control)
set the rtc control
Definition: driver_llcc68.c:4792
llcc68_get_dio3_output_control
uint8_t llcc68_get_dio3_output_control(llcc68_handle_t *handle, uint8_t *control)
get the dio3 output
Definition: driver_llcc68.c:5100
llcc68_get_dio_input_enable
uint8_t llcc68_get_dio_input_enable(llcc68_handle_t *handle, uint8_t *enable)
get the dio input enable
Definition: driver_llcc68.c:5364
llcc68_get_xta_trim
uint8_t llcc68_get_xta_trim(llcc68_handle_t *handle, uint8_t *trim)
get the xta trim
Definition: driver_llcc68.c:4924
llcc68_set_pull_up_control
uint8_t llcc68_set_pull_up_control(llcc68_handle_t *handle, uint8_t control)
set the pull up control
Definition: driver_llcc68.c:5408
llcc68_set_fsk_whitening_initial_value
uint8_t llcc68_set_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t value)
set the whitening initial value in FSK mode
Definition: driver_llcc68.c:3669
llcc68_set_event_mask
uint8_t llcc68_set_event_mask(llcc68_handle_t *handle, uint8_t mask)
set the event mask
Definition: driver_llcc68.c:5144
llcc68_set_dio3_output_control
uint8_t llcc68_set_dio3_output_control(llcc68_handle_t *handle, uint8_t control)
set the dio3 output
Definition: driver_llcc68.c:5056
llcc68_get_lora_sync_word
uint8_t llcc68_get_lora_sync_word(llcc68_handle_t *handle, uint16_t *sync_word)
get the lora sync word
Definition: driver_llcc68.c:4347
llcc68_get_random_number
uint8_t llcc68_get_random_number(llcc68_handle_t *handle, uint32_t *r)
get the random number
Definition: driver_llcc68.c:4393
llcc68_get_pull_up_control
uint8_t llcc68_get_pull_up_control(llcc68_handle_t *handle, uint8_t *control)
get the pull up control
Definition: driver_llcc68.c:5452
llcc68_set_fsk_broadcast_address
uint8_t llcc68_set_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t addr)
set the broadcast address in FSK mode
Definition: driver_llcc68.c:4124
llcc68_get_rx_gain
uint8_t llcc68_get_rx_gain(llcc68_handle_t *handle, uint8_t *gain)
get the rx gain
Definition: driver_llcc68.c:4572
llcc68_set_fsk_crc_polynomial_value
uint8_t llcc68_set_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t value)
set the crc polynomial value in FSK mode
Definition: driver_llcc68.c:3855
llcc68_set_tx_modulation
uint8_t llcc68_set_tx_modulation(llcc68_handle_t *handle, uint8_t modulation)
set the tx modulation
Definition: driver_llcc68.c:4440
llcc68_set_fsk_node_address
uint8_t llcc68_set_fsk_node_address(llcc68_handle_t *handle, uint8_t addr)
set the node address in FSK mode
Definition: driver_llcc68.c:4036
llcc68_set_pull_down_control
uint8_t llcc68_set_pull_down_control(llcc68_handle_t *handle, uint8_t control)
set the pull down control
Definition: driver_llcc68.c:5496
llcc68_set_dio_input_enable
uint8_t llcc68_set_dio_input_enable(llcc68_handle_t *handle, uint8_t enable)
set the dio input enable
Definition: driver_llcc68.c:5320
llcc68_get_tx_modulation
uint8_t llcc68_get_tx_modulation(llcc68_handle_t *handle, uint8_t *modulation)
get the tx modulation
Definition: driver_llcc68.c:4484
llcc68_set_xtb_trim
uint8_t llcc68_set_xtb_trim(llcc68_handle_t *handle, uint8_t trim)
set the xtb trim
Definition: driver_llcc68.c:4968
llcc68_get_tx_clamp_config
uint8_t llcc68_get_tx_clamp_config(llcc68_handle_t *handle, uint8_t *config)
get the tx clamp config
Definition: driver_llcc68.c:4660
llcc68_get_ocp
uint8_t llcc68_get_ocp(llcc68_handle_t *handle, uint8_t *ocp)
get the ocp
Definition: driver_llcc68.c:4748
llcc68_get_fsk_whitening_initial_value
uint8_t llcc68_get_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t *value)
get the whitening initial value in FSK mode
Definition: driver_llcc68.c:3716
llcc68_get_fsk_crc_polynomial_value
uint8_t llcc68_get_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t *value)
get the crc polynomial value in FSK mode
Definition: driver_llcc68.c:3902
llcc68_set_fsk_crc_initical_value
uint8_t llcc68_set_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t value)
set the crc initial value in FSK mode
Definition: driver_llcc68.c:3762
llcc68_handle_s
llcc68 handle structure definition
Definition: driver_llcc68.h:371
llcc68_handle_s::spi_write_read
uint8_t(* spi_write_read)(uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
Definition: driver_llcc68.h:380
llcc68_handle_s::inited
uint8_t inited
Definition: driver_llcc68.h:386
llcc68_handle_s::cad_detected
uint8_t cad_detected
Definition: driver_llcc68.h:389
llcc68_handle_s::spi_init
uint8_t(* spi_init)(void)
Definition: driver_llcc68.h:378
llcc68_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition: driver_llcc68.h:382
llcc68_handle_s::tx_done
uint8_t tx_done
Definition: driver_llcc68.h:387
llcc68_handle_s::busy_gpio_init
uint8_t(* busy_gpio_init)(void)
Definition: driver_llcc68.h:375
llcc68_handle_s::receive_callback
void(* receive_callback)(uint16_t type, uint8_t *buf, uint16_t len)
Definition: driver_llcc68.h:384
llcc68_handle_s::reset_gpio_deinit
uint8_t(* reset_gpio_deinit)(void)
Definition: driver_llcc68.h:373
llcc68_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition: driver_llcc68.h:383
llcc68_handle_s::cad_done
uint8_t cad_done
Definition: driver_llcc68.h:388
llcc68_handle_s::busy_gpio_deinit
uint8_t(* busy_gpio_deinit)(void)
Definition: driver_llcc68.h:376
llcc68_handle_s::spi_deinit
uint8_t(* spi_deinit)(void)
Definition: driver_llcc68.h:379
llcc68_handle_s::reset_gpio_init
uint8_t(* reset_gpio_init)(void)
Definition: driver_llcc68.h:372
llcc68_handle_s::crc_error
uint8_t crc_error
Definition: driver_llcc68.h:390
llcc68_handle_s::timeout
uint8_t timeout
Definition: driver_llcc68.h:391
llcc68_handle_s::receive_buf
uint8_t receive_buf[256]
Definition: driver_llcc68.h:393
llcc68_handle_s::busy_gpio_read
uint8_t(* busy_gpio_read)(uint8_t *value)
Definition: driver_llcc68.h:377
llcc68_handle_s::buf
uint8_t buf[384]
Definition: driver_llcc68.h:392
llcc68_handle_s::reset_gpio_write
uint8_t(* reset_gpio_write)(uint8_t value)
Definition: driver_llcc68.h:374
llcc68_info_s
llcc68 information structure definition
Definition: driver_llcc68.h:400
llcc68_info_s::temperature_max
float temperature_max
Definition: driver_llcc68.h:408
llcc68_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition: driver_llcc68.h:405
llcc68_info_s::driver_version
uint32_t driver_version
Definition: driver_llcc68.h:409
llcc68_info_s::temperature_min
float temperature_min
Definition: driver_llcc68.h:407
llcc68_info_s::max_current_ma
float max_current_ma
Definition: driver_llcc68.h:406
llcc68_info_s::manufacturer_name
char manufacturer_name[32]
Definition: driver_llcc68.h:402
llcc68_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition: driver_llcc68.h:404
llcc68_info_s::interface
char interface[8]
Definition: driver_llcc68.h:403
llcc68_info_s::chip_name
char chip_name[32]
Definition: driver_llcc68.h:401