driver_llcc68.h

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#ifndef DRIVER_LLCC68_H
#define DRIVER_LLCC68_H
 
#include <stdio.h>
#include <stdint.h>
#include <string.h>
 
#ifdef __cplusplus
extern "C"{
#endif
 
typedef enum
{
    LLCC68_BOOL_FALSE = 0x00,        
    LLCC68_BOOL_TRUE  = 0x01,        
} llcc68_bool_t;
 
typedef enum
{
    LLCC68_START_MODE_COLD = 0x00,        
    LLCC68_START_MODE_WARM = 0x01,        
} llcc68_start_mode_t;
 
typedef enum
{
    LLCC68_CLOCK_SOURCE_RC_13M     = 0x00,        
    LLCC68_CLOCK_SOURCE_XTAL_32MHZ = 0x01,        
} llcc68_clock_source_t;
 
typedef enum
{
    LLCC68_REGULATOR_MODE_ONLY_LDO  = 0x00,        
    LLCC68_REGULATOR_MODE_DC_DC_LDO = 0x01,        
} llcc68_regulator_mode_t;
 
typedef enum
{
    LLCC68_CALIBRATION_RC64K      = (1 << 0),        
    LLCC68_CALIBRATION_RC13M      = (1 << 1),        
    LLCC68_CALIBRATION_PLL        = (1 << 2),        
    LLCC68_CALIBRATION_ADC_PULSE  = (1 << 3),        
    LLCC68_CALIBRATION_ADC_BULK_N = (1 << 4),        
    LLCC68_CALIBRATION_ADC_BULK_P = (1 << 5),        
    LLCC68_CALIBRATION_IMAGE      = (1 << 6),        
} llcc68_calibration_t;
 
typedef enum
{
    LLCC68_IRQ_TX_DONE           = (1 << 0),        
    LLCC68_IRQ_RX_DONE           = (1 << 1),        
    LLCC68_IRQ_PREAMBLE_DETECTED = (1 << 2),        
    LLCC68_IRQ_SYNC_WORD_VALID   = (1 << 3),        
    LLCC68_IRQ_HEADER_VALID      = (1 << 4),        
    LLCC68_IRQ_HEADER_ERR        = (1 << 5),        
    LLCC68_IRQ_CRC_ERR           = (1 << 6),        
    LLCC68_IRQ_CAD_DONE          = (1 << 7),        
    LLCC68_IRQ_CAD_DETECTED      = (1 << 8),        
    LLCC68_IRQ_TIMEOUT           = (1 << 9),        
} llcc68_irq_t;
 
typedef enum
{
    LLCC68_RX_TX_FALLBACK_MODE_FS         = 0x40,        
    LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC = 0x30,        
    LLCC68_RX_TX_FALLBACK_MODE_STDBY_RC   = 0x20,        
} llcc68_rx_tx_fallback_mode_t;
 
typedef enum
{
    LLCC68_TCXO_VOLTAGE_1P6V = 0x00,        
    LLCC68_TCXO_VOLTAGE_1P7V = 0x01,        
    LLCC68_TCXO_VOLTAGE_1P8V = 0x02,        
    LLCC68_TCXO_VOLTAGE_2P2V = 0x03,        
    LLCC68_TCXO_VOLTAGE_2P4V = 0x04,        
    LLCC68_TCXO_VOLTAGE_2P7V = 0x05,        
    LLCC68_TCXO_VOLTAGE_3P0V = 0x06,        
    LLCC68_TCXO_VOLTAGE_3P3V = 0x07,        
} llcc68_tcxo_voltage_t;
 
typedef enum
{
    LLCC68_PACKET_TYPE_GFSK = 0x00,        
    LLCC68_PACKET_TYPE_LORA = 0x01,        
} llcc68_packet_type_t;
 
typedef enum
{
    LLCC68_RAMP_TIME_10US   = 0x00,        
    LLCC68_RAMP_TIME_20US   = 0x01,        
    LLCC68_RAMP_TIME_40US   = 0x02,        
    LLCC68_RAMP_TIME_80US   = 0x03,        
    LLCC68_RAMP_TIME_200US  = 0x04,        
    LLCC68_RAMP_TIME_800US  = 0x05,        
    LLCC68_RAMP_TIME_1700US = 0x06,        
    LLCC68_RAMP_TIME_3400US = 0x07,        
} llcc68_ramp_time_t;
 
typedef enum
{
    LLCC68_GFSK_PULSE_SHAPE_NO_FILTER       = 0x00,        
    LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P3 = 0x08,        
    LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P5 = 0x09,        
    LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P7 = 0x0A,        
    LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_1   = 0x0B,        
} llcc68_gfsk_pulse_shape_t;
 
typedef enum
{
    LLCC68_GFSK_BANDWIDTH_4P8_KHZ   = 0x1F,        
    LLCC68_GFSK_BANDWIDTH_5P8_KHZ   = 0x17,        
    LLCC68_GFSK_BANDWIDTH_7P3_KHZ   = 0x0F,        
    LLCC68_GFSK_BANDWIDTH_9P7_KHZ   = 0x1E,        
    LLCC68_GFSK_BANDWIDTH_11P7_KHZ  = 0x16,        
    LLCC68_GFSK_BANDWIDTH_14P6_KHZ  = 0x0E,        
    LLCC68_GFSK_BANDWIDTH_19P5_KHZ  = 0x1D,        
    LLCC68_GFSK_BANDWIDTH_23P4_KHZ  = 0x15,        
    LLCC68_GFSK_BANDWIDTH_29P3_KHZ  = 0x0D,        
    LLCC68_GFSK_BANDWIDTH_39_KHZ    = 0x1C,        
    LLCC68_GFSK_BANDWIDTH_46P9_KHZ  = 0x14,        
    LLCC68_GFSK_BANDWIDTH_58P6_KHZ  = 0x0C,        
    LLCC68_GFSK_BANDWIDTH_78P2_KHZ  = 0x1B,        
    LLCC68_GFSK_BANDWIDTH_93P8_KHZ  = 0x13,        
    LLCC68_GFSK_BANDWIDTH_117P3_KHZ = 0x0B,        
    LLCC68_GFSK_BANDWIDTH_156P2_KHZ = 0x1A,        
    LLCC68_GFSK_BANDWIDTH_187P2_KHZ = 0x12,        
    LLCC68_GFSK_BANDWIDTH_232P3_KHZ = 0x0A,        
    LLCC68_GFSK_BANDWIDTH_312_KHZ   = 0x19,        
    LLCC68_GFSK_BANDWIDTH_373P6_KHZ = 0x11,        
    LLCC68_GFSK_BANDWIDTH_467_KHZ   = 0x09,        
} llcc68_gfsk_bandwidth_t;
 
typedef enum
{
    LLCC68_LORA_SF_5  = 0x05,        
    LLCC68_LORA_SF_6  = 0x06,        
    LLCC68_LORA_SF_7  = 0x07,        
    LLCC68_LORA_SF_8  = 0x08,        
    LLCC68_LORA_SF_9  = 0x09,        
    LLCC68_LORA_SF_10 = 0x0A,        
    LLCC68_LORA_SF_11 = 0x0B,        
} llcc68_lora_sf_t;
 
typedef enum
{
    LLCC68_LORA_BANDWIDTH_125_KHZ   = 0x04,        
    LLCC68_LORA_BANDWIDTH_250_KHZ   = 0x05,        
    LLCC68_LORA_BANDWIDTH_500_KHZ   = 0x06,        
} llcc68_lora_bandwidth_t;
 
typedef enum
{
    LLCC68_LORA_CR_4_5 = 0x01,        
    LLCC68_LORA_CR_4_6 = 0x02,        
    LLCC68_LORA_CR_4_7 = 0x03,        
    LLCC68_LORA_CR_4_8 = 0x04,        
} llcc68_lora_cr_t;
 
typedef enum
{
    LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_OFF     = 0x00,        
    LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_8_BITS  = 0x04,        
    LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_16_BITS = 0x05,        
    LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_24_BITS = 0x06,        
    LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_32_BITS = 0x07,        
} llcc68_gfsk_preamble_detector_length_t;
 
typedef enum
{
    LLCC68_GFSK_ADDR_FILTER_DISABLE                       = 0x00,        
    LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_ADDR           = 0x01,        
    LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_BROADCAST_ADDR = 0x02,        
} llcc68_gfsk_addr_filter_t;
 
typedef enum
{
    LLCC68_GFSK_PACKET_TYPE_KNOWN_LENGTH  = 0x00,        
    LLCC68_GFSK_PACKET_TYPE_VARIABLE_SIZE = 0x01,        
} llcc68_gfsk_packet_type_t;
 
typedef enum
{
    LLCC68_GFSK_CRC_TYPE_OFF        = 0x01,        
    LLCC68_GFSK_CRC_TYPE_1_BYTE     = 0x00,        
    LLCC68_GFSK_CRC_TYPE_2_BYTE     = 0x02,        
    LLCC68_GFSK_CRC_TYPE_1_BYTE_INV = 0x04,        
    LLCC68_GFSK_CRC_TYPE_2_BYTE_INV = 0x06,        
} llcc68_gfsk_crc_type_t;
 
typedef enum
{
    LLCC68_LORA_HEADER_EXPLICIT = 0x00,        
    LLCC68_LORA_HEADER_IMPLICIT = 0x01,        
} llcc68_lora_header_t;
 
typedef enum
{
    LLCC68_LORA_CRC_TYPE_OFF = 0x00,        
    LLCC68_LORA_CRC_TYPE_ON  = 0x01,        
} llcc68_lora_crc_type_t;
 
typedef enum
{
    LLCC68_LORA_CAD_SYMBOL_NUM_1  = 0x00,        
    LLCC68_LORA_CAD_SYMBOL_NUM_2  = 0x01,        
    LLCC68_LORA_CAD_SYMBOL_NUM_4  = 0x02,        
    LLCC68_LORA_CAD_SYMBOL_NUM_8  = 0x03,        
    LLCC68_LORA_CAD_SYMBOL_NUM_16 = 0x04,        
} llcc68_lora_cad_symbol_num_t;
 
typedef enum
{
    LLCC68_LORA_CAD_EXIT_MODE_ONLY = 0x00,        
    LLCC68_LORA_CAD_EXIT_MODE_RX   = 0x01,        
} llcc68_lora_cad_exit_mode_t;
 
typedef enum
{
    LLCC68_FSK_RX_STATUS_PREAMBLE_ERR = (1 << 7),        
    LLCC68_FSK_RX_STATUS_SYNC_ERR     = (1 << 6),        
    LLCC68_FSK_RX_STATUS_ADDR_ERR     = (1 << 5),        
    LLCC68_FSK_RX_STATUS_CRC_ERR      = (1 << 4),        
    LLCC68_FSK_RX_STATUS_LENGTH_ERR   = (1 << 3),        
    LLCC68_FSK_RX_STATUS_ABORT_ERR    = (1 << 2),        
    LLCC68_FSK_RX_STATUS_PKT_RECEIVED = (1 << 1),        
    LLCC68_FSK_RX_STATUS_PKT_SEND     = (1 << 0),        
} llcc68_fsk_rx_status_t;
 
typedef enum
{
    LLCC68_OP_ERROR_PA_RAMP_ERR     = (1 << 8),        
    LLCC68_OP_ERROR_PLL_LOCK_ERR    = (1 << 6),        
    LLCC68_OP_ERROR_XOSC_START_ERR  = (1 << 5),        
    LLCC68_OP_ERROR_IMG_CALIB_ERR   = (1 << 4),        
    LLCC68_OP_ERROR_ADC_CALIB_ERR   = (1 << 3),        
    LLCC68_OP_ERROR_PLL_CALIB_ERR   = (1 << 2),        
    LLCC68_OP_ERROR_RC13M_CALIB_ERR = (1 << 1),        
    LLCC68_OP_ERROR_RC64K_CALIB_ERR = (1 << 0),        
} llcc68_op_error_t;
 
typedef struct llcc68_handle_s
{
    uint8_t (*reset_gpio_init)(void);                                     
    uint8_t (*reset_gpio_deinit)(void);                                   
    uint8_t (*reset_gpio_write)(uint8_t value);                           
    uint8_t (*busy_gpio_init)(void);                                      
    uint8_t (*busy_gpio_deinit)(void);                                    
    uint8_t (*busy_gpio_read)(uint8_t *value);                            
    uint8_t (*spi_init)(void);                                            
    uint8_t (*spi_deinit)(void);                                          
    uint8_t (*spi_write_read)(uint8_t *in_buf, uint32_t in_len,
                              uint8_t *out_buf, uint32_t out_len);        
    void (*delay_ms)(uint32_t ms);                                        
    void (*debug_print)(const char *const fmt, ...);                      
    void (*receive_callback)(uint16_t type,
                             uint8_t *buf, uint16_t len);                 
    uint8_t inited;                                                       
    uint8_t tx_done;                                                      
    uint8_t cad_done;                                                     
    uint8_t cad_detected;                                                 
    uint8_t crc_error;                                                    
    uint8_t timeout;                                                      
    uint8_t buf[384];                                                     
    uint8_t receive_buf[256];                                             
} llcc68_handle_t;
 
typedef struct llcc68_info_s
{
    char chip_name[32];                
    char manufacturer_name[32];        
    char interface[8];                 
    float supply_voltage_min_v;        
    float supply_voltage_max_v;        
    float max_current_ma;              
    float temperature_min;             
    float temperature_max;             
    uint32_t driver_version;           
} llcc68_info_t;
 
#define DRIVER_LLCC68_LINK_INIT(HANDLE, STRUCTURE)                memset(HANDLE, 0, sizeof(STRUCTURE))
 
#define DRIVER_LLCC68_LINK_SPI_INIT(HANDLE, FUC)                  (HANDLE)->spi_init = FUC
 
#define DRIVER_LLCC68_LINK_SPI_DEINIT(HANDLE, FUC)                (HANDLE)->spi_deinit = FUC
 
#define DRIVER_LLCC68_LINK_SPI_WRITE_READ(HANDLE, FUC)            (HANDLE)->spi_write_read = FUC
 
#define DRIVER_LLCC68_LINK_RESET_GPIO_INIT(HANDLE, FUC)           (HANDLE)->reset_gpio_init = FUC
 
#define DRIVER_LLCC68_LINK_RESET_GPIO_DEINIT(HANDLE, FUC)         (HANDLE)->reset_gpio_deinit = FUC
 
#define DRIVER_LLCC68_LINK_RESET_GPIO_WRITE(HANDLE, FUC)          (HANDLE)->reset_gpio_write = FUC
 
#define DRIVER_LLCC68_LINK_BUSY_GPIO_INIT(HANDLE, FUC)            (HANDLE)->busy_gpio_init = FUC
 
#define DRIVER_LLCC68_LINK_BUSY_GPIO_DEINIT(HANDLE, FUC)          (HANDLE)->busy_gpio_deinit = FUC
 
#define DRIVER_LLCC68_LINK_BUSY_GPIO_READ(HANDLE, FUC)            (HANDLE)->busy_gpio_read = FUC
 
#define DRIVER_LLCC68_LINK_DELAY_MS(HANDLE, FUC)                  (HANDLE)->delay_ms = FUC
 
#define DRIVER_LLCC68_LINK_DEBUG_PRINT(HANDLE, FUC)               (HANDLE)->debug_print = FUC
 
#define DRIVER_LLCC68_LINK_RECEIVE_CALLBACK(HANDLE, FUC)          (HANDLE)->receive_callback = FUC
 
uint8_t llcc68_info(llcc68_info_t *info);
 
uint8_t llcc68_irq_handler(llcc68_handle_t *handle);
 
uint8_t llcc68_init(llcc68_handle_t *handle);
 
uint8_t llcc68_deinit(llcc68_handle_t *handle);
 
uint8_t llcc68_lora_transmit(llcc68_handle_t *handle, llcc68_clock_source_t standby_src,
                             uint16_t preamble_length, llcc68_lora_header_t header_type,
                             llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable,
                             uint8_t *buf, uint16_t len, uint32_t us);
 
uint8_t llcc68_lora_cad(llcc68_handle_t *handle, llcc68_bool_t *enable);
 
uint8_t llcc68_single_receive(llcc68_handle_t *handle, double us);
 
uint8_t llcc68_continuous_receive(llcc68_handle_t *handle);
 
uint8_t llcc68_write_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len);
 
uint8_t llcc68_read_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len);
 
uint8_t llcc68_write_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len);
 
uint8_t llcc68_read_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len);
 
uint8_t llcc68_check_packet_error(llcc68_handle_t *handle, llcc68_bool_t *enable);
 
uint8_t llcc68_set_sleep(llcc68_handle_t *handle, llcc68_start_mode_t mode, llcc68_bool_t rtc_wake_up_enable);
 
uint8_t llcc68_set_standby(llcc68_handle_t *handle, llcc68_clock_source_t src);
 
uint8_t llcc68_set_frequency_synthesis(llcc68_handle_t *handle);
 
uint8_t llcc68_set_tx(llcc68_handle_t *handle, uint32_t timeout);
 
uint8_t llcc68_set_rx(llcc68_handle_t *handle, uint32_t timeout);
 
uint8_t llcc68_timeout_convert_to_register(llcc68_handle_t *handle, double us, uint32_t *reg);
 
uint8_t llcc68_timeout_convert_to_data(llcc68_handle_t *handle, uint32_t reg, double *us);
 
uint8_t llcc68_set_stop_timer_on_preamble(llcc68_handle_t *handle, llcc68_bool_t enable);
 
uint8_t llcc68_set_rx_duty_cycle(llcc68_handle_t *handle, uint32_t rx_period, uint32_t sleep_period);
 
uint8_t llcc68_set_cad(llcc68_handle_t *handle);
 
uint8_t llcc68_set_tx_continuous_wave(llcc68_handle_t *handle);
 
uint8_t llcc68_set_tx_infinite_preamble(llcc68_handle_t *handle);
 
uint8_t llcc68_set_regulator_mode(llcc68_handle_t *handle, llcc68_regulator_mode_t mode);
 
uint8_t llcc68_set_calibration(llcc68_handle_t *handle, uint8_t settings);
 
uint8_t llcc68_set_calibration_image(llcc68_handle_t *handle, uint8_t freq1, uint8_t freq2);
 
uint8_t llcc68_set_pa_config(llcc68_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max);
 
uint8_t llcc68_set_rx_tx_fallback_mode(llcc68_handle_t *handle, llcc68_rx_tx_fallback_mode_t mode);
 
uint8_t llcc68_set_dio_irq_params(llcc68_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask,
                                  uint16_t dio2_mask, uint16_t dio3_mask);
 
uint8_t llcc68_get_irq_status(llcc68_handle_t *handle, uint16_t *status);
 
uint8_t llcc68_clear_irq_status(llcc68_handle_t *handle, uint16_t clear_irq_param);
 
uint8_t llcc68_set_dio2_as_rf_switch_ctrl(llcc68_handle_t *handle, llcc68_bool_t enable);
 
uint8_t llcc68_set_dio3_as_tcxo_ctrl(llcc68_handle_t *handle, llcc68_tcxo_voltage_t voltage, uint32_t delay);
 
uint8_t llcc68_frequency_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg);
 
uint8_t llcc68_frequency_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq);
 
uint8_t llcc68_set_rf_frequency(llcc68_handle_t *handle, uint32_t reg);
 
uint8_t llcc68_set_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t type);
 
uint8_t llcc68_get_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t *type);
 
uint8_t llcc68_set_tx_params(llcc68_handle_t *handle, int8_t dbm, llcc68_ramp_time_t t);
 
uint8_t llcc68_set_gfsk_modulation_params(llcc68_handle_t *handle, uint32_t br, llcc68_gfsk_pulse_shape_t shape, 
                                          llcc68_gfsk_bandwidth_t bw, uint32_t fdev);
 
uint8_t llcc68_gfsk_bit_rate_convert_to_register(llcc68_handle_t *handle, uint32_t br, uint32_t *reg);
 
uint8_t llcc68_gfsk_bit_rate_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *br);
 
uint8_t llcc68_gfsk_frequency_deviation_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg);
 
uint8_t llcc68_gfsk_frequency_deviation_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq);
 
uint8_t llcc68_set_lora_modulation_params(llcc68_handle_t *handle, llcc68_lora_sf_t sf, llcc68_lora_bandwidth_t bw, 
                                          llcc68_lora_cr_t cr, llcc68_bool_t low_data_rate_optimize_enable);
 
uint8_t llcc68_set_gfsk_packet_params(llcc68_handle_t *handle, uint16_t preamble_length,
                                      llcc68_gfsk_preamble_detector_length_t detector_length,
                                      uint8_t sync_word_length, llcc68_gfsk_addr_filter_t filter,
                                      llcc68_gfsk_packet_type_t packet_type, uint8_t payload_length,
                                      llcc68_gfsk_crc_type_t crc_type, llcc68_bool_t whitening_enable);
 
uint8_t llcc68_set_lora_packet_params(llcc68_handle_t *handle, uint16_t preamble_length,
                                      llcc68_lora_header_t header_type, uint8_t payload_length,
                                      llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable);
 
uint8_t llcc68_set_cad_params(llcc68_handle_t *handle, llcc68_lora_cad_symbol_num_t num,
                              uint8_t cad_det_peak, uint8_t cad_det_min, llcc68_lora_cad_exit_mode_t mode,
                              uint32_t timeout);
 
uint8_t llcc68_set_buffer_base_address(llcc68_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr);
 
uint8_t llcc68_set_lora_symb_num_timeout(llcc68_handle_t *handle, uint8_t symb_num);
 
uint8_t llcc68_get_status(llcc68_handle_t *handle, uint8_t *status);
 
uint8_t llcc68_get_rx_buffer_status(llcc68_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer);
 
uint8_t llcc68_get_gfsk_packet_status(llcc68_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw,
                                      uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg);
 
uint8_t llcc68_get_lora_packet_status(llcc68_handle_t *handle, uint8_t *rssi_pkt_raw, uint8_t *snr_pkt_raw,
                                      uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt);
 
uint8_t llcc68_get_instantaneous_rssi(llcc68_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst);
 
uint8_t llcc68_get_stats(llcc68_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error);
 
uint8_t llcc68_reset_stats(llcc68_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error);
 
uint8_t llcc68_get_device_errors(llcc68_handle_t *handle, uint16_t *op_error);
 
uint8_t llcc68_clear_device_errors(llcc68_handle_t *handle);
 
uint8_t llcc68_set_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t value);
 
uint8_t llcc68_get_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t *value);
 
uint8_t llcc68_set_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t value);
 
uint8_t llcc68_get_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t *value);
 
uint8_t llcc68_set_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t value);
 
uint8_t llcc68_get_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t *value);
 
uint8_t llcc68_set_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8]);
 
uint8_t llcc68_get_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8]);
 
uint8_t llcc68_set_fsk_node_address(llcc68_handle_t *handle, uint8_t addr);
 
uint8_t llcc68_get_fsk_node_address(llcc68_handle_t *handle, uint8_t *addr);
 
uint8_t llcc68_set_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t addr);
 
uint8_t llcc68_get_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t *addr);
 
uint8_t llcc68_set_iq_polarity(llcc68_handle_t *handle, uint8_t setup);
 
uint8_t llcc68_get_iq_polarity(llcc68_handle_t *handle, uint8_t *setup);
 
uint8_t llcc68_set_lora_sync_word(llcc68_handle_t *handle, uint16_t sync_word);
 
uint8_t llcc68_get_lora_sync_word(llcc68_handle_t *handle, uint16_t *sync_word);
 
uint8_t llcc68_get_random_number(llcc68_handle_t *handle, uint32_t *r);
 
uint8_t llcc68_set_tx_modulation(llcc68_handle_t *handle, uint8_t modulation);
 
uint8_t llcc68_get_tx_modulation(llcc68_handle_t *handle, uint8_t *modulation);
 
uint8_t llcc68_set_rx_gain(llcc68_handle_t *handle, uint8_t gain);
 
uint8_t llcc68_get_rx_gain(llcc68_handle_t *handle, uint8_t *gain);
 
uint8_t llcc68_set_tx_clamp_config(llcc68_handle_t *handle, uint8_t config);
 
uint8_t llcc68_get_tx_clamp_config(llcc68_handle_t *handle, uint8_t *config);
 
uint8_t llcc68_set_ocp(llcc68_handle_t *handle, uint8_t ocp);
 
uint8_t llcc68_get_ocp(llcc68_handle_t *handle, uint8_t *ocp);
 
uint8_t llcc68_set_rtc_control(llcc68_handle_t *handle, uint8_t control);
 
uint8_t llcc68_get_rtc_control(llcc68_handle_t *handle, uint8_t *control);
 
uint8_t llcc68_set_xta_trim(llcc68_handle_t *handle, uint8_t trim);
 
uint8_t llcc68_get_xta_trim(llcc68_handle_t *handle, uint8_t *trim);
 
uint8_t llcc68_set_xtb_trim(llcc68_handle_t *handle, uint8_t trim);
 
uint8_t llcc68_get_xtb_trim(llcc68_handle_t *handle, uint8_t *trim);
 
uint8_t llcc68_set_dio3_output_control(llcc68_handle_t *handle, uint8_t control);
 
uint8_t llcc68_get_dio3_output_control(llcc68_handle_t *handle, uint8_t *control);
 
uint8_t llcc68_set_event_mask(llcc68_handle_t *handle, uint8_t mask);
 
uint8_t llcc68_get_event_mask(llcc68_handle_t *handle, uint8_t *mask);
 
uint8_t llcc68_set_dio_output_enable(llcc68_handle_t *handle, uint8_t enable);
 
uint8_t llcc68_get_dio_output_enable(llcc68_handle_t *handle, uint8_t *enable);
 
uint8_t llcc68_set_dio_input_enable(llcc68_handle_t *handle, uint8_t enable);
 
uint8_t llcc68_get_dio_input_enable(llcc68_handle_t *handle, uint8_t *enable);
 
uint8_t llcc68_set_pull_up_control(llcc68_handle_t *handle, uint8_t control);
 
uint8_t llcc68_get_pull_up_control(llcc68_handle_t *handle, uint8_t *control);
 
uint8_t llcc68_set_pull_down_control(llcc68_handle_t *handle, uint8_t control);
 
uint8_t llcc68_get_pull_down_control(llcc68_handle_t *handle, uint8_t *control);
 
uint8_t llcc68_write_read_reg(llcc68_handle_t *handle, uint8_t *in_buf, uint32_t in_len,
                              uint8_t *out_buf, uint32_t out_len);
 
#ifdef __cplusplus
}
#endif
 
#endif