LibDriver LLCC68  1.0.0
LLCC68 full-featured driver
driver_llcc68_send_receive_test.c
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1 
37 #include "driver_llcc68_send_receive_test.h"
38 
39 static llcc68_handle_t gs_handle;
40 static uint8_t gs_rx_done;
41 static uint8_t gs_send_buffer[256];
50 static void a_callback(uint16_t type, uint8_t *buf, uint16_t len)
51 {
52  switch (type)
53  {
54  case LLCC68_IRQ_TX_DONE :
55  {
56  llcc68_interface_debug_print("llcc68: irq tx done.\n");
57 
58  break;
59  }
60  case LLCC68_IRQ_RX_DONE :
61  {
62  uint16_t i;
63  llcc68_bool_t enable;
64  uint8_t rssi_pkt_raw;
65  uint8_t snr_pkt_raw;
66  uint8_t signal_rssi_pkt_raw;
67  float rssi_pkt;
68  float snr_pkt;
69  float signal_rssi_pkt;
70 
71  llcc68_interface_debug_print("llcc68: irq rx done.\n");
72 
73  /* get the status */
74  if (llcc68_get_lora_packet_status(&gs_handle, (uint8_t *)&rssi_pkt_raw, (uint8_t *)&snr_pkt_raw,
75  (uint8_t *)&signal_rssi_pkt_raw, (float *)&rssi_pkt,
76  (float *)&snr_pkt, (float *)&signal_rssi_pkt) != 0)
77  {
78  return;
79  }
80  llcc68_interface_debug_print("llcc68: rssi is %0.1f.\n", rssi_pkt);
81  llcc68_interface_debug_print("llcc68: snr is %0.2f.\n", snr_pkt);
82  llcc68_interface_debug_print("llcc68: signal rssi is %0.1f.\n", signal_rssi_pkt);
83 
84  /* check the error */
85  if (llcc68_check_packet_error(&gs_handle, &enable) != 0)
86  {
87  return;
88  }
89  if ((enable == LLCC68_BOOL_FALSE) && len)
90  {
91  for (i = 0; i < len; i++)
92  {
93  llcc68_interface_debug_print("0x%02X ", buf[i]);
94  }
95  llcc68_interface_debug_print("\n");
96  gs_rx_done = 1;
97  }
98 
99  break;
100  }
101  case LLCC68_IRQ_PREAMBLE_DETECTED :
102  {
103  llcc68_interface_debug_print("llcc68: irq preamble detected.\n");
104 
105  break;
106  }
107  case LLCC68_IRQ_SYNC_WORD_VALID :
108  {
109  llcc68_interface_debug_print("llcc68: irq valid sync word detected.\n");
110 
111  break;
112  }
113  case LLCC68_IRQ_HEADER_VALID :
114  {
115  llcc68_interface_debug_print("llcc68: irq valid header.\n");
116 
117  break;
118  }
119  case LLCC68_IRQ_HEADER_ERR :
120  {
121  llcc68_interface_debug_print("llcc68: irq header error.\n");
122 
123  break;
124  }
125  case LLCC68_IRQ_CRC_ERR :
126  {
127  llcc68_interface_debug_print("llcc68: irq crc error.\n");
128 
129  break;
130  }
131  case LLCC68_IRQ_CAD_DONE :
132  {
133  llcc68_interface_debug_print("llcc68: irq cad done.\n");
134 
135  break;
136  }
137  case LLCC68_IRQ_CAD_DETECTED :
138  {
139  llcc68_interface_debug_print("llcc68: irq cad detected.\n");
140 
141  break;
142  }
143  case LLCC68_IRQ_TIMEOUT :
144  {
145  llcc68_interface_debug_print("llcc68: irq timeout.\n");
146 
147  break;
148  }
149  default :
150  {
151  break;
152  }
153  }
154 }
155 
163 uint8_t llcc68_interrupt_test_irq_handler(void)
164 {
165  if (llcc68_irq_handler(&gs_handle) != 0)
166  {
167  return 1;
168  }
169  else
170  {
171  return 0;
172  }
173 }
174 
182 uint8_t llcc68_send_test(void)
183 {
184  uint8_t res;
185  uint32_t reg;
186  uint8_t modulation;
187  uint8_t config;
188  uint8_t i;
189 
190  /* link interface function */
191  DRIVER_LLCC68_LINK_INIT(&gs_handle, llcc68_handle_t);
192  DRIVER_LLCC68_LINK_SPI_INIT(&gs_handle, llcc68_interface_spi_init);
193  DRIVER_LLCC68_LINK_SPI_DEINIT(&gs_handle, llcc68_interface_spi_deinit);
194  DRIVER_LLCC68_LINK_SPI_WRITE_READ(&gs_handle, llcc68_interface_spi_write_read);
195  DRIVER_LLCC68_LINK_RESET_GPIO_INIT(&gs_handle, llcc68_interface_reset_gpio_init);
196  DRIVER_LLCC68_LINK_RESET_GPIO_DEINIT(&gs_handle, llcc68_interface_reset_gpio_deinit);
197  DRIVER_LLCC68_LINK_RESET_GPIO_WRITE(&gs_handle, llcc68_interface_reset_gpio_write);
198  DRIVER_LLCC68_LINK_BUSY_GPIO_INIT(&gs_handle, llcc68_interface_busy_gpio_init);
199  DRIVER_LLCC68_LINK_BUSY_GPIO_DEINIT(&gs_handle, llcc68_interface_busy_gpio_deinit);
200  DRIVER_LLCC68_LINK_BUSY_GPIO_READ(&gs_handle, llcc68_interface_busy_gpio_read);
201  DRIVER_LLCC68_LINK_DELAY_MS(&gs_handle, llcc68_interface_delay_ms);
202  DRIVER_LLCC68_LINK_DEBUG_PRINT(&gs_handle, llcc68_interface_debug_print);
203  DRIVER_LLCC68_LINK_RECEIVE_CALLBACK(&gs_handle, llcc68_interface_receive_callback);
204 
205  /* start send test */
206  llcc68_interface_debug_print("llcc68: start send test.\n");
207 
208  /* init the llcc68 */
209  res = llcc68_init(&gs_handle);
210  if (res != 0)
211  {
212  llcc68_interface_debug_print("llcc68: init failed.\n");
213 
214  return 1;
215  }
216 
217  /* enter standby */
218  res = llcc68_set_standby(&gs_handle, LLCC68_CLOCK_SOURCE_XTAL_32MHZ);
219  if (res != 0)
220  {
221  llcc68_interface_debug_print("llcc68: set standby failed.\n");
222  (void)llcc68_deinit(&gs_handle);
223 
224  return 1;
225  }
226 
227  /* disable stop timer on preamble */
228  res = llcc68_set_stop_timer_on_preamble(&gs_handle, LLCC68_BOOL_FALSE);
229  if (res != 0)
230  {
231  llcc68_interface_debug_print("llcc68: stop timer on preamble failed.\n");
232  (void)llcc68_deinit(&gs_handle);
233 
234  return 1;
235  }
236 
237  /* set dc dc ldo */
238  res = llcc68_set_regulator_mode(&gs_handle, LLCC68_REGULATOR_MODE_DC_DC_LDO);
239  if (res != 0)
240  {
241  llcc68_interface_debug_print("llcc68: set regulator mode failed.\n");
242  (void)llcc68_deinit(&gs_handle);
243 
244  return 1;
245  }
246 
247  /* set +17dBm power */
248  res = llcc68_set_pa_config(&gs_handle, 0x02, 0x03);
249  if (res != 0)
250  {
251  llcc68_interface_debug_print("llcc68: set pa config failed.\n");
252  (void)llcc68_deinit(&gs_handle);
253 
254  return 1;
255  }
256 
257  /* enter to stdby rc mode */
258  res = llcc68_set_rx_tx_fallback_mode(&gs_handle, LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC);
259  if (res != 0)
260  {
261  llcc68_interface_debug_print("llcc68: set rx tx fallback mode failed.\n");
262  (void)llcc68_deinit(&gs_handle);
263 
264  return 1;
265  }
266 
267  /* set dio irq */
268  res = llcc68_set_dio_irq_params(&gs_handle, 0x03FFU, 0x03FFU, 0x0000, 0x0000);
269  if (res != 0)
270  {
271  llcc68_interface_debug_print("llcc68: set dio irq params failed.\n");
272  (void)llcc68_deinit(&gs_handle);
273 
274  return 1;
275  }
276 
277  /* clear irq status */
278  res = llcc68_clear_irq_status(&gs_handle, 0x03FFU);
279  if (res != 0)
280  {
281  llcc68_interface_debug_print("llcc68: clear irq status failed.\n");
282  (void)llcc68_deinit(&gs_handle);
283 
284  return 1;
285  }
286 
287  /* set lora mode */
288  res = llcc68_set_packet_type(&gs_handle, LLCC68_PACKET_TYPE_LORA);
289  if (res != 0)
290  {
291  llcc68_interface_debug_print("llcc68: set packet type failed.\n");
292  (void)llcc68_deinit(&gs_handle);
293 
294  return 1;
295  }
296 
297  /* +17dBm */
298  res = llcc68_set_tx_params(&gs_handle, 17, LLCC68_RAMP_TIME_10US);
299  if (res != 0)
300  {
301  llcc68_interface_debug_print("llcc68: set tx params failed.\n");
302  (void)llcc68_deinit(&gs_handle);
303 
304  return 1;
305  }
306 
307  /* sf9, 125khz, cr4/5, disable low data rate optimize */
308  res = llcc68_set_lora_modulation_params(&gs_handle, LLCC68_LORA_SF_9, LLCC68_LORA_BANDWIDTH_125_KHZ,
309  LLCC68_LORA_CR_4_5, LLCC68_BOOL_FALSE);
310  if (res != 0)
311  {
312  llcc68_interface_debug_print("llcc68: set lora modulation params failed.\n");
313  (void)llcc68_deinit(&gs_handle);
314 
315  return 1;
316  }
317 
318  /* convert the frequency */
319  res = llcc68_frequency_convert_to_register(&gs_handle, 480100000U, (uint32_t *)&reg);
320  if (res != 0)
321  {
322  llcc68_interface_debug_print("llcc68: convert to register failed.\n");
323  (void)llcc68_deinit(&gs_handle);
324 
325  return 1;
326  }
327 
328  /* set the frequency */
329  res = llcc68_set_rf_frequency(&gs_handle, reg);
330  if (res != 0)
331  {
332  llcc68_interface_debug_print("llcc68: set rf frequency failed.\n");
333  (void)llcc68_deinit(&gs_handle);
334 
335  return 1;
336  }
337 
338  /* set base address */
339  res = llcc68_set_buffer_base_address(&gs_handle, 0x00, 0x00);
340  if (res != 0)
341  {
342  llcc68_interface_debug_print("llcc68: set buffer base address failed.\n");
343  (void)llcc68_deinit(&gs_handle);
344 
345  return 1;
346  }
347 
348  /* 1 lora symb num */
349  res = llcc68_set_lora_symb_num_timeout(&gs_handle, 0);
350  if (res != 0)
351  {
352  llcc68_interface_debug_print("llcc68: set lora symb num timeout failed.\n");
353  (void)llcc68_deinit(&gs_handle);
354 
355  return 1;
356  }
357 
358  /* reset stats */
359  res = llcc68_reset_stats(&gs_handle, 0x0000, 0x0000, 0x0000);
360  if (res != 0)
361  {
362  llcc68_interface_debug_print("llcc68: reset stats failed.\n");
363  (void)llcc68_deinit(&gs_handle);
364 
365  return 1;
366  }
367 
368  /* clear device errors */
369  res = llcc68_clear_device_errors(&gs_handle);
370  if (res != 0)
371  {
372  llcc68_interface_debug_print("llcc68: clear device errors failed.\n");
373  (void)llcc68_deinit(&gs_handle);
374 
375  return 1;
376  }
377 
378  /* set the lora sync word */
379  res = llcc68_set_lora_sync_word(&gs_handle, 0x1424U);
380  if (res != 0)
381  {
382  llcc68_interface_debug_print("llcc68: set lora sync word failed.\n");
383  (void)llcc68_deinit(&gs_handle);
384 
385  return 1;
386  }
387 
388  /* get tx modulation */
389  res = llcc68_get_tx_modulation(&gs_handle, (uint8_t *)&modulation);
390  if (res != 0)
391  {
392  llcc68_interface_debug_print("llcc68: get tx modulation failed.\n");
393  (void)llcc68_deinit(&gs_handle);
394 
395  return 1;
396  }
397  modulation |= 0x04;
398 
399  /* set the tx modulation */
400  res = llcc68_set_tx_modulation(&gs_handle, modulation);
401  if (res != 0)
402  {
403  llcc68_interface_debug_print("llcc68: set tx modulation failed.\n");
404  (void)llcc68_deinit(&gs_handle);
405 
406  return 1;
407  }
408 
409  /* set the rx gain */
410  res = llcc68_set_rx_gain(&gs_handle, 0x94);
411  if (res != 0)
412  {
413  llcc68_interface_debug_print("llcc68: set rx gain failed.\n");
414  (void)llcc68_deinit(&gs_handle);
415 
416  return 1;
417  }
418 
419  /* set the ocp */
420  res = llcc68_set_ocp(&gs_handle, 0x38);
421  if (res != 0)
422  {
423  llcc68_interface_debug_print("llcc68: set ocp failed.\n");
424  (void)llcc68_deinit(&gs_handle);
425 
426  return 1;
427  }
428 
429  /* get the tx clamp config */
430  res = llcc68_get_tx_clamp_config(&gs_handle, (uint8_t *)&config);
431  if (res != 0)
432  {
433  llcc68_interface_debug_print("llcc68: get tx clamp config failed.\n");
434  (void)llcc68_deinit(&gs_handle);
435 
436  return 1;
437  }
438  config |= 0x1E;
439 
440  /* set the tx clamp config */
441  res = llcc68_set_tx_clamp_config(&gs_handle, config);
442  if (res != 0)
443  {
444  llcc68_interface_debug_print("llcc68: set tx clamp config failed.\n");
445  (void)llcc68_deinit(&gs_handle);
446 
447  return 1;
448  }
449 
450  /* generate the buffer */
451  for (i = 0; i < 192; i++)
452  {
453  gs_send_buffer[i] = i;
454  }
455 
456  /* send the data */
457  res = llcc68_lora_transmit(&gs_handle, LLCC68_CLOCK_SOURCE_XTAL_32MHZ,
458  50, LLCC68_LORA_HEADER_EXPLICIT,
459  LLCC68_LORA_CRC_TYPE_ON, LLCC68_BOOL_FALSE,
460  (uint8_t *)gs_send_buffer, 192, 0);
461  if (res != 0)
462  {
463  llcc68_interface_debug_print("llcc68: lora send failed.\n");
464  (void)llcc68_deinit(&gs_handle);
465 
466  return 1;
467  }
468 
469  /* finish send test */
470  llcc68_interface_debug_print("llcc68: finish send test.\n");
471 
472  /* deinit */
473  (void)llcc68_deinit(&gs_handle);
474 
475  return 0;
476 }
477 
486 uint8_t llcc68_receive_test(uint32_t s)
487 {
488  uint8_t res;
489  uint32_t reg;
490  uint8_t modulation;
491  uint8_t config;
492  uint8_t setup;
493 
494  /* link interface function */
495  DRIVER_LLCC68_LINK_INIT(&gs_handle, llcc68_handle_t);
496  DRIVER_LLCC68_LINK_SPI_INIT(&gs_handle, llcc68_interface_spi_init);
497  DRIVER_LLCC68_LINK_SPI_DEINIT(&gs_handle, llcc68_interface_spi_deinit);
498  DRIVER_LLCC68_LINK_SPI_WRITE_READ(&gs_handle, llcc68_interface_spi_write_read);
499  DRIVER_LLCC68_LINK_RESET_GPIO_INIT(&gs_handle, llcc68_interface_reset_gpio_init);
500  DRIVER_LLCC68_LINK_RESET_GPIO_DEINIT(&gs_handle, llcc68_interface_reset_gpio_deinit);
501  DRIVER_LLCC68_LINK_RESET_GPIO_WRITE(&gs_handle, llcc68_interface_reset_gpio_write);
502  DRIVER_LLCC68_LINK_BUSY_GPIO_INIT(&gs_handle, llcc68_interface_busy_gpio_init);
503  DRIVER_LLCC68_LINK_BUSY_GPIO_DEINIT(&gs_handle, llcc68_interface_busy_gpio_deinit);
504  DRIVER_LLCC68_LINK_BUSY_GPIO_READ(&gs_handle, llcc68_interface_busy_gpio_read);
505  DRIVER_LLCC68_LINK_DELAY_MS(&gs_handle, llcc68_interface_delay_ms);
506  DRIVER_LLCC68_LINK_DEBUG_PRINT(&gs_handle, llcc68_interface_debug_print);
507  DRIVER_LLCC68_LINK_RECEIVE_CALLBACK(&gs_handle, a_callback);
508 
509  /* start receive test */
510  llcc68_interface_debug_print("llcc68: start receive test.\n");
511 
512  /* init the llcc68 */
513  res = llcc68_init(&gs_handle);
514  if (res != 0)
515  {
516  llcc68_interface_debug_print("llcc68: init failed.\n");
517 
518  return 1;
519  }
520 
521  /* enter standby */
522  res = llcc68_set_standby(&gs_handle, LLCC68_CLOCK_SOURCE_XTAL_32MHZ);
523  if (res != 0)
524  {
525  llcc68_interface_debug_print("llcc68: set standby failed.\n");
526  (void)llcc68_deinit(&gs_handle);
527 
528  return 1;
529  }
530 
531  /* disable stop timer on preamble */
532  res = llcc68_set_stop_timer_on_preamble(&gs_handle, LLCC68_BOOL_FALSE);
533  if (res != 0)
534  {
535  llcc68_interface_debug_print("llcc68: stop timer on preamble failed.\n");
536  (void)llcc68_deinit(&gs_handle);
537 
538  return 1;
539  }
540 
541  /* set dc dc ldo */
542  res = llcc68_set_regulator_mode(&gs_handle, LLCC68_REGULATOR_MODE_DC_DC_LDO);
543  if (res != 0)
544  {
545  llcc68_interface_debug_print("llcc68: set regulator mode failed.\n");
546  (void)llcc68_deinit(&gs_handle);
547 
548  return 1;
549  }
550 
551  /* set +17dBm power */
552  res = llcc68_set_pa_config(&gs_handle, 0x02, 0x03);
553  if (res != 0)
554  {
555  llcc68_interface_debug_print("llcc68: set pa config failed.\n");
556  (void)llcc68_deinit(&gs_handle);
557 
558  return 1;
559  }
560 
561  /* enter to stdby rc mode */
562  res = llcc68_set_rx_tx_fallback_mode(&gs_handle, LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC);
563  if (res != 0)
564  {
565  llcc68_interface_debug_print("llcc68: set rx tx fallback mode failed.\n");
566  (void)llcc68_deinit(&gs_handle);
567 
568  return 1;
569  }
570 
571  /* set dio irq */
572  res = llcc68_set_dio_irq_params(&gs_handle, 0x03FFU, 0x03FFU, 0x0000, 0x0000);
573  if (res != 0)
574  {
575  llcc68_interface_debug_print("llcc68: set dio irq params failed.\n");
576  (void)llcc68_deinit(&gs_handle);
577 
578  return 1;
579  }
580 
581  /* clear irq status */
582  res = llcc68_clear_irq_status(&gs_handle, 0x03FFU);
583  if (res != 0)
584  {
585  llcc68_interface_debug_print("llcc68: clear irq status failed.\n");
586  (void)llcc68_deinit(&gs_handle);
587 
588  return 1;
589  }
590 
591  /* set lora mode */
592  res = llcc68_set_packet_type(&gs_handle, LLCC68_PACKET_TYPE_LORA);
593  if (res != 0)
594  {
595  llcc68_interface_debug_print("llcc68: set packet type failed.\n");
596  (void)llcc68_deinit(&gs_handle);
597 
598  return 1;
599  }
600 
601  /* +17dBm */
602  res = llcc68_set_tx_params(&gs_handle, 17, LLCC68_RAMP_TIME_10US);
603  if (res != 0)
604  {
605  llcc68_interface_debug_print("llcc68: set tx params failed.\n");
606  (void)llcc68_deinit(&gs_handle);
607 
608  return 1;
609  }
610 
611  /* sf9, 125khz, cr4/5, disable low data rate optimize */
612  res = llcc68_set_lora_modulation_params(&gs_handle, LLCC68_LORA_SF_9, LLCC68_LORA_BANDWIDTH_125_KHZ,
613  LLCC68_LORA_CR_4_5, LLCC68_BOOL_FALSE);
614  if (res != 0)
615  {
616  llcc68_interface_debug_print("llcc68: set lora modulation params failed.\n");
617  (void)llcc68_deinit(&gs_handle);
618 
619  return 1;
620  }
621 
622  /* convert the frequency */
623  res = llcc68_frequency_convert_to_register(&gs_handle, 480100000U, (uint32_t *)&reg);
624  if (res != 0)
625  {
626  llcc68_interface_debug_print("llcc68: convert to register failed.\n");
627  (void)llcc68_deinit(&gs_handle);
628 
629  return 1;
630  }
631 
632  /* set the frequency */
633  res = llcc68_set_rf_frequency(&gs_handle, reg);
634  if (res != 0)
635  {
636  llcc68_interface_debug_print("llcc68: set rf frequency failed.\n");
637  (void)llcc68_deinit(&gs_handle);
638 
639  return 1;
640  }
641 
642  /* set base address */
643  res = llcc68_set_buffer_base_address(&gs_handle, 0x00, 0x00);
644  if (res != 0)
645  {
646  llcc68_interface_debug_print("llcc68: set buffer base address failed.\n");
647  (void)llcc68_deinit(&gs_handle);
648 
649  return 1;
650  }
651 
652  /* set lora symb num */
653  res = llcc68_set_lora_symb_num_timeout(&gs_handle, 0);
654  if (res != 0)
655  {
656  llcc68_interface_debug_print("llcc68: set lora symb num timeout failed.\n");
657  (void)llcc68_deinit(&gs_handle);
658 
659  return 1;
660  }
661 
662  /* reset stats */
663  res = llcc68_reset_stats(&gs_handle, 0x0000, 0x0000, 0x0000);
664  if (res != 0)
665  {
666  llcc68_interface_debug_print("llcc68: reset stats failed.\n");
667  (void)llcc68_deinit(&gs_handle);
668 
669  return 1;
670  }
671 
672  /* clear device errors */
673  res = llcc68_clear_device_errors(&gs_handle);
674  if (res != 0)
675  {
676  llcc68_interface_debug_print("llcc68: clear device errors failed.\n");
677  (void)llcc68_deinit(&gs_handle);
678 
679  return 1;
680  }
681 
682  /* set the lora sync word */
683  res = llcc68_set_lora_sync_word(&gs_handle, 0x1424U);
684  if (res != 0)
685  {
686  llcc68_interface_debug_print("llcc68: set lora sync word failed.\n");
687  (void)llcc68_deinit(&gs_handle);
688 
689  return 1;
690  }
691 
692  /* get tx modulation */
693  res = llcc68_get_tx_modulation(&gs_handle, (uint8_t *)&modulation);
694  if (res != 0)
695  {
696  llcc68_interface_debug_print("llcc68: get tx modulation failed.\n");
697  (void)llcc68_deinit(&gs_handle);
698 
699  return 1;
700  }
701  modulation |= 0x04;
702 
703  /* set the tx modulation */
704  res = llcc68_set_tx_modulation(&gs_handle, modulation);
705  if (res != 0)
706  {
707  llcc68_interface_debug_print("llcc68: set tx modulation failed.\n");
708  (void)llcc68_deinit(&gs_handle);
709 
710  return 1;
711  }
712 
713  /* set the rx gain */
714  res = llcc68_set_rx_gain(&gs_handle, 0x94);
715  if (res != 0)
716  {
717  llcc68_interface_debug_print("llcc68: set rx gain failed.\n");
718  (void)llcc68_deinit(&gs_handle);
719 
720  return 1;
721  }
722 
723  /* set the ocp */
724  res = llcc68_set_ocp(&gs_handle, 0x38);
725  if (res != 0)
726  {
727  llcc68_interface_debug_print("llcc68: set ocp failed.\n");
728  (void)llcc68_deinit(&gs_handle);
729 
730  return 1;
731  }
732 
733  /* get the tx clamp config */
734  res = llcc68_get_tx_clamp_config(&gs_handle, (uint8_t *)&config);
735  if (res != 0)
736  {
737  llcc68_interface_debug_print("llcc68: get tx clamp config failed.\n");
738  (void)llcc68_deinit(&gs_handle);
739 
740  return 1;
741  }
742  config |= 0x1E;
743 
744  /* set the tx clamp config */
745  res = llcc68_set_tx_clamp_config(&gs_handle, config);
746  if (res != 0)
747  {
748  llcc68_interface_debug_print("llcc68: set tx clamp config failed.\n");
749  (void)llcc68_deinit(&gs_handle);
750 
751  return 1;
752  }
753 
754  /* set lora packet params */
755  res = llcc68_set_lora_packet_params(&gs_handle, 50,
756  LLCC68_LORA_HEADER_EXPLICIT, 255,
757  LLCC68_LORA_CRC_TYPE_ON, LLCC68_BOOL_FALSE);
758  if (res != 0)
759  {
760  llcc68_interface_debug_print("llcc68: set lora packet params failed.\n");
761  (void)llcc68_deinit(&gs_handle);
762 
763  return 1;
764  }
765 
766  /* get iq polarity */
767  res = llcc68_get_iq_polarity(&gs_handle, (uint8_t *)&setup);
768  if (res != 0)
769  {
770  llcc68_interface_debug_print("llcc68: get iq polarity failed.\n");
771  (void)llcc68_deinit(&gs_handle);
772 
773  return 1;
774  }
775  setup |= 1 << 2;
776 
777  /* set the iq polarity */
778  res = llcc68_set_iq_polarity(&gs_handle, setup);
779  if (res != 0)
780  {
781  llcc68_interface_debug_print("llcc68: set iq polarity failed.\n");
782  (void)llcc68_deinit(&gs_handle);
783 
784  return 1;
785  }
786 
787  /* start receive */
788  res = llcc68_continuous_receive(&gs_handle);
789  if (res != 0)
790  {
791  llcc68_interface_debug_print("llcc68: lora continuous receive failed.\n");
792  (void)llcc68_deinit(&gs_handle);
793 
794  return 1;
795  }
796 
797  /* start receiving */
798  llcc68_interface_debug_print("llcc68: start receiving...\n");
799  gs_rx_done = 0;
800 
801  while ((s != 0) && (gs_rx_done == 0))
802  {
803  s--;
804  llcc68_interface_delay_ms(1000);
805  }
806  if (gs_rx_done == 0)
807  {
808  /* receive timeout */
809  llcc68_interface_debug_print("llcc68: receive timeout.\n");
810  (void)llcc68_deinit(&gs_handle);
811 
812  return 1;
813  }
814  else
815  {
816  /* finish receive test */
817  llcc68_interface_debug_print("llcc68: finish receive test.\n");
818  (void)llcc68_deinit(&gs_handle);
819  }
820 
821  return 0;
822 }
driver_llcc68_send_receive_test.h
driver llcc68 send receive test header file
llcc68_irq_handler
uint8_t llcc68_irq_handler(llcc68_handle_t *handle)
irq handler
Definition: driver_llcc68.c:400
llcc68_bool_t
llcc68_bool_t
llcc68 bool enumeration definition
Definition: driver_llcc68.h:63
llcc68_set_rf_frequency
uint8_t llcc68_set_rf_frequency(llcc68_handle_t *handle, uint32_t reg)
set the rf frequency
Definition: driver_llcc68.c:2531
llcc68_set_lora_modulation_params
uint8_t llcc68_set_lora_modulation_params(llcc68_handle_t *handle, llcc68_lora_sf_t sf, llcc68_lora_bandwidth_t bw, llcc68_lora_cr_t cr, llcc68_bool_t low_data_rate_optimize_enable)
set the modulation params in LoRa mode
Definition: driver_llcc68.c:2888
llcc68_set_pa_config
uint8_t llcc68_set_pa_config(llcc68_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max)
set the pa config
Definition: driver_llcc68.c:2135
llcc68_check_packet_error
uint8_t llcc68_check_packet_error(llcc68_handle_t *handle, llcc68_bool_t *enable)
check the packet error
Definition: driver_llcc68.c:1046
llcc68_clear_device_errors
uint8_t llcc68_clear_device_errors(llcc68_handle_t *handle)
clear the device errors
Definition: driver_llcc68.c:3622
llcc68_lora_transmit
uint8_t llcc68_lora_transmit(llcc68_handle_t *handle, llcc68_clock_source_t standby_src, uint16_t preamble_length, llcc68_lora_header_t header_type, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable, uint8_t *buf, uint16_t len, uint32_t us)
send the lora data
Definition: driver_llcc68.c:1084
llcc68_get_lora_packet_status
uint8_t llcc68_get_lora_packet_status(llcc68_handle_t *handle, uint8_t *rssi_pkt_raw, uint8_t *snr_pkt_raw, uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt)
get the packet status in LoRa mode
Definition: driver_llcc68.c:3374
llcc68_clear_irq_status
uint8_t llcc68_clear_irq_status(llcc68_handle_t *handle, uint16_t clear_irq_param)
clear the irq status
Definition: driver_llcc68.c:2334
llcc68_deinit
uint8_t llcc68_deinit(llcc68_handle_t *handle)
close the chip
Definition: driver_llcc68.c:754
llcc68_reset_stats
uint8_t llcc68_reset_stats(llcc68_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error)
reset the stats
Definition: driver_llcc68.c:3526
llcc68_set_stop_timer_on_preamble
uint8_t llcc68_set_stop_timer_on_preamble(llcc68_handle_t *handle, llcc68_bool_t enable)
stop timer on preamble
Definition: driver_llcc68.c:1767
llcc68_set_regulator_mode
uint8_t llcc68_set_regulator_mode(llcc68_handle_t *handle, llcc68_regulator_mode_t mode)
set the regulator_mode
Definition: driver_llcc68.c:1994
llcc68_set_lora_packet_params
uint8_t llcc68_set_lora_packet_params(llcc68_handle_t *handle, uint16_t preamble_length, llcc68_lora_header_t header_type, uint8_t payload_length, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable)
set the packet params in LoRa mode
Definition: driver_llcc68.c:3014
llcc68_set_rx_tx_fallback_mode
uint8_t llcc68_set_rx_tx_fallback_mode(llcc68_handle_t *handle, llcc68_rx_tx_fallback_mode_t mode)
set the rx tx fallback mode
Definition: driver_llcc68.c:2184
llcc68_set_lora_symb_num_timeout
uint8_t llcc68_set_lora_symb_num_timeout(llcc68_handle_t *handle, uint8_t symb_num)
set the lora symbol number timeout
Definition: driver_llcc68.c:3173
llcc68_set_tx_params
uint8_t llcc68_set_tx_params(llcc68_handle_t *handle, int8_t dbm, llcc68_ramp_time_t t)
set the tx params
Definition: driver_llcc68.c:2673
llcc68_continuous_receive
uint8_t llcc68_continuous_receive(llcc68_handle_t *handle)
enter to the continuous receive mode
Definition: driver_llcc68.c:890
llcc68_set_dio_irq_params
uint8_t llcc68_set_dio_irq_params(llcc68_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask, uint16_t dio2_mask, uint16_t dio3_mask)
set the dio irq params
Definition: driver_llcc68.c:2233
llcc68_set_standby
uint8_t llcc68_set_standby(llcc68_handle_t *handle, llcc68_clock_source_t src)
enter to the standby mode
Definition: driver_llcc68.c:1527
llcc68_set_buffer_base_address
uint8_t llcc68_set_buffer_base_address(llcc68_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr)
set the buffer base address
Definition: driver_llcc68.c:3126
llcc68_frequency_convert_to_register
uint8_t llcc68_frequency_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency to the register raw data
Definition: driver_llcc68.c:2476
llcc68_set_packet_type
uint8_t llcc68_set_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t type)
set the packet type
Definition: driver_llcc68.c:2580
llcc68_init
uint8_t llcc68_init(llcc68_handle_t *handle)
initialize the chip
Definition: driver_llcc68.c:583
LLCC68_LORA_CRC_TYPE_ON
@ LLCC68_LORA_CRC_TYPE_ON
Definition: driver_llcc68.h:310
LLCC68_LORA_BANDWIDTH_125_KHZ
@ LLCC68_LORA_BANDWIDTH_125_KHZ
Definition: driver_llcc68.h:234
LLCC68_BOOL_FALSE
@ LLCC68_BOOL_FALSE
Definition: driver_llcc68.h:64
LLCC68_CLOCK_SOURCE_XTAL_32MHZ
@ LLCC68_CLOCK_SOURCE_XTAL_32MHZ
Definition: driver_llcc68.h:83
LLCC68_LORA_SF_9
@ LLCC68_LORA_SF_9
Definition: driver_llcc68.h:224
LLCC68_IRQ_PREAMBLE_DETECTED
@ LLCC68_IRQ_PREAMBLE_DETECTED
Definition: driver_llcc68.h:116
LLCC68_IRQ_TX_DONE
@ LLCC68_IRQ_TX_DONE
Definition: driver_llcc68.h:114
LLCC68_IRQ_HEADER_ERR
@ LLCC68_IRQ_HEADER_ERR
Definition: driver_llcc68.h:119
LLCC68_IRQ_CRC_ERR
@ LLCC68_IRQ_CRC_ERR
Definition: driver_llcc68.h:120
LLCC68_IRQ_RX_DONE
@ LLCC68_IRQ_RX_DONE
Definition: driver_llcc68.h:115
LLCC68_IRQ_CAD_DETECTED
@ LLCC68_IRQ_CAD_DETECTED
Definition: driver_llcc68.h:122
LLCC68_IRQ_HEADER_VALID
@ LLCC68_IRQ_HEADER_VALID
Definition: driver_llcc68.h:118
LLCC68_IRQ_TIMEOUT
@ LLCC68_IRQ_TIMEOUT
Definition: driver_llcc68.h:123
LLCC68_IRQ_SYNC_WORD_VALID
@ LLCC68_IRQ_SYNC_WORD_VALID
Definition: driver_llcc68.h:117
LLCC68_IRQ_CAD_DONE
@ LLCC68_IRQ_CAD_DONE
Definition: driver_llcc68.h:121
LLCC68_REGULATOR_MODE_DC_DC_LDO
@ LLCC68_REGULATOR_MODE_DC_DC_LDO
Definition: driver_llcc68.h:92
LLCC68_RAMP_TIME_10US
@ LLCC68_RAMP_TIME_10US
Definition: driver_llcc68.h:165
LLCC68_LORA_CR_4_5
@ LLCC68_LORA_CR_4_5
Definition: driver_llcc68.h:244
LLCC68_PACKET_TYPE_LORA
@ LLCC68_PACKET_TYPE_LORA
Definition: driver_llcc68.h:157
LLCC68_LORA_HEADER_EXPLICIT
@ LLCC68_LORA_HEADER_EXPLICIT
Definition: driver_llcc68.h:300
LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC
@ LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC
Definition: driver_llcc68.h:132
llcc68_interface_reset_gpio_init
uint8_t llcc68_interface_reset_gpio_init(void)
interface reset gpio init
Definition: driver_llcc68_interface_template.c:87
llcc68_interface_busy_gpio_read
uint8_t llcc68_interface_busy_gpio_read(uint8_t *value)
interface busy gpio read
Definition: driver_llcc68_interface_template.c:149
llcc68_interface_busy_gpio_deinit
uint8_t llcc68_interface_busy_gpio_deinit(void)
interface busy gpio deinit
Definition: driver_llcc68_interface_template.c:136
llcc68_interface_spi_deinit
uint8_t llcc68_interface_spi_deinit(void)
interface spi bus deinit
Definition: driver_llcc68_interface_template.c:58
llcc68_interface_spi_write_read
uint8_t llcc68_interface_spi_write_read(uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
interface spi bus write read
Definition: driver_llcc68_interface_template.c:74
llcc68_interface_reset_gpio_deinit
uint8_t llcc68_interface_reset_gpio_deinit(void)
interface reset gpio deinit
Definition: driver_llcc68_interface_template.c:99
llcc68_interface_receive_callback
void llcc68_interface_receive_callback(uint16_t type, uint8_t *buf, uint16_t len)
interface receive callback
Definition: driver_llcc68_interface_template.c:181
llcc68_interface_debug_print
void llcc68_interface_debug_print(const char *const fmt,...)
interface print format data
Definition: driver_llcc68_interface_template.c:169
llcc68_interface_delay_ms
void llcc68_interface_delay_ms(uint32_t ms)
interface delay ms
Definition: driver_llcc68_interface_template.c:159
llcc68_interface_spi_init
uint8_t llcc68_interface_spi_init(void)
interface spi bus init
Definition: driver_llcc68_interface_template.c:46
llcc68_interface_busy_gpio_init
uint8_t llcc68_interface_busy_gpio_init(void)
interface busy gpio init
Definition: driver_llcc68_interface_template.c:124
llcc68_interface_reset_gpio_write
uint8_t llcc68_interface_reset_gpio_write(uint8_t data)
interface reset gpio write
Definition: driver_llcc68_interface_template.c:112
DRIVER_LLCC68_LINK_BUSY_GPIO_READ
#define DRIVER_LLCC68_LINK_BUSY_GPIO_READ(HANDLE, FUC)
link busy_gpio_read function
Definition: driver_llcc68.h:501
DRIVER_LLCC68_LINK_SPI_INIT
#define DRIVER_LLCC68_LINK_SPI_INIT(HANDLE, FUC)
link spi_init function
Definition: driver_llcc68.h:437
DRIVER_LLCC68_LINK_DELAY_MS
#define DRIVER_LLCC68_LINK_DELAY_MS(HANDLE, FUC)
link delay_ms function
Definition: driver_llcc68.h:509
DRIVER_LLCC68_LINK_RESET_GPIO_WRITE
#define DRIVER_LLCC68_LINK_RESET_GPIO_WRITE(HANDLE, FUC)
link reset_gpio_write function
Definition: driver_llcc68.h:477
DRIVER_LLCC68_LINK_BUSY_GPIO_DEINIT
#define DRIVER_LLCC68_LINK_BUSY_GPIO_DEINIT(HANDLE, FUC)
link busy_gpio_deinit function
Definition: driver_llcc68.h:493
DRIVER_LLCC68_LINK_SPI_WRITE_READ
#define DRIVER_LLCC68_LINK_SPI_WRITE_READ(HANDLE, FUC)
link spi_write_read function
Definition: driver_llcc68.h:453
DRIVER_LLCC68_LINK_INIT
#define DRIVER_LLCC68_LINK_INIT(HANDLE, STRUCTURE)
initialize llcc68_handle_t structure
Definition: driver_llcc68.h:429
DRIVER_LLCC68_LINK_RECEIVE_CALLBACK
#define DRIVER_LLCC68_LINK_RECEIVE_CALLBACK(HANDLE, FUC)
link receive_callback function
Definition: driver_llcc68.h:525
DRIVER_LLCC68_LINK_DEBUG_PRINT
#define DRIVER_LLCC68_LINK_DEBUG_PRINT(HANDLE, FUC)
link debug_print function
Definition: driver_llcc68.h:517
DRIVER_LLCC68_LINK_SPI_DEINIT
#define DRIVER_LLCC68_LINK_SPI_DEINIT(HANDLE, FUC)
link spi_deinit function
Definition: driver_llcc68.h:445
DRIVER_LLCC68_LINK_RESET_GPIO_INIT
#define DRIVER_LLCC68_LINK_RESET_GPIO_INIT(HANDLE, FUC)
link reset_gpio_init function
Definition: driver_llcc68.h:461
DRIVER_LLCC68_LINK_RESET_GPIO_DEINIT
#define DRIVER_LLCC68_LINK_RESET_GPIO_DEINIT(HANDLE, FUC)
link reset_gpio_deinit function
Definition: driver_llcc68.h:469
DRIVER_LLCC68_LINK_BUSY_GPIO_INIT
#define DRIVER_LLCC68_LINK_BUSY_GPIO_INIT(HANDLE, FUC)
link busy_gpio_init function
Definition: driver_llcc68.h:485
llcc68_set_iq_polarity
uint8_t llcc68_set_iq_polarity(llcc68_handle_t *handle, uint8_t setup)
set the iq polarity
Definition: driver_llcc68.c:4212
llcc68_set_lora_sync_word
uint8_t llcc68_set_lora_sync_word(llcc68_handle_t *handle, uint16_t sync_word)
set the lora sync word
Definition: driver_llcc68.c:4300
llcc68_set_ocp
uint8_t llcc68_set_ocp(llcc68_handle_t *handle, uint8_t ocp)
set the ocp
Definition: driver_llcc68.c:4704
llcc68_set_tx_clamp_config
uint8_t llcc68_set_tx_clamp_config(llcc68_handle_t *handle, uint8_t config)
set the tx clamp config
Definition: driver_llcc68.c:4616
llcc68_get_iq_polarity
uint8_t llcc68_get_iq_polarity(llcc68_handle_t *handle, uint8_t *setup)
get the iq polarity
Definition: driver_llcc68.c:4256
llcc68_set_rx_gain
uint8_t llcc68_set_rx_gain(llcc68_handle_t *handle, uint8_t gain)
set the rx gain
Definition: driver_llcc68.c:4528
llcc68_set_tx_modulation
uint8_t llcc68_set_tx_modulation(llcc68_handle_t *handle, uint8_t modulation)
set the tx modulation
Definition: driver_llcc68.c:4440
llcc68_get_tx_modulation
uint8_t llcc68_get_tx_modulation(llcc68_handle_t *handle, uint8_t *modulation)
get the tx modulation
Definition: driver_llcc68.c:4484
llcc68_get_tx_clamp_config
uint8_t llcc68_get_tx_clamp_config(llcc68_handle_t *handle, uint8_t *config)
get the tx clamp config
Definition: driver_llcc68.c:4660
llcc68_interrupt_test_irq_handler
uint8_t llcc68_interrupt_test_irq_handler(void)
llcc68 interrupt test irq
Definition: driver_llcc68_send_receive_test.c:163
llcc68_send_test
uint8_t llcc68_send_test(void)
send test
Definition: driver_llcc68_send_receive_test.c:182
llcc68_receive_test
uint8_t llcc68_receive_test(uint32_t s)
receive test
Definition: driver_llcc68_send_receive_test.c:486
llcc68_handle_s
llcc68 handle structure definition
Definition: driver_llcc68.h:371