LibDriver CH9121X
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driver_ch9121x.c File Reference

driver ch9121x source file More...

#include "driver_ch9121x.h"
Include dependency graph for driver_ch9121x.c:

Go to the source code of this file.

Macros

#define CHIP_NAME   "WCH CH9121X"
 chip information definition
#define MANUFACTURER_NAME   "WCH"
#define SUPPLY_VOLTAGE_MIN   3.2f
#define SUPPLY_VOLTAGE_MAX   3.4f
#define MAX_CURRENT   76.2f
#define TEMPERATURE_MIN   -40.0f
#define TEMPERATURE_MAX   85.0f
#define DRIVER_VERSION   1000
#define CH9121X_CMD_CHIP_VERSION   0x01
 chip basic command definition
#define CH9121X_CMD_RESET   0x02
#define CH9121X_CMD_SAVE_TO_EEPROM   0x0D
#define CH9121X_CMD_RUN_AND_RESET   0x0E
#define CH9121X_CMD_EXIT   0x5E
#define CH9121X_CMD_DHCP   0x33
#define CH9121X_CMD_MAC   0x81
#define CH9121X_CMD_SET_IP   0x11
#define CH9121X_CMD_SET_NETMASK   0x12
#define CH9121X_CMD_SET_GATEWAY   0x13
#define CH9121X_CMD_GET_IP   0x61
#define CH9121X_CMD_GET_NETMASK   0x62
#define CH9121X_CMD_GET_GATEWAY   0x63
#define CH9121X_CMD_DISCONNECT   0x24
#define CH9121X_CMD_SET_MAC_ADDR   0x31
#define CH9121X_CMD_CLEAR_MAC_ADDR   0x51
#define CH9121X_CMD_SET_ETH_CFG_ENABLE   0x52
#define CH9121X_CMD_GET_ETH_CFG_STATUS   0x53
#define CH9121X_CMD_SET_UART_CLOCK_MODE   0x54
#define CH9121X_CMD_GET_UART_CLOCK_MODE   0x55
#define CH9121X_CMD_GET_PHY_STATUS   0x69
#define CH9121X_CMD_GET_PORT1_2_LINKDOWN   0x74
#define CH9121X_CMD_GET_DHCP_ENABLE   0x83
#define CH9121X_CMD_PORT1_GET_STATUS   0x03
 chip port command definition
#define CH9121X_CMD_PORT1_SET_MODE   0x10
#define CH9121X_CMD_PORT1_SET_PORT   0x14
#define CH9121X_CMD_PORT1_SET_DST_IP   0x15
#define CH9121X_CMD_PORT1_SET_DST_PORT   0x16
#define CH9121X_CMD_PORT1_SET_BAUD   0x21
#define CH9121X_CMD_PORT1_SET_CONFIG   0x22
#define CH9121X_CMD_PORT1_SET_TIMEOUT   0x23
#define CH9121X_CMD_PORT1_GET_MODE   0x60
#define CH9121X_CMD_PORT1_GET_PORT   0x64
#define CH9121X_CMD_PORT1_GET_DST_IP   0x65
#define CH9121X_CMD_PORT1_GET_DST_PORT   0x66
#define CH9121X_CMD_PORT1_GET_BAUD   0x71
#define CH9121X_CMD_PORT1_GET_CONFIG   0x72
#define CH9121X_CMD_PORT1_GET_TIMEOUT   0x73
#define CH9121X_CMD_PORT1_GET_RANDOM   0x67
#define CH9121X_CMD_PORT1_GET_UART_PACK_LEN   0x75
#define CH9121X_CMD_PORT1_GET_EMPTY   0x76
#define CH9121X_CMD_PORT2_GET_STATUS   0x04
#define CH9121X_CMD_PORT2_SET_MODE   0x40
#define CH9121X_CMD_PORT2_SET_PORT   0x41
#define CH9121X_CMD_PORT2_SET_DST_IP   0x42
#define CH9121X_CMD_PORT2_SET_DST_PORT   0x43
#define CH9121X_CMD_PORT2_SET_BAUD   0x44
#define CH9121X_CMD_PORT2_SET_CONFIG   0x45
#define CH9121X_CMD_PORT2_SET_TIMEOUT   0x46
#define CH9121X_CMD_PORT2_GET_MODE   0x90
#define CH9121X_CMD_PORT2_GET_PORT   0x91
#define CH9121X_CMD_PORT2_GET_DST_IP   0x92
#define CH9121X_CMD_PORT2_GET_DST_PORT   0x93
#define CH9121X_CMD_PORT2_GET_BAUD   0x94
#define CH9121X_CMD_PORT2_GET_CONFIG   0x95
#define CH9121X_CMD_PORT2_GET_TIMEOUT   0x96
#define CH9121X_CMD_PORT2_GET_RANDOM   0x97
#define CH9121X_CMD_PORT2_GET_UART_PACK_LEN   0x98
#define CH9121X_CMD_PORT2_GET_EMPTY   0x99
#define CH9121X_CMD_PORT1_RANDOM_PORT   0x17
 chip port extern command definition
#define CH9121X_CMD_PORT1_LEN   0x25
#define CH9121X_CMD_PORT1_FLUSH   0x26
#define CH9121X_CMD_PORT1_DOMAIN   0x34
#define CH9121X_CMD_PORT2_ENABLE   0x39
#define CH9121X_CMD_PORT2_RANDOM_PORT   0x47
#define CH9121X_CMD_PORT2_LEN   0x48
#define CH9121X_CMD_PORT2_FLUSH   0x49
#define CH9121X_CMD2_SET_TCP_RETRY_MODE   0xA104U
 chip port two bytes extern command definition
#define CH9121X_CMD2_FLOW_CONTROL_ENABLE   0xA107U
#define CH9121X_CMD2_SET_ARP_RETRY   0xA108U
#define CH9121X_CMD2_GET_TCP_RETRY_MODE   0xA204U
#define CH9121X_CMD2_GET_FLOW_CONTROL_ENABLE   0xA207U

Functions

uint8_t ch9121x_get_version (ch9121x_handle_t *handle, uint8_t *version)
 get version
uint8_t ch9121x_reset (ch9121x_handle_t *handle)
 reset the chip
uint8_t ch9121x_save_to_eeprom (ch9121x_handle_t *handle)
 save to eeprom
uint8_t ch9121x_config_and_reset (ch9121x_handle_t *handle)
 config and reset the chip
uint8_t ch9121x_exit (ch9121x_handle_t *handle)
 exit
uint8_t ch9121x_set_dhcp (ch9121x_handle_t *handle, ch9121x_bool_t enable)
 enable or disable dhcp
uint8_t ch9121x_get_mac (ch9121x_handle_t *handle, uint8_t mac[6])
 get chip mac
uint8_t ch9121x_get_status (ch9121x_handle_t *handle, ch9121x_port_t port, ch9121x_status_t *status)
 get status
uint8_t ch9121x_set_mode (ch9121x_handle_t *handle, ch9121x_port_t port, ch9121x_mode_t mode)
 set mode
uint8_t ch9121x_get_mode (ch9121x_handle_t *handle, ch9121x_port_t port, ch9121x_mode_t *mode)
 get mode
uint8_t ch9121x_set_ip (ch9121x_handle_t *handle, uint8_t ip[4])
 set ip address
uint8_t ch9121x_get_ip (ch9121x_handle_t *handle, uint8_t ip[4])
 get ip address
uint8_t ch9121x_set_subnet_mask (ch9121x_handle_t *handle, uint8_t mask[4])
 set subnet mask
uint8_t ch9121x_get_subnet_mask (ch9121x_handle_t *handle, uint8_t mask[4])
 get subnet mask
uint8_t ch9121x_set_gateway (ch9121x_handle_t *handle, uint8_t ip[4])
 set gateway
uint8_t ch9121x_get_gateway (ch9121x_handle_t *handle, uint8_t ip[4])
 get gateway
uint8_t ch9121x_set_source_port (ch9121x_handle_t *handle, ch9121x_port_t port, uint16_t num)
 set source port
uint8_t ch9121x_get_source_port (ch9121x_handle_t *handle, ch9121x_port_t port, uint16_t *num)
 get source port
uint8_t ch9121x_set_dest_ip (ch9121x_handle_t *handle, ch9121x_port_t port, uint8_t ip[4])
 set dest ip
uint8_t ch9121x_get_dest_ip (ch9121x_handle_t *handle, ch9121x_port_t port, uint8_t ip[4])
 get dest ip
uint8_t ch9121x_set_dest_port (ch9121x_handle_t *handle, ch9121x_port_t port, uint16_t num)
 set dest port
uint8_t ch9121x_get_dest_port (ch9121x_handle_t *handle, ch9121x_port_t port, uint16_t *num)
 get dest port
uint8_t ch9121x_set_uart_baud (ch9121x_handle_t *handle, ch9121x_port_t port, uint32_t baud)
 set uart baud
uint8_t ch9121x_get_uart_baud (ch9121x_handle_t *handle, ch9121x_port_t port, uint32_t *baud)
 get uart baud
uint8_t ch9121x_set_uart_config (ch9121x_handle_t *handle, ch9121x_port_t port, uint8_t data_bit, ch9121x_parity_t parity, uint8_t stop_bit)
 set uart config
uint8_t ch9121x_get_uart_config (ch9121x_handle_t *handle, ch9121x_port_t port, uint8_t *data_bit, ch9121x_parity_t *parity, uint8_t *stop_bit)
 get uart config
uint8_t ch9121x_set_uart_timeout (ch9121x_handle_t *handle, ch9121x_port_t port, uint8_t timeout)
 set uart timeout
uint8_t ch9121x_get_uart_timeout (ch9121x_handle_t *handle, ch9121x_port_t port, uint8_t *timeout)
 get uart timeout
uint8_t ch9121x_uart_timeout_convert_to_register (ch9121x_handle_t *handle, uint16_t ms, uint8_t *reg)
 convert the uart timeout to the register raw data
uint8_t ch9121x_uart_timeout_convert_to_data (ch9121x_handle_t *handle, uint8_t reg, uint16_t *ms)
 convert the register raw data to the offset
uint8_t ch9121x_set_source_port_random (ch9121x_handle_t *handle, ch9121x_port_t port, ch9121x_bool_t enable)
 enable or disable random source port number
uint8_t ch9121x_set_uart_buffer_length (ch9121x_handle_t *handle, ch9121x_port_t port, uint32_t len)
 set uart buffer length
uint8_t ch9121x_set_uart_flush (ch9121x_handle_t *handle, ch9121x_port_t port, ch9121x_bool_t enable)
 enable or disable uart auto flush
uint8_t ch9121x_set_port2 (ch9121x_handle_t *handle, ch9121x_bool_t enable)
 enable or disable uart port2
uint8_t ch9121x_set_disconnect_with_no_rj45 (ch9121x_handle_t *handle, ch9121x_bool_t enable)
 enable or disable disconnect with no rj45
uint8_t ch9121x_set_domain (ch9121x_handle_t *handle, char *domain)
 set chip domain
uint8_t ch9121x_set_mac (ch9121x_handle_t *handle, uint8_t mac[6])
 set mac address
uint8_t ch9121x_clear_mac (ch9121x_handle_t *handle)
 clear mac address
uint8_t ch9121x_set_eth_cfg (ch9121x_handle_t *handle, ch9121x_bool_t enable)
 set eth cfg
uint8_t ch9121x_get_eth_cfg (ch9121x_handle_t *handle, ch9121x_bool_t *enable)
 get eth cfg
uint8_t ch9121x_set_uart_clock_mode (ch9121x_handle_t *handle, ch9121x_uart_clock_mode_t mode)
 set uart clock mode
uint8_t ch9121x_get_uart_clock_mode (ch9121x_handle_t *handle, ch9121x_uart_clock_mode_t *mode)
 get uart clock mode
uint8_t ch9121x_get_source_port_random (ch9121x_handle_t *handle, ch9121x_port_t port, ch9121x_bool_t *enable)
 get random source port number status
uint8_t ch9121x_get_phy_status (ch9121x_handle_t *handle, ch9121x_phy_status_t *status)
 get phy status
uint8_t ch9121x_get_disconnect_with_no_rj45 (ch9121x_handle_t *handle, ch9121x_bool_t *enable)
 get disconnect with no rj45 status
uint8_t ch9121x_get_uart_buffer_length (ch9121x_handle_t *handle, ch9121x_port_t port, uint32_t *len)
 get uart buffer length
uint8_t ch9121x_get_uart_flush (ch9121x_handle_t *handle, ch9121x_port_t port, ch9121x_bool_t *enable)
 get uart auto flush status
uint8_t ch9121x_get_dhcp (ch9121x_handle_t *handle, ch9121x_bool_t *enable)
 get dhcp status
uint8_t ch9121x_set_tcp_retry_mode (ch9121x_handle_t *handle, uint8_t t)
 set tcp retry mode
uint8_t ch9121x_get_tcp_retry_mode (ch9121x_handle_t *handle, uint8_t *t)
 get tcp retry mode
uint8_t ch9121x_set_flow_control (ch9121x_handle_t *handle, ch9121x_bool_t enable)
 enable or disable flow control
uint8_t ch9121x_get_flow_control (ch9121x_handle_t *handle, ch9121x_bool_t *enable)
 get flow control status
uint8_t ch9121x_set_arp_retry (ch9121x_handle_t *handle, uint8_t period, uint8_t times)
 set arp retry
uint8_t ch9121x_tcp_retry_time_convert_to_register (ch9121x_handle_t *handle, uint16_t ms, uint8_t *reg)
 convert the tcp retry time to the register raw data
uint8_t ch9121x_tcp_retry_time_convert_to_data (ch9121x_handle_t *handle, uint8_t reg, uint16_t *ms)
 convert the register raw data to the tcp retry time
uint8_t ch9121x_arp_retry_period_convert_to_register (ch9121x_handle_t *handle, uint16_t ms, uint8_t *reg)
 convert the arp retry period to the register raw data
uint8_t ch9121x_arp_retry_period_convert_to_data (ch9121x_handle_t *handle, uint8_t reg, uint16_t *ms)
 convert the register raw data to the arp retry period
uint8_t ch9121x_init (ch9121x_handle_t *handle)
 initialize the chip
uint8_t ch9121x_deinit (ch9121x_handle_t *handle)
 close the chip
uint8_t ch9121x_write (ch9121x_handle_t *handle, uint8_t *buf, uint16_t len)
 write data
uint8_t ch9121x_read (ch9121x_handle_t *handle, uint8_t *buf, uint16_t *len)
 read data
uint8_t ch9121x_set_command (ch9121x_handle_t *handle, uint8_t *param, uint16_t len, uint8_t *out, uint16_t out_len, uint16_t pre_delay, uint16_t timeout)
 set command
uint8_t ch9121x_info (ch9121x_info_t *info)
 get chip's information

Detailed Description

driver ch9121x source file

Copyright (c) 2015 - present LibDriver All rights reserved

The MIT License (MIT)

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Version
1.0.0
Author
Shifeng Li
Date
2026-05-15

history

Date Version Author Description
2026/05/15 1.0 Shifeng Li first upload

Definition in file driver_ch9121x.c.

Macro Definition Documentation

◆ CH9121X_CMD2_FLOW_CONTROL_ENABLE

#define CH9121X_CMD2_FLOW_CONTROL_ENABLE   0xA107U

flow control enable command

Definition at line 134 of file driver_ch9121x.c.

◆ CH9121X_CMD2_GET_FLOW_CONTROL_ENABLE

#define CH9121X_CMD2_GET_FLOW_CONTROL_ENABLE   0xA207U

get flow control enable command

Definition at line 137 of file driver_ch9121x.c.

◆ CH9121X_CMD2_GET_TCP_RETRY_MODE

#define CH9121X_CMD2_GET_TCP_RETRY_MODE   0xA204U

get tcp retry mode command

Definition at line 136 of file driver_ch9121x.c.

◆ CH9121X_CMD2_SET_ARP_RETRY

#define CH9121X_CMD2_SET_ARP_RETRY   0xA108U

set arp retry command

Definition at line 135 of file driver_ch9121x.c.

◆ CH9121X_CMD2_SET_TCP_RETRY_MODE

#define CH9121X_CMD2_SET_TCP_RETRY_MODE   0xA104U

chip port two bytes extern command definition

set tcp retry mode command

Definition at line 133 of file driver_ch9121x.c.

◆ CH9121X_CMD_CHIP_VERSION

#define CH9121X_CMD_CHIP_VERSION   0x01

chip basic command definition

get chip version command

Definition at line 54 of file driver_ch9121x.c.

◆ CH9121X_CMD_CLEAR_MAC_ADDR

#define CH9121X_CMD_CLEAR_MAC_ADDR   0x51

clear mac address command

Definition at line 69 of file driver_ch9121x.c.

◆ CH9121X_CMD_DHCP

#define CH9121X_CMD_DHCP   0x33

dhcp command

Definition at line 59 of file driver_ch9121x.c.

◆ CH9121X_CMD_DISCONNECT

#define CH9121X_CMD_DISCONNECT   0x24

set disconnect command

Definition at line 67 of file driver_ch9121x.c.

◆ CH9121X_CMD_EXIT

#define CH9121X_CMD_EXIT   0x5E

exit command

Definition at line 58 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_DHCP_ENABLE

#define CH9121X_CMD_GET_DHCP_ENABLE   0x83

get dhcp enable command

Definition at line 76 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_ETH_CFG_STATUS

#define CH9121X_CMD_GET_ETH_CFG_STATUS   0x53

get eth cfg enable command

Definition at line 71 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_GATEWAY

#define CH9121X_CMD_GET_GATEWAY   0x63

get gateway command

Definition at line 66 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_IP

#define CH9121X_CMD_GET_IP   0x61

get ip command

Definition at line 64 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_NETMASK

#define CH9121X_CMD_GET_NETMASK   0x62

get netmask command

Definition at line 65 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_PHY_STATUS

#define CH9121X_CMD_GET_PHY_STATUS   0x69

get phy status command

Definition at line 74 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_PORT1_2_LINKDOWN

#define CH9121X_CMD_GET_PORT1_2_LINKDOWN   0x74

get port 1 and 2 linkdown command

Definition at line 75 of file driver_ch9121x.c.

◆ CH9121X_CMD_GET_UART_CLOCK_MODE

#define CH9121X_CMD_GET_UART_CLOCK_MODE   0x55

get uart clock mode command

Definition at line 73 of file driver_ch9121x.c.

◆ CH9121X_CMD_MAC

#define CH9121X_CMD_MAC   0x81

mac command

Definition at line 60 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_DOMAIN

#define CH9121X_CMD_PORT1_DOMAIN   0x34

set port1 domain command

Definition at line 124 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_FLUSH

#define CH9121X_CMD_PORT1_FLUSH   0x26

set port1 flush command

Definition at line 123 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_BAUD

#define CH9121X_CMD_PORT1_GET_BAUD   0x71

get port1 baud command

Definition at line 93 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_CONFIG

#define CH9121X_CMD_PORT1_GET_CONFIG   0x72

get port1 config command

Definition at line 94 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_DST_IP

#define CH9121X_CMD_PORT1_GET_DST_IP   0x65

get port1 dest ip command

Definition at line 91 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_DST_PORT

#define CH9121X_CMD_PORT1_GET_DST_PORT   0x66

get port1 dest port command

Definition at line 92 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_EMPTY

#define CH9121X_CMD_PORT1_GET_EMPTY   0x76

get port1 empty command

Definition at line 98 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_MODE

#define CH9121X_CMD_PORT1_GET_MODE   0x60

get port1 mode command

Definition at line 89 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_PORT

#define CH9121X_CMD_PORT1_GET_PORT   0x64

get port1 port command

Definition at line 90 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_RANDOM

#define CH9121X_CMD_PORT1_GET_RANDOM   0x67

get port1 random command

Definition at line 96 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_STATUS

#define CH9121X_CMD_PORT1_GET_STATUS   0x03

chip port command definition

check port1 status command

Definition at line 81 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_TIMEOUT

#define CH9121X_CMD_PORT1_GET_TIMEOUT   0x73

get port1 timeout command

Definition at line 95 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_GET_UART_PACK_LEN

#define CH9121X_CMD_PORT1_GET_UART_PACK_LEN   0x75

get port1 uart pack len command

Definition at line 97 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_LEN

#define CH9121X_CMD_PORT1_LEN   0x25

set port1 package length command

Definition at line 122 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_RANDOM_PORT

#define CH9121X_CMD_PORT1_RANDOM_PORT   0x17

chip port extern command definition

set port1 random port command

Definition at line 121 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_SET_BAUD

#define CH9121X_CMD_PORT1_SET_BAUD   0x21

set port1 baud command

Definition at line 86 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_SET_CONFIG

#define CH9121X_CMD_PORT1_SET_CONFIG   0x22

set port1 config command

Definition at line 87 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_SET_DST_IP

#define CH9121X_CMD_PORT1_SET_DST_IP   0x15

set port1 dest ip command

Definition at line 84 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_SET_DST_PORT

#define CH9121X_CMD_PORT1_SET_DST_PORT   0x16

set port1 dest port command

Definition at line 85 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_SET_MODE

#define CH9121X_CMD_PORT1_SET_MODE   0x10

set port1 mode command

Definition at line 82 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_SET_PORT

#define CH9121X_CMD_PORT1_SET_PORT   0x14

set port1 port command

Definition at line 83 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT1_SET_TIMEOUT

#define CH9121X_CMD_PORT1_SET_TIMEOUT   0x23

set port1 timeout command

Definition at line 88 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_ENABLE

#define CH9121X_CMD_PORT2_ENABLE   0x39

enable port2 command

Definition at line 125 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_FLUSH

#define CH9121X_CMD_PORT2_FLUSH   0x49

set port2 flush command

Definition at line 128 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_BAUD

#define CH9121X_CMD_PORT2_GET_BAUD   0x94

get port2 baud command

Definition at line 111 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_CONFIG

#define CH9121X_CMD_PORT2_GET_CONFIG   0x95

get port2 config command

Definition at line 112 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_DST_IP

#define CH9121X_CMD_PORT2_GET_DST_IP   0x92

get port2 dest ip command

Definition at line 109 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_DST_PORT

#define CH9121X_CMD_PORT2_GET_DST_PORT   0x93

get port2 dest port command

Definition at line 110 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_EMPTY

#define CH9121X_CMD_PORT2_GET_EMPTY   0x99

get port2 empty command

Definition at line 116 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_MODE

#define CH9121X_CMD_PORT2_GET_MODE   0x90

get port2 mode command

Definition at line 107 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_PORT

#define CH9121X_CMD_PORT2_GET_PORT   0x91

get port2 port command

Definition at line 108 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_RANDOM

#define CH9121X_CMD_PORT2_GET_RANDOM   0x97

get port2 random command

Definition at line 114 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_STATUS

#define CH9121X_CMD_PORT2_GET_STATUS   0x04

check port2 status command

Definition at line 99 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_TIMEOUT

#define CH9121X_CMD_PORT2_GET_TIMEOUT   0x96

get port2 timeout command

Definition at line 113 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_GET_UART_PACK_LEN

#define CH9121X_CMD_PORT2_GET_UART_PACK_LEN   0x98

get port2 uart pack len command

Definition at line 115 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_LEN

#define CH9121X_CMD_PORT2_LEN   0x48

set port2 package length command

Definition at line 127 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_RANDOM_PORT

#define CH9121X_CMD_PORT2_RANDOM_PORT   0x47

set port2 random port command

Definition at line 126 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_SET_BAUD

#define CH9121X_CMD_PORT2_SET_BAUD   0x44

set port2 baud command

Definition at line 104 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_SET_CONFIG

#define CH9121X_CMD_PORT2_SET_CONFIG   0x45

set port2 config command

Definition at line 105 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_SET_DST_IP

#define CH9121X_CMD_PORT2_SET_DST_IP   0x42

set port2 dest ip command

Definition at line 102 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_SET_DST_PORT

#define CH9121X_CMD_PORT2_SET_DST_PORT   0x43

set port2 dest port command

Definition at line 103 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_SET_MODE

#define CH9121X_CMD_PORT2_SET_MODE   0x40

set port2 mode command

Definition at line 100 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_SET_PORT

#define CH9121X_CMD_PORT2_SET_PORT   0x41

set port2 port command

Definition at line 101 of file driver_ch9121x.c.

◆ CH9121X_CMD_PORT2_SET_TIMEOUT

#define CH9121X_CMD_PORT2_SET_TIMEOUT   0x46

set port2 timeout command

Definition at line 106 of file driver_ch9121x.c.

◆ CH9121X_CMD_RESET

#define CH9121X_CMD_RESET   0x02

reset chip command

Definition at line 55 of file driver_ch9121x.c.

◆ CH9121X_CMD_RUN_AND_RESET

#define CH9121X_CMD_RUN_AND_RESET   0x0E

run the config and reset command

Definition at line 57 of file driver_ch9121x.c.

◆ CH9121X_CMD_SAVE_TO_EEPROM

#define CH9121X_CMD_SAVE_TO_EEPROM   0x0D

save to eeprom command

Definition at line 56 of file driver_ch9121x.c.

◆ CH9121X_CMD_SET_ETH_CFG_ENABLE

#define CH9121X_CMD_SET_ETH_CFG_ENABLE   0x52

set eth cfg enable command

Definition at line 70 of file driver_ch9121x.c.

◆ CH9121X_CMD_SET_GATEWAY

#define CH9121X_CMD_SET_GATEWAY   0x13

set gateway command

Definition at line 63 of file driver_ch9121x.c.

◆ CH9121X_CMD_SET_IP

#define CH9121X_CMD_SET_IP   0x11

set ip command

Definition at line 61 of file driver_ch9121x.c.

◆ CH9121X_CMD_SET_MAC_ADDR

#define CH9121X_CMD_SET_MAC_ADDR   0x31

set mac address command

Definition at line 68 of file driver_ch9121x.c.

◆ CH9121X_CMD_SET_NETMASK

#define CH9121X_CMD_SET_NETMASK   0x12

set netmask command

Definition at line 62 of file driver_ch9121x.c.

◆ CH9121X_CMD_SET_UART_CLOCK_MODE

#define CH9121X_CMD_SET_UART_CLOCK_MODE   0x54

set uart clock mode command

Definition at line 72 of file driver_ch9121x.c.

◆ CHIP_NAME

#define CHIP_NAME   "WCH CH9121X"

chip information definition

chip name

Definition at line 42 of file driver_ch9121x.c.

◆ DRIVER_VERSION

#define DRIVER_VERSION   1000

driver version

Definition at line 49 of file driver_ch9121x.c.

◆ MANUFACTURER_NAME

#define MANUFACTURER_NAME   "WCH"

manufacturer name

Definition at line 43 of file driver_ch9121x.c.

◆ MAX_CURRENT

#define MAX_CURRENT   76.2f

chip max current

Definition at line 46 of file driver_ch9121x.c.

◆ SUPPLY_VOLTAGE_MAX

#define SUPPLY_VOLTAGE_MAX   3.4f

chip max supply voltage

Definition at line 45 of file driver_ch9121x.c.

◆ SUPPLY_VOLTAGE_MIN

#define SUPPLY_VOLTAGE_MIN   3.2f

chip min supply voltage

Definition at line 44 of file driver_ch9121x.c.

◆ TEMPERATURE_MAX

#define TEMPERATURE_MAX   85.0f

chip max operating temperature

Definition at line 48 of file driver_ch9121x.c.

◆ TEMPERATURE_MIN

#define TEMPERATURE_MIN   -40.0f

chip min operating temperature

Definition at line 47 of file driver_ch9121x.c.