LibDriver LLCC68  1.0.0
LLCC68 full-featured driver
driver_llcc68_lora.c
Go to the documentation of this file.
1 
37 #include "driver_llcc68_lora.h"
38 
39 static llcc68_handle_t gs_handle;
49 {
50  if (llcc68_irq_handler(&gs_handle) != 0)
51  {
52  return 1;
53  }
54  else
55  {
56  return 0;
57  }
58 }
59 
68 uint8_t llcc68_lora_init(void (*callback)(uint16_t type, uint8_t *buf, uint16_t len))
69 {
70  uint8_t res;
71  uint32_t reg;
72  uint8_t modulation;
73  uint8_t config;
74 
75  /* link interface function */
88  DRIVER_LLCC68_LINK_RECEIVE_CALLBACK(&gs_handle, callback);
89 
90  /* init the llcc68 */
91  res = llcc68_init(&gs_handle);
92  if (res != 0)
93  {
94  llcc68_interface_debug_print("llcc68: init failed.\n");
95 
96  return 1;
97  }
98 
99  /* enter standby */
101  if (res != 0)
102  {
103  llcc68_interface_debug_print("llcc68: set standby failed.\n");
104  (void)llcc68_deinit(&gs_handle);
105 
106  return 1;
107  }
108 
109  /* set stop timer on preamble */
111  if (res != 0)
112  {
113  llcc68_interface_debug_print("llcc68: stop timer on preamble failed.\n");
114  (void)llcc68_deinit(&gs_handle);
115 
116  return 1;
117  }
118 
119  /* set regulator mode */
121  if (res != 0)
122  {
123  llcc68_interface_debug_print("llcc68: set regulator mode failed.\n");
124  (void)llcc68_deinit(&gs_handle);
125 
126  return 1;
127  }
128 
129  /* set pa config */
131  if (res != 0)
132  {
133  llcc68_interface_debug_print("llcc68: set pa config failed.\n");
134  (void)llcc68_deinit(&gs_handle);
135 
136  return 1;
137  }
138 
139  /* enter to stdby xosc mode */
141  if (res != 0)
142  {
143  llcc68_interface_debug_print("llcc68: set rx tx fallback mode failed.\n");
144  (void)llcc68_deinit(&gs_handle);
145 
146  return 1;
147  }
148 
149  /* set dio irq */
150  res = llcc68_set_dio_irq_params(&gs_handle, 0x03FF, 0x03FF, 0x0000, 0x0000);
151  if (res != 0)
152  {
153  llcc68_interface_debug_print("llcc68: set dio irq params failed.\n");
154  (void)llcc68_deinit(&gs_handle);
155 
156  return 1;
157  }
158 
159  /* clear irq status */
160  res = llcc68_clear_irq_status(&gs_handle, 0x03FF);
161  if (res != 0)
162  {
163  llcc68_interface_debug_print("llcc68: clear irq status failed.\n");
164  (void)llcc68_deinit(&gs_handle);
165 
166  return 1;
167  }
168 
169  /* set lora mode */
171  if (res != 0)
172  {
173  llcc68_interface_debug_print("llcc68: set packet type failed.\n");
174  (void)llcc68_deinit(&gs_handle);
175 
176  return 1;
177  }
178 
179  /* set tx params */
181  if (res != 0)
182  {
183  llcc68_interface_debug_print("llcc68: set tx params failed.\n");
184  (void)llcc68_deinit(&gs_handle);
185 
186  return 1;
187  }
188 
189  /* set lora modulation params */
192  if (res != 0)
193  {
194  llcc68_interface_debug_print("llcc68: set lora modulation params failed.\n");
195  (void)llcc68_deinit(&gs_handle);
196 
197  return 1;
198  }
199 
200  /* convert the frequency */
201  res = llcc68_frequency_convert_to_register(&gs_handle, LLCC68_LORA_DEFAULT_RF_FREQUENCY, (uint32_t *)&reg);
202  if (res != 0)
203  {
204  llcc68_interface_debug_print("llcc68: convert to register failed.\n");
205  (void)llcc68_deinit(&gs_handle);
206 
207  return 1;
208  }
209 
210  /* set the frequency */
211  res = llcc68_set_rf_frequency(&gs_handle, reg);
212  if (res != 0)
213  {
214  llcc68_interface_debug_print("llcc68: set rf frequency failed.\n");
215  (void)llcc68_deinit(&gs_handle);
216 
217  return 1;
218  }
219 
220  /* set base address */
221  res = llcc68_set_buffer_base_address(&gs_handle, 0x00, 0x00);
222  if (res != 0)
223  {
224  llcc68_interface_debug_print("llcc68: set buffer base address failed.\n");
225  (void)llcc68_deinit(&gs_handle);
226 
227  return 1;
228  }
229 
230  /* set lora symb num */
232  if (res != 0)
233  {
234  llcc68_interface_debug_print("llcc68: set lora symb num timeout failed.\n");
235  (void)llcc68_deinit(&gs_handle);
236 
237  return 1;
238  }
239 
240  /* reset stats */
241  res = llcc68_reset_stats(&gs_handle, 0x0000, 0x0000, 0x0000);
242  if (res != 0)
243  {
244  llcc68_interface_debug_print("llcc68: reset stats failed.\n");
245  (void)llcc68_deinit(&gs_handle);
246 
247  return 1;
248  }
249 
250  /* clear device errors */
251  res = llcc68_clear_device_errors(&gs_handle);
252  if (res != 0)
253  {
254  llcc68_interface_debug_print("llcc68: clear device errors failed.\n");
255  (void)llcc68_deinit(&gs_handle);
256 
257  return 1;
258  }
259 
260  /* set the lora sync word */
262  if (res != 0)
263  {
264  llcc68_interface_debug_print("llcc68: set lora sync word failed.\n");
265  (void)llcc68_deinit(&gs_handle);
266 
267  return 1;
268  }
269 
270  /* get tx modulation */
271  res = llcc68_get_tx_modulation(&gs_handle, (uint8_t *)&modulation);
272  if (res != 0)
273  {
274  llcc68_interface_debug_print("llcc68: get tx modulation failed.\n");
275  (void)llcc68_deinit(&gs_handle);
276 
277  return 1;
278  }
279  modulation |= 0x04;
280 
281  /* set the tx modulation */
282  res = llcc68_set_tx_modulation(&gs_handle, modulation);
283  if (res != 0)
284  {
285  llcc68_interface_debug_print("llcc68: set tx modulation failed.\n");
286  (void)llcc68_deinit(&gs_handle);
287 
288  return 1;
289  }
290 
291  /* set the rx gain */
293  if (res != 0)
294  {
295  llcc68_interface_debug_print("llcc68: set rx gain failed.\n");
296  (void)llcc68_deinit(&gs_handle);
297 
298  return 1;
299  }
300 
301  /* set the ocp */
302  res = llcc68_set_ocp(&gs_handle, LLCC68_LORA_DEFAULT_OCP);
303  if (res != 0)
304  {
305  llcc68_interface_debug_print("llcc68: set ocp failed.\n");
306  (void)llcc68_deinit(&gs_handle);
307 
308  return 1;
309  }
310 
311  /* get the tx clamp config */
312  res = llcc68_get_tx_clamp_config(&gs_handle, (uint8_t *)&config);
313  if (res != 0)
314  {
315  llcc68_interface_debug_print("llcc68: get tx clamp config failed.\n");
316  (void)llcc68_deinit(&gs_handle);
317 
318  return 1;
319  }
320  config |= 0x1E;
321 
322  /* set the tx clamp config */
323  res = llcc68_set_tx_clamp_config(&gs_handle, config);
324  if (res != 0)
325  {
326  llcc68_interface_debug_print("llcc68: set tx clamp config failed.\n");
327  (void)llcc68_deinit(&gs_handle);
328 
329  return 1;
330  }
331 
332  return 0;
333 }
334 
342 uint8_t llcc68_lora_deinit(void)
343 {
344  if (llcc68_deinit(&gs_handle) != 0)
345  {
346  return 1;
347  }
348  else
349  {
350  return 0;
351  }
352 }
353 
361 uint8_t llcc68_lora_sleep(void)
362 {
364  {
365  return 1;
366  }
367  else
368  {
369  return 0;
370  }
371 }
372 
380 uint8_t llcc68_lora_wake_up(void)
381 {
382  uint8_t status;
383 
384  if (llcc68_get_status(&gs_handle, (uint8_t *)&status) != 0)
385  {
386  return 1;
387  }
388  else
389  {
390  return 0;
391  }
392 }
393 
402 {
403  uint8_t setup;
404 
405  /* set dio irq */
408  0x0000, 0x0000) != 0)
409  {
410  return 1;
411  }
412 
413  /* clear irq status */
414  if (llcc68_clear_irq_status(&gs_handle, 0x03FFU) != 0)
415  {
416  return 1;
417  }
418 
419  /* set lora packet params */
423  {
424  return 1;
425  }
426 
427  /* get iq polarity */
428  if (llcc68_get_iq_polarity(&gs_handle, (uint8_t *)&setup) != 0)
429  {
430  return 1;
431  }
432 
433 #if LLCC68_LORA_DEFAULT_INVERT_IQ == LLCC68_BOOL_FALSE
434  setup |= 1 << 2;
435 #else
436  setup &= ~(1 << 2);
437 #endif
438 
439  /* set the iq polarity */
440  if (llcc68_set_iq_polarity(&gs_handle, setup) != 0)
441  {
442  return 1;
443  }
444 
445  /* start receive */
446  if (llcc68_continuous_receive(&gs_handle) != 0)
447  {
448  return 1;
449  }
450 
451  return 0;
452 }
453 
463 {
464  uint8_t setup;
465 
466  /* set dio irq */
469  0x0000, 0x0000) != 0)
470  {
471  return 1;
472  }
473 
474  /* clear irq status */
475  if (llcc68_clear_irq_status(&gs_handle, 0x03FFU) != 0)
476  {
477  return 1;
478  }
479 
480  /* set lora packet params */
484  {
485  return 1;
486  }
487 
488  /* get iq polarity */
489  if (llcc68_get_iq_polarity(&gs_handle, (uint8_t *)&setup) != 0)
490  {
491  return 1;
492  }
493 
494 #if LLCC68_LORA_DEFAULT_INVERT_IQ == LLCC68_BOOL_FALSE
495  setup |= 1 << 2;
496 #else
497  setup &= ~(1 << 2);
498 #endif
499 
500  /* set the iq polarity */
501  if (llcc68_set_iq_polarity(&gs_handle, setup) != 0)
502  {
503  return 1;
504  }
505 
506  /* start receive */
507  if (llcc68_single_receive(&gs_handle, us) != 0)
508  {
509  return 1;
510  }
511 
512  return 0;
513 }
514 
523 {
524  /* set dio irq */
527  0x0000, 0x0000) != 0)
528  {
529  return 1;
530  }
531 
532  /* clear irq status */
533  if (llcc68_clear_irq_status(&gs_handle, 0x03FFU) != 0)
534  {
535  return 1;
536  }
537 
538  return 0;
539 }
540 
550 uint8_t llcc68_lora_send(uint8_t *buf, uint16_t len)
551 {
552  /* send the data */
556  (uint8_t *)buf, len, 0) != 0)
557  {
558  return 1;
559  }
560 
561  return 0;
562 }
563 
573 {
574  /* set cad params */
578  {
579  return 1;
580  }
581 
582  /* run the cad */
583  if (llcc68_lora_cad(&gs_handle, enable) != 0)
584  {
585  return 1;
586  }
587 
588  return 0;
589 }
590 
600 uint8_t llcc68_lora_get_status(float *rssi, float *snr)
601 {
602  uint8_t rssi_pkt_raw;
603  uint8_t snr_pkt_raw;
604  uint8_t signal_rssi_pkt_raw;
605  float signal_rssi_pkt;
606 
607  /* get the status */
608  if (llcc68_get_lora_packet_status(&gs_handle, (uint8_t *)&rssi_pkt_raw, (uint8_t *)&snr_pkt_raw,
609  (uint8_t *)&signal_rssi_pkt_raw, (float *)rssi, (float *)snr, (float *)&signal_rssi_pkt) != 0)
610  {
611  return 1;
612  }
613 
614  return 0;
615 }
616 
626 {
627  /* check the error */
628  if (llcc68_check_packet_error(&gs_handle, enable) != 0)
629  {
630  return 1;
631  }
632 
633  return 0;
634 }
driver llcc68 lora header file
uint8_t llcc68_irq_handler(llcc68_handle_t *handle)
irq handler
llcc68_bool_t
llcc68 bool enumeration definition
Definition: driver_llcc68.h:63
uint8_t llcc68_set_rf_frequency(llcc68_handle_t *handle, uint32_t reg)
set the rf frequency
uint8_t llcc68_set_lora_modulation_params(llcc68_handle_t *handle, llcc68_lora_sf_t sf, llcc68_lora_bandwidth_t bw, llcc68_lora_cr_t cr, llcc68_bool_t low_data_rate_optimize_enable)
set the modulation params in LoRa mode
uint8_t llcc68_set_pa_config(llcc68_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max)
set the pa config
uint8_t llcc68_check_packet_error(llcc68_handle_t *handle, llcc68_bool_t *enable)
check the packet error
uint8_t llcc68_clear_device_errors(llcc68_handle_t *handle)
clear the device errors
uint8_t llcc68_lora_transmit(llcc68_handle_t *handle, llcc68_clock_source_t standby_src, uint16_t preamble_length, llcc68_lora_header_t header_type, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable, uint8_t *buf, uint16_t len, uint32_t us)
send the lora data
uint8_t llcc68_get_lora_packet_status(llcc68_handle_t *handle, uint8_t *rssi_pkt_raw, uint8_t *snr_pkt_raw, uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt)
get the packet status in LoRa mode
uint8_t llcc68_get_status(llcc68_handle_t *handle, uint8_t *status)
get the status
uint8_t llcc68_clear_irq_status(llcc68_handle_t *handle, uint16_t clear_irq_param)
clear the irq status
uint8_t llcc68_deinit(llcc68_handle_t *handle)
close the chip
uint8_t llcc68_single_receive(llcc68_handle_t *handle, double us)
enter to the single receive mode
uint8_t llcc68_reset_stats(llcc68_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error)
reset the stats
uint8_t llcc68_set_stop_timer_on_preamble(llcc68_handle_t *handle, llcc68_bool_t enable)
stop timer on preamble
uint8_t llcc68_set_regulator_mode(llcc68_handle_t *handle, llcc68_regulator_mode_t mode)
set the regulator_mode
uint8_t llcc68_set_lora_packet_params(llcc68_handle_t *handle, uint16_t preamble_length, llcc68_lora_header_t header_type, uint8_t payload_length, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable)
set the packet params in LoRa mode
uint8_t llcc68_set_rx_tx_fallback_mode(llcc68_handle_t *handle, llcc68_rx_tx_fallback_mode_t mode)
set the rx tx fallback mode
uint8_t llcc68_set_lora_symb_num_timeout(llcc68_handle_t *handle, uint8_t symb_num)
set the lora symbol number timeout
uint8_t llcc68_set_sleep(llcc68_handle_t *handle, llcc68_start_mode_t mode, llcc68_bool_t rtc_wake_up_enable)
enter to the sleep mode
uint8_t llcc68_set_tx_params(llcc68_handle_t *handle, int8_t dbm, llcc68_ramp_time_t t)
set the tx params
uint8_t llcc68_continuous_receive(llcc68_handle_t *handle)
enter to the continuous receive mode
uint8_t llcc68_set_cad_params(llcc68_handle_t *handle, llcc68_lora_cad_symbol_num_t num, uint8_t cad_det_peak, uint8_t cad_det_min, llcc68_lora_cad_exit_mode_t mode, uint32_t timeout)
set the cad params
uint8_t llcc68_set_dio_irq_params(llcc68_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask, uint16_t dio2_mask, uint16_t dio3_mask)
set the dio irq params
uint8_t llcc68_set_standby(llcc68_handle_t *handle, llcc68_clock_source_t src)
enter to the standby mode
uint8_t llcc68_set_buffer_base_address(llcc68_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr)
set the buffer base address
uint8_t llcc68_frequency_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency to the register raw data
uint8_t llcc68_lora_cad(llcc68_handle_t *handle, llcc68_bool_t *enable)
run the cad
uint8_t llcc68_set_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t type)
set the packet type
uint8_t llcc68_init(llcc68_handle_t *handle)
initialize the chip
@ LLCC68_CLOCK_SOURCE_XTAL_32MHZ
Definition: driver_llcc68.h:83
@ LLCC68_IRQ_TX_DONE
@ LLCC68_IRQ_CRC_ERR
@ LLCC68_IRQ_RX_DONE
@ LLCC68_IRQ_CAD_DETECTED
@ LLCC68_IRQ_TIMEOUT
@ LLCC68_IRQ_CAD_DONE
@ LLCC68_PACKET_TYPE_LORA
@ LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC
@ LLCC68_LORA_CAD_EXIT_MODE_ONLY
#define LLCC68_LORA_DEFAULT_CAD_DET_PEAK
#define LLCC68_LORA_DEFAULT_RX_GAIN
uint8_t llcc68_lora_deinit(void)
lora example deinit
#define LLCC68_LORA_DEFAULT_PA_CONFIG_HP_MAX
uint8_t llcc68_lora_check_packet_error(llcc68_bool_t *enable)
lora example check packet error
#define LLCC68_LORA_DEFAULT_BUFFER_SIZE
uint8_t llcc68_lora_wake_up(void)
lora example wake up the chip
uint8_t llcc68_lora_set_shot_receive_mode(double us)
lora example enter to the shot receive mode
uint8_t llcc68_lora_set_continuous_receive_mode(void)
lora example enter to the continuous receive mode
uint8_t llcc68_lora_run_cad(llcc68_bool_t *enable)
lora example run the cad
#define LLCC68_LORA_DEFAULT_RAMP_TIME
#define LLCC68_LORA_DEFAULT_CR
uint8_t llcc68_lora_sleep(void)
lora example enter to the sleep mode
uint8_t llcc68_lora_send(uint8_t *buf, uint16_t len)
lora example send lora data
#define LLCC68_LORA_DEFAULT_CRC_TYPE
#define LLCC68_LORA_DEFAULT_OCP
#define LLCC68_LORA_DEFAULT_CAD_DET_MIN
#define LLCC68_LORA_DEFAULT_SYNC_WORD
#define LLCC68_LORA_DEFAULT_SYMB_NUM_TIMEOUT
#define LLCC68_LORA_DEFAULT_SF
#define LLCC68_LORA_DEFAULT_REGULATOR_MODE
#define LLCC68_LORA_DEFAULT_INVERT_IQ
#define LLCC68_LORA_DEFAULT_START_MODE
#define LLCC68_LORA_DEFAULT_RTC_WAKE_UP
#define LLCC68_LORA_DEFAULT_HEADER
uint8_t llcc68_lora_init(void(*callback)(uint16_t type, uint8_t *buf, uint16_t len))
lora example init
#define LLCC68_LORA_DEFAULT_BANDWIDTH
uint8_t llcc68_lora_irq_handler(void)
llcc68 lora irq
#define LLCC68_LORA_DEFAULT_PA_CONFIG_DUTY_CYCLE
#define LLCC68_LORA_DEFAULT_RF_FREQUENCY
#define LLCC68_LORA_DEFAULT_LOW_DATA_RATE_OPTIMIZE
#define LLCC68_LORA_DEFAULT_TX_DBM
uint8_t llcc68_lora_get_status(float *rssi, float *snr)
lora example get the status
#define LLCC68_LORA_DEFAULT_STOP_TIMER_ON_PREAMBLE
llcc68 lora example default definition
#define LLCC68_LORA_DEFAULT_CAD_SYMBOL_NUM
#define LLCC68_LORA_DEFAULT_PREAMBLE_LENGTH
uint8_t llcc68_lora_set_send_mode(void)
lora example enter to the send mode
uint8_t llcc68_interface_reset_gpio_init(void)
interface reset gpio init
uint8_t llcc68_interface_busy_gpio_read(uint8_t *value)
interface busy gpio read
uint8_t llcc68_interface_busy_gpio_deinit(void)
interface busy gpio deinit
uint8_t llcc68_interface_spi_deinit(void)
interface spi bus deinit
uint8_t llcc68_interface_spi_write_read(uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
interface spi bus write read
uint8_t llcc68_interface_reset_gpio_deinit(void)
interface reset gpio deinit
void llcc68_interface_debug_print(const char *const fmt,...)
interface print format data
void llcc68_interface_delay_ms(uint32_t ms)
interface delay ms
uint8_t llcc68_interface_spi_init(void)
interface spi bus init
uint8_t llcc68_interface_busy_gpio_init(void)
interface busy gpio init
uint8_t llcc68_interface_reset_gpio_write(uint8_t data)
interface reset gpio write
uint8_t llcc68_set_iq_polarity(llcc68_handle_t *handle, uint8_t setup)
set the iq polarity
uint8_t llcc68_set_lora_sync_word(llcc68_handle_t *handle, uint16_t sync_word)
set the lora sync word
uint8_t llcc68_set_ocp(llcc68_handle_t *handle, uint8_t ocp)
set the ocp
uint8_t llcc68_set_tx_clamp_config(llcc68_handle_t *handle, uint8_t config)
set the tx clamp config
uint8_t llcc68_get_iq_polarity(llcc68_handle_t *handle, uint8_t *setup)
get the iq polarity
uint8_t llcc68_set_rx_gain(llcc68_handle_t *handle, uint8_t gain)
set the rx gain
uint8_t llcc68_set_tx_modulation(llcc68_handle_t *handle, uint8_t modulation)
set the tx modulation
uint8_t llcc68_get_tx_modulation(llcc68_handle_t *handle, uint8_t *modulation)
get the tx modulation
uint8_t llcc68_get_tx_clamp_config(llcc68_handle_t *handle, uint8_t *config)
get the tx clamp config
llcc68 handle structure definition